JJ WangHM

[md]你好: 我看目前sdmmc_stm32.c 內已經有stm32_sdmmc_clock_enable()內已經採用clock_control_get_rate, 目前也是卡住在這邊無法獲取正確的clock, m4 overlay中也已經移除pll2相關clock設定但是目前看起來還是讀取異常問題 看起來M7/M4所讀取道的系統時鐘差異蠻多導致。 Starting stm32h747i_disco with CPU frequency: 400 MHz m7 PLL1_P: 400000000 Hz m7 PLL1_Q: 200000000 Hz m7 PLL1_R: 400000000 Hz m7 PLL2_P: 240000000 Hz m7 PLL2_Q: 120000000 Hz m7 PLL2_R: 48000000 Hz UART device 'serial@40007c00' is ready. Msg Service [master] demo started _id=0 Starting stm32h747i_disco with CPU frequency: 200 MHz m4 PLL1_P: 128000000 Hz m4 PLL1_Q: 64000000 Hz m4 PLL1_R: 128000000 Hz m4 PLL2_P: 76800000 Hz m4 PLL2_Q: 38400000 Hz m4 PLL2_R: 15360000 Hz PLL2_R = 64000000 [00:00:10.019,000] <err> stm32_sdmmc: Failed to enable SDMMC domain clock  [00:00:10.019,000] <err> stm32_sdmmc: failed to init clocks /* m4 SDMMC2 node */ &sdmmc2 { status = "okay"; compatible = "st,stm32-sdmmc"; clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000200>, <&rcc STM32_SRC_PLL2_R SDMMC_SEL(1)>; clock-names = "bus", "sdmmc"; bus-width = <4>; pinctrl-0 = < &sdmmc2_d0_pb14 &sdmmc2_d1_pb15 &sdmmc2_d2_pb3 &sdmmc2_d3_pb4 &sdmmc2_ck_pd6 &sdmmc2_cmd_pa0 >; pinctrl-names = "default"; /* 如果沒有 Card Detect，可以移除這行 */ cd-gpios = <&gpioi 8 GPIO_ACTIVE_LOW>; disk-name = "SD"; }; // &clk_hse { // clock-frequency = <DT_FREQ_M(25)>; // status = "okay"; // }; // &clk_hsi48 { // status = "okay"; // }; // &pll { // div-m = <5>; // mul-n = <0xa0>; // div-p = <2>; // div-q = <4>; // div-r = <2>; // clocks = <&clk_hse>; // status = "okay"; // }; // &pll2 { // div-m = <5>; // mul-n = <96>; // div-p = <2>;//ori div-p = <2>; // div-q = <4>; // div-r = <10>; // clocks = <&clk_hse>; /* Assuming 25MHz HSE */ // status = "okay"; // };