hxn0216@163.com 发表于 2024-12-3 09:51 [md]![2.png](data/attachment/forum/202412/03/095112moz8kidtziyzzt0x.png?imageMogr2/auto-orient/strip ... 从提示上看,应该是访问越界了,可以参考M4核的手册。 如果不改变存贮和运行方式,可以尝试修改MPU。 参考 ARM 关于 Cortex-M4 内核 IACCVIOL 位的说明. ], L* F/ }; k2 P- k! j) G Instruction access violation flag:! U, \6 w) ?5 s7 G( p' t 0 = no instruction access violation fault, l O y6 ^) H 1 = the processor attempted an instruction fetch from a location that does not permit execution. The PC value stacked for the exception return points to the faulting instruction. The processor has not written a fault address to the MMAR. This fault condition occurs on any access to an XN (eXecute Never) region, even when the MPU is disabled or not present. Potential reasons: a) Branch to regions that are not defined in the MPU or defined as non-executable. b) Invalid return due to corrupted stack content. c) Incorrect entry in the exception vector table
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