目前已验证异核通信最大传输字节为256、512、1024、2048字节。当我测试最大传输4096字节时，仿佛被限制异核通信最大传输字节仅到2048字节，请问这是为什么呢？以下是我用来测试传输4096字节用到的内核（6.1.82版本）内存分配设备树，和相关文件修改内容。麻烦帮我看看，非常感谢！ 内核内存分配设备树： ipc_shmem_1: ipc-shmem-1@81200000 { compatible = "shared-dma-pool"; reg = <0x0 0x81200000 0x0 0xc0000>; no-map; }; vdev0vring0: vdev0vring0@812c0000 { compatible = "shared-dma-pool"; reg = <0x0 0x812c0000 0x0 0x1000>; no-map; }; vdev0vring1: vdev0vring1@812c1000 { compatible = "shared-dma-pool"; reg = <0x0 0x812c1000 0x0 0x1000>; no-map; }; vdev0buffer: vdev0buffer@812c2000 { compatible = "shared-dma-pool"; reg = <0x0 0x812c2000 0x0 0x3e000>; no-map; }; 内核rpmsg buffer size控制文件：drivers/rpmsg/virtio_rpmsg_bus.c #define MAX_RPMSG_BUF_SIZE (4096) M33 SDK 的DDR配置文件：Drivers/CMSIS/Device/ST/STM32MP2xx/Source/Templates/gcc/linker/stm32mp2xx_DDR_m33_ns.ld _virtio_shmem_size = 256K; /* size of the virtio pool used for RPMsg communication */ M33 SDK 的rpmsg通信大小文件：rpmsg_virtio.h /* Configurable parameters */ #ifndef RPMSG_BUFFER_SIZE #define RPMSG_BUFFER_SIZE (4096) #endif
你好，板子上电后默认首先启动的就是A核，我理解你那边是想在U-Boot 阶段启动M核对不？如果是请参考Wiki How to start the coprocessor from the bootloader - stm32mpu (stmicroelectronics.cn)。
这边是不是因为使用的DDR不一样，你们使用的DDR大小是不是256M的，如果是的可以工具如下的Patch修改试试：*************************************************************PROCESS to modify the software configuration for DDR 256 mo *************************************************************Based on a 521 Mo configuration, board STM32MP135F-DK board.Updates executed on the openstinux-22-07-27DDR mapping on 512mo configuration0xE0000000 (end optee fw/TZDRAM)0xde200000 (DDR_SEC_BASE/TZDRAM_START size 1e00000 protected by TZC 400, deb optee fw .text , DDR encrypted DDRMCE size 1e00000)0xde000000 (SHMEM_START size 200000 no secure, optee mem size 2000000)0**000000 (framebuffer protected access by DDR TZC size 1000000)0xC0000000 (DDR non secure)DDR mapping on 256mo configuration0xD0000000 (end optee fw/TZDRAM)0xcfc00000 (DDR_SEC_BASE/TZDRAM_START size 400000 protected by TZC 400, deb optee fw .txt, DDR encrypted DDRMCE size 400000)0xcfb00000 (SHMEM_START size 10000 no secure , optee mem size 500000) 0xceb00000 (framebuffer protected access by DDR TZC size 1000000)0xC0000000 (DDR non secure) ****************TF-A updates :******************** fdts/stm32mp13-fw-config.dtsi ****#define DDR_NS_BASE STM32MP_DDR_BASE/*#define DDR_SEC_SIZE 0x01e00000*/#define DDR_SEC_SIZE 0x00400000/*#define DDR_SHARE_SIZE 0x00200000*/#define DDR_SHARE_SIZE 0x00100000**** fdts/stm32mp135f-dk-fw-config.dts *****/*#define DDR_SIZE 0x20000000*/ /* 512MB */#define DDR_SIZE 0x10000000plat/st/stm32mp1/stm32mp1_fip_def.h/*#define STM32MP_DDR_S_SIZE U(0x01E00000)*/ /* 30 MB *//*#define STM32MP_DDR_SHMEM_SIZE U(0x00200000)*/ /* 2 MB */#define STM32MP_DDR_S_SIZE U(0x00400000) #define STM32MP_DDR_SHMEM_SIZE U(0x00100000)***************OPTEE updates :******************* core/arch/arm/plat-stm32mp1/conf.mk ****ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-512M)),)#CFG_DRAM_SIZE ?= 0x20000000CFG_DRAM_SIZE ?= 0x10000000endifCFG_DRAM_BASE ?= 0xc0000000CFG_TZSRAM_START ?= 0x2ffc0000CFG_TZSRAM_SIZE ?= 0x0003f000CFG_STM32MP1_SCMI_SHM_BASE ?= 0x2ffff000CFG_STM32MP1_SCMI_SHM_SIZE ?= 0x00001000#CFG_TZDRAM_SIZE ?= 0x01e00000CFG_TZDRAM_SIZE ?= 0x00400000#CFG_SHMEM_SIZE ?= 0x00200000CFG_SHMEM_SIZE ?= 0x00100000*****************UBOOT updates ********************* arch/arm/dts/stm32mp135f-dk.dts ***** memory@c0000000 { device_type = "memory"; /*reg = <0xc0000000 0x20000000>;*/ reg = <0xc0000000 0x10000000>; }; reserved-memory { #address-cells = <1>; #size-cells = <1>; ranges;/* optee_framebuffer@dd000000 { reg = <0**000000 0x1000000>; no-map; };*/ optee_framebuffer@ceb00000 { reg = <0xceb00000 0x1000000>; no-map; };/* optee@de000000 { reg = <0xde000000 0x2000000>; no-map; };*/ optee@cfb00000 { reg = <0xcfb00000 0x00500000>; no-map; }; };**** !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! ******** !!!! it is a workaround NOT NEEDED WITH REAL DDR 250Mo !!!! ******* arch/arm/mach-stm32mp/dram_init.c ****int dram_init(void){ /*gd->ram_size = ram.size;*/ gd->ram_size = SZ_256M; return 0;}****************LINUX updates****************modified: arch/arm/boot/dts/stm32mp135f-dk.dts memory@c0000000 { device_type = "memory"; /*reg = <0xc0000000 0x20000000>;*/ reg = <0xc0000000 0x10000000>; }; reserved-memory { #address-cells = <1>; #size-cells = <1>; ranges;/* optee_framebuffer@dd000000 { reg = <0**000000 0x1000000>; no-map; };*/ optee_framebuffer@ceb00000 { reg = <0xceb00000 0x1000000>; no-map; };/* optee@de000000 { reg = <0xde000000 0x2000000>; no-map; };*/ optee@cfb00000 { reg = <0xcfb00000 0x00500000>; no-map; }; };
