
网络控制寄存器(00H) Loopback Mode Bit 2 1 0 0 Normal 0 1 MAC Internal loopback 1 0 Internal PHY 100M mode digital loopback 1 1 (Reserved) PHY基本模式控制寄存器(offset:00) Loopback Loop-back control register 1 = Loop-back enabled 0 = Normal operation When in 100Mbps operation mode, setting this bit may cause the descrambler to lose synchronization and produce a 720ms "dead time" before receive 这两个寄存器怎样设置,如果把IP的源地址和目的地址设置的相等,数据部分为0,从链路层发出的MAC帧,是否能够被自己接收?如果不能的话,这两个寄存器的具体用法是怎样的? |