问题：在使用定时器输出PWM时，假如此时关闭PWM的输出，其IO口会出现高低电平交替出现的情况！1.代码设置：TIM2->CCER2寄存器设置的是输出使能和输出有效电平为低电平；

1. /* Disable the Channel 1: Reset the CCE Bit, Set the Output State, the Output Polarity(low) */
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2.         TIM2->CCER2 &= (uint8_t)(~( TIM2_CCER2_CC3E  | TIM2_CCER2_CC3P));
   
3.         /* Set the Output State & Set the Output Polarity */
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4.         TIM2->CCER2 |= (uint8_t)((uint8_t)(0x11 & TIM2_CCER2_CC3E) | (uint8_t)(0x02 & TIM2_CCER2_CC3P));
   
5.         /* Reset the Output Compare Bits & Set the Output Compare Mode(PWM1) */
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6.         TIM2->CCMR3 = (uint8_t)((uint8_t)(TIM2->CCMR3 & (uint8_t)(~TIM2_CCMR_OCM)) |<font color="#ff0000"> (uint8_t)0x60</font>);

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2.停止输出PWN：先使能定时器，然后强制输出为有效电平；
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1. /* Disable timer2 */
   
2.     TIM2->CR1 &= (uint8_t)(~TIM2_CR1_CEN);
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3.         /* Reset the OCM Bits & Configure the Forced output Mode */
   
4.         TIM2->CCMR3  =        (uint8_t)((uint8_t)(TIM2->CCMR3 & (uint8_t)(~TIM2_CCMR_OCM)) | <font color="#ff0000">(uint8_t)0x50</font>);

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3.重新启动定时器输出PWM：重新配置位输出PWM1模式，启动定时器

1. /* Reset the OCM Bits & Configure the Forced output Mode */
   
2.                                                 TIM2->CCMR3  =        (uint8_t)((uint8_t)(TIM2->CCMR3 & (uint8_t)(~TIM2_CCMR_OCM)) | <font color="#ff0000">(uint8_t)0x60</font>);
   
3.                                                 TIM2->CR1 |= (uint8_t)TIM2_CR1_CEN;                 //产生pwm

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4.至于上面红色的设置关键字：
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楼主这个是求助还是分享啊，没看懂

分享啊