6.1.2.3 Parameter passing
c; X/ B1 q. S+ h! vThere is one VFP co-processor register class using registers s0-s15 (d0-d7) for passing arguments.
! Q2 { P8 v& }+ oThe following co-processor rules are defined for the VFP: 8 d/ u' [, X, E2 ?% h' _
A.2.vfp The floating point argument registers are marked as unallocated.
) r P' `- V" e, VB.3.vfp Nothing to do. ! d+ S: A; f) f% `* J: [3 e$ C
C.1.vfp If the argument is a VFP CPRC and there are sufficient consecutive VFP registers of the appropriate * k) x0 Z! `4 f1 B; {- a
type unallocated then the argument is allocated to the lowest-numbered sequence of such registers.
5 h6 k: u$ x* f* h9 bC.2.vfp If the argument is a VFP CPRC then any VFP registers that are unallocated are marked as
: _+ X4 h& O+ n, Aunavailable. The NSAA is adjusted upwards until it is correctly aligned for the argument and the ) k0 K8 ?# Q6 X/ N8 x( g
argument is copied to the stack at the adjusted NSAA. The NSAA is further incremented by the size
# r! o, Q8 Y8 T! m* z4 ~% W6 Aof the argument. The argument has now been allocated. + S2 d9 ?0 o, q$ S' N q
Note that the rules require the ‘back-filling’ of unused co-processor registers that are skipped by the alignment 9 V& d2 F% s- ]3 f& K) w
constraints of earlier# B. e0 C) ^5 c5 H! W( z! @( [
测试一下:" t7 E# R8 k: ~" M1 i
- float PP_TETS
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2 c% ^$ B- ?* s/ }. f - float s0,
+ z" f j$ N1 L" @1 j* ^ - float s1,. u, t: Y5 s }) H" m$ I
- float s2,
3 b2 H7 ]2 s. i. t8 ~ - float s3,
# o D! N/ U" j; p i) H - float s4,
G2 o) T/ @8 @2 L% L- S r* ? - float s5,5 \# c) w+ \0 X5 K, K
- float s6,( x$ s2 h4 \ o* e
- float s7,' R+ _, X2 R" U( Z; k8 D3 b* b) D
- float s8,
% [* v [+ U; n$ H: r6 F - float s9,
% V% z) \& x7 o. I0 p4 d, I - float s10,
5 D# ^9 V. u& m5 W! ?6 A0 L0 b - float s11,
! D, X4 m$ F3 R. u8 O, P - float s12,8 a" g& s% u* n3 D" L
- float s13,9 z4 J$ Y9 _$ ^/ g
- float s14,
: Z! {+ J3 y" m3 \4 J5 d ~% O - float s15,7 y' ^6 m9 ]7 b+ ^2 _# s% V7 ^
- int r0,0 P W8 R: k8 y' E( G
- int r1,
/ M+ k q: a: g' h: ` - int r2,( P& Z5 v7 c7 s. U
- int r3- C* Z) w m5 E+ u# E
- )( V" ~: ]7 G4 O4 P- v
- {
" U" Z0 q. x7 _4 v( g+ C - r0+=r1;( c! }, c( k3 g+ T$ S6 v @
- r0+=r2;* R" F: m4 V8 e- h# H* c
- r0+=r3;% R7 M$ i' G, [" m0 C
- if(r0)
6 i2 m" [6 K T6 {4 x; a6 \* x - {
, l% B% B8 ^3 t- x! x - s0+=s1;+ R1 A+ ^5 h! U5 Y1 f% e
- s0+=s2;
& }3 D, F( [! ]; r- z$ o9 v" C - s0+=s3;
5 {+ b- g# m( Y* Z - s0+=s4;8 u1 x; K$ r' a% o$ b6 f e1 k
- s0+=s5;' g, z/ g8 V0 t# ], \
- s0+=s6;$ p9 q8 s, M. Z6 ^
- s0+=s7;" y+ ^; x# @9 g8 v D9 N
- s0+=s8;
. r9 h& A6 @, g- e9 {+ P( L - s0+=s9;& r: N1 _* X. m
- s0+=s10;
" q# i! g4 l. }& ] B, e - s0+=s11;' m- y! k% C2 T; \* j" o. P: o
- s0+=s12;% G5 W& L9 l: ]5 v0 N& ?
- s0+=s13;
. z" K! m; G- K1 [' i+ d9 }' j* E - s0+=s14;
0 @7 u( p# j# I$ w - s0+=s15;
- m0 w( ?$ k6 S6 y( X) Q6 n' v - }
0 A5 D3 l. e0 \; w# M: x - return s0;# m. z% z4 ^; R+ l" T
- }
复制代码
8 Q; |5 m7 E- V6 ^ V 编译结果:
0 c) i% h; ]: b8 q; O# s$ ]- O- ER_IROM1:080002FC C) D# x" D+ K4 t% S3 B
- ER_IROM1:080002FC ; =============== S U B R O U T I N E =======================================1 W% v1 o; J6 R- v
- ER_IROM1:080002FC
9 e0 k. ^' \' E. Z1 O - ER_IROM1:080002FC
1 M B4 m3 Y5 y% H8 O6 s - ER_IROM1:080002FC ; PP_TETS(float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, int, int, int, int)& `0 U0 a: l6 o+ i; Y2 \
- ER_IROM1:080002FC EXPORT _Z7PP_TETSffffffffffffffffiiii
2 O \- Y' g, n; [ i& k - ER_IROM1:080002FC _Z7PP_TETSffffffffffffffffiiii
6 l. L2 f) E9 } - ER_IROM1:080002FC PUSH {R4,LR}
7 `. C) }$ E n% Z; j - ER_IROM1:080002FE VPUSH {D8}
9 Y: i- h* U. f - ER_IROM1:08000302 ADD R0, R1( P+ `1 a( @- t: t$ e+ R/ J5 s
- ER_IROM1:08000304 ADD R0, R27 ~4 [" {1 u; I2 l- R
- ER_IROM1:08000306 ADD R0, R3* ]% q5 B( ~2 M4 M9 V
- ER_IROM1:08000308 CBZ R0, loc_8000382: M$ l/ {5 K! j0 F
- ER_IROM1:0800030A VADD.F32 S16, S0, S14 L5 e* d1 _# A
- ER_IROM1:0800030E VMOV.F32 S0, S16
+ N9 {. v3 i% { - ER_IROM1:08000312 VADD.F32 S16, S0, S2' h1 ]: Z0 ]( s& s
- ER_IROM1:08000316 VMOV.F32 S0, S16
* Z" ^0 L! l% g' E# T. I! z - ER_IROM1:0800031A VADD.F32 S16, S0, S3, e( X6 z; v, e# F1 `% M
- ER_IROM1:0800031E VMOV.F32 S0, S16
7 O. ?! c$ [8 k8 E" ~ - ER_IROM1:08000322 VADD.F32 S16, S0, S4
, d5 w) V* V4 } - ER_IROM1:08000326 VMOV.F32 S0, S16
2 }' f; u1 L! g; G - ER_IROM1:0800032A VADD.F32 S16, S0, S5: l- O" Q4 T: x4 H, ~/ d$ a& B4 v
- ER_IROM1:0800032E VMOV.F32 S0, S16
; f( s6 r* {4 T0 e7 C/ q3 e - ER_IROM1:08000332 VADD.F32 S16, S0, S6
: C! X( g$ b9 W+ g& L* c3 S - ER_IROM1:08000336 VMOV.F32 S0, S16
7 z5 B) n; r5 s - ER_IROM1:0800033A VADD.F32 S16, S0, S74 z+ k9 i1 [9 A' {) g
- ER_IROM1:0800033E VMOV.F32 S0, S16- L: ]! c3 i" Y- M1 T, \9 O7 r
- ER_IROM1:08000342 VADD.F32 S16, S0, S8
3 M( x( ^, I! P3 R6 y4 ?+ P - ER_IROM1:08000346 VMOV.F32 S0, S16
2 W' h: i- R' r; Z0 Z9 n; s {! i7 x( U - ER_IROM1:0800034A VADD.F32 S16, S0, S9
G- h& i1 r9 O- E2 \/ U' b' A - ER_IROM1:0800034E VMOV.F32 S0, S16
, t6 s0 h: ~! G) \3 | - ER_IROM1:08000352 VADD.F32 S16, S0, S107 r: _' n$ G& L% X$ Q8 j% z
- ER_IROM1:08000356 VMOV.F32 S0, S16
# C. H! F" r" W - ER_IROM1:0800035A VADD.F32 S16, S0, S11
`( s, k/ z& K3 @* q5 k: }3 } - ER_IROM1:0800035E VMOV.F32 S0, S16. J/ ^' n* G6 D' s0 D
- ER_IROM1:08000362 VADD.F32 S16, S0, S12
- s+ Z4 g" ] H5 N- T+ _ - ER_IROM1:08000366 VMOV.F32 S0, S16
+ D* G p3 E+ ?/ u; y - ER_IROM1:0800036A VADD.F32 S16, S0, S13
5 [- N# o7 E8 B* T: j - ER_IROM1:0800036E VMOV.F32 S0, S16
3 f9 n4 e! B, [2 k$ k( M0 O7 Y - ER_IROM1:08000372 VADD.F32 S16, S0, S14- \ P3 G4 @% _, ^8 C, ~0 h$ A
- ER_IROM1:08000376 VMOV.F32 S0, S16$ \1 Y W' u7 n2 T, ~! M+ C- ~
- ER_IROM1:0800037A VADD.F32 S16, S0, S15% t$ e! N" o) j l
- ER_IROM1:0800037E VMOV.F32 S0, S16- e D2 l n+ i8 N0 c, V4 B
- ER_IROM1:080003820 l$ L- }& R' h# ?3 s4 t8 T* S
- ER_IROM1:08000382 loc_8000382 ; CODE XREF: PP_TETS(float,float,float,float,float,float,float,float,float,float,float,float,float,float,float,float,int,int,int,int)+Cj( p" L/ O+ T; N" q: _
- ER_IROM1:08000382 VPOP {D8}6 @4 v: T2 P: P
- ER_IROM1:08000386 POP {R4,PC}2 E8 |- t- O7 S5 o9 { F. U
- ER_IROM1:08000386 ; End of function PP_TETS(float,float,float,float,float,float,float,float,float,float,float,float,float,float,float,float,int,int,int,int)
复制代码
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4 G, d3 y1 |6 P, Y6 j" e 3 ]0 u/ j9 Y- K, U! V
THE END ...! r0 J1 M% f* B$ l
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发出来咋成这模样了
谢谢指点,测试下5 C) ~$ w7 m+ v( T* v f+ h0 C
c代码中是怎么做到让s0就是S0寄存器的?貌似没打看懂啊。
我用的IDA6.6。; m$ M! p3 q, |- I
, v1 p- b% t9 x2 ?2 `
c代码s0与汇编s0寄存器本没有关系的。8 p" @/ j+ _$ f _
只是一般C函数(实际上我用的是cpp),
使用fpu,第一个float参数以s0寄存器传参,
第二个float用s1,以此类推。" r; E" y9 `: e/ l$ }9 i" K
返回值(float) 用s0 w6 g5 B1 ^" k8 C3 S
返回值(int) 用r0
以上个人观点
可以参考:
Procedure Call Standard for the ARM® Architecture
http://infocenter.arm.com/help/t ... /IHI0042E_aapcs.pdf
学习了。9 i ^) q' _ J: }/ v2 P
第一个参数不是R0传递,一直到R3吗?4个往上的参数不是使用栈传递啊。没大搞懂。在看看那个链接。
你是搞反汇编的吗?
一开始我也这么想的。但是我隐隐的感觉到这种做法效率不好。8 k) s4 x8 q# ?/ t2 q
于是具体看了下函数的实现,怎么优化的。。
另外,我是搞正向开发的。
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何以见得
看你用IDA,动不动就反汇编。。。