#define __HAL_AFIO_REMAP_TIM2_PARTIAL_1() do{ CLEAR_BIT(AFIO->MAPR, AFIO_MAPR_TIM2_REMAP); \
! Z* u( x9 W, uSET_BIT(AFIO->MAPR, AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1); \
}while(0U)

CUBEMX version4.22.1

used stm32f103vct6

调试模式是sw MAPR寄存器不能直接读   直接读写回去导致sw掉线

Bits 26:24 SWJ_CFG[2:0]: Serial wire JTAG configuration
These bits are write-only (when read, the value is undefined
). They are used to configure the
SWJ and trace alternate function I/Os. The SWJ (Serial Wire JTAG) supports JTAG or SWD
access to the Cortex debug port. The default state after reset is SWJ ON without trace. This
/ g7 M1 i/ \. [5 b/ nallows JTAG or SW mode to be enabled by sending a specific sequence on the JTMS /
JTCK pin.
000: Full SWJ (JTAG-DP + SW-DP): Reset State
  r5 f6 g# G+ E0 U+ E6 c, t001: Full SWJ (JTAG-DP + SW-DP) but without NJTRST
$ G3 c8 s( U) W$ ]* g1 J7 [/ v010: JTAG-DP Disabled and SW-DP Enabled
100: JTAG-DP Disabled and SW-DP Disabled
Other combinations: no effect

+ I4 E- `. C  m+ U; d6 ]

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