在cubeide中，用cubemx产生stm32g474re LL库的初始代码中，ADC1和ADC2配成独立工作，但是在MX_ADC2_Init(void)中，这两句是错的  LL_ADC_DisableDeepPowerDown(ADC1);
( a7 a) H; I  Z9 i/ L. P  LL_ADC_EnableInternalRegulator(ADC1);

2 s: b) s7 ]( `9 O( `& o$ r将导致ADC2不供电，无法工作，每次都要手工改过来才能正常工作。

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6 r+ I. y& @6 v; O  * @brief ADC2 Initialization Function
  * @param None
  * @retval None
  */
! k7 T2 _. g% Zstatic void MX_ADC2_Init(void)
{

& X% _/ Z8 O/ @/ \  /* USER CODE BEGIN ADC2_Init 0 */

  /* USER CODE END ADC2_Init 0 */
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( ~6 ]0 j; b% x$ {- {$ k  LL_ADC_InitTypeDef ADC_InitStruct = {0};
  LL_ADC_REG_InitTypeDef ADC_REG_InitStruct = {0};

. g2 N7 e; r: S# W1 @/ ]/ ~  /* Peripheral clock enable */
  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_ADC12);

  /* ADC2 DMA Init */
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0 _; H0 S7 R3 R: [  /* ADC2 Init */
  LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_1, LL_DMAMUX_REQ_ADC2);

& {& n$ |/ Y  B  LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);

- `2 G3 s( ]) `  LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PRIORITY_MEDIUM);
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2 B5 {7 \5 T/ V4 [  LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MODE_NORMAL);

4 O# u9 _* g7 O( b  \8 \* U, u4 b- r  LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PERIPH_NOINCREMENT);

2 b6 K) ?+ N! r. L' j  K: M  LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MEMORY_INCREMENT);
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  LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PDATAALIGN_WORD);
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  LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MDATAALIGN_HALFWORD);
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  /* USER CODE BEGIN ADC2_Init 1 */

' y2 P' H; `( C% W0 ?5 t) w  /* USER CODE END ADC2_Init 1 */
  /** Common config
  */
  ADC_InitStruct.Resolution = LL_ADC_RESOLUTION_12B;
  ADC_InitStruct.DataAlignment = LL_ADC_DATA_ALIGN_LEFT;
4 m- u  }5 N* H; z3 l  ADC_InitStruct.LowPowerMode = LL_ADC_LP_MODE_NONE;
  LL_ADC_Init(ADC2, &ADC_InitStruct);
" y  P! J! Y: q$ O  ADC_REG_InitStruct.TriggerSource = LL_ADC_REG_TRIG_EXT_TIM8_TRGO;
+ v. N7 K" j4 Y$ p  ADC_REG_InitStruct.SequencerLength = LL_ADC_REG_SEQ_SCAN_DISABLE;
  ADC_REG_InitStruct.SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;
  ADC_REG_InitStruct.ContinuousMode = LL_ADC_REG_CONV_SINGLE;
  ADC_REG_InitStruct.DMATransfer = LL_ADC_REG_DMA_TRANSFER_UNLIMITED;
  ADC_REG_InitStruct.Overrun = LL_ADC_REG_OVR_DATA_OVERWRITTEN;
  LL_ADC_REG_Init(ADC2, &ADC_REG_InitStruct);
  LL_ADC_SetGainCompensation(ADC2, 0);
. b/ S  ?9 D) c: |+ Z' c, Q  LL_ADC_SetOverSamplingScope(ADC2, LL_ADC_OVS_DISABLE);

, u0 H6 Q0 o$ I5 t0 b& }" X  /* Disable ADC deep power down (enabled by default after reset state) */
  LL_ADC_DisableDeepPowerDown(ADC1);
  T, q& j7 {+ V! f  /* Enable ADC internal voltage regulator */
( q* J, p2 O. z7 _: t  C9 S6 g3 U9 ]  LL_ADC_EnableInternalRegulator(ADC1);
! `+ V( J8 [7 d  /* Delay for ADC internal voltage regulator stabilization. */
8 F! \. N9 K2 D% W  /* Compute number of CPU cycles to wait for, from delay in us. */
3 h% @" `  f$ T3 B" Z2 A- L  /* Note: Variable divided by 2 to compensate partially */
  /* CPU processing cycles (depends on compilation optimization). */
/ R6 k- Y- {' J' f% ~! }+ l  /* Note: If system core clock frequency is below 200kHz, wait time */
  /* is only a few CPU processing cycles. */
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) Q, C+ z* o4 W0 F* n* \, @  uint32_t wait_loop_index;
  wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US * (SystemCoreClock / (100000 * 2))) / 10);
  while(wait_loop_index != 0)
- S% _- i, ~6 i5 e2 Z# x  t6 y: E  {
3 R7 R  t0 j, q8 P. B    wait_loop_index--;
  }
  LL_ADC_REG_SetTriggerEdge(ADC2, LL_ADC_REG_TRIG_EXT_RISING);
  /** Configure Regular Channel
8 n. N' L( T& J1 J0 p  */
: D8 Y& B8 M+ n/ w; T  LL_ADC_REG_SetSequencerRanks(ADC2, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_VOPAMP3_ADC2);
1 K8 B# V5 ^3 d/ U5 n& s5 d3 J1 }  LL_ADC_SetChannelSamplingTime(ADC2, LL_ADC_CHANNEL_VOPAMP3_ADC2, LL_ADC_SAMPLINGTIME_6CYCLES_5);
  LL_ADC_SetChannelSingleDiff(ADC2, LL_ADC_CHANNEL_VOPAMP3_ADC2, LL_ADC_SINGLE_ENDED);
  LL_ADC_SetOffset(ADC2, LL_ADC_OFFSET_1, LL_ADC_CHANNEL_VOPAMP3_ADC2, 0);
! J: U, ^4 T* s1 D4 J- r  LL_ADC_SetOffsetSign(ADC2, LL_ADC_OFFSET_1, LL_ADC_OFFSET_SIGN_NEGATIVE);
  LL_ADC_SetOffsetSaturation(ADC2, LL_ADC_OFFSET_1, LL_ADC_OFFSET_SATURATION_DISABLE);
  /* USER CODE BEGIN ADC2_Init 2 */
  LL_ADC_StartCalibration(ADC2, LL_ADC_SINGLE_ENDED);
  while (LL_ADC_IsCalibrationOnGoing(ADC2) != 0)  { };
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  wait_loop_index = (ADC_DELAY_CALIB_ENABLE_CPU_CYCLES >> 1);
  while(wait_loop_index != 0)
  {
    wait_loop_index--;
  }
  /* Enable ADC */
) C- F: ?* B6 i% O5 e9 k' O  LL_ADC_Enable(ADC2);
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  /* Poll for ADC ready to convert */
& p& M3 j/ @9 J& J( y  while (LL_ADC_IsActiveFlag_ADRDY(ADC2) == 0)         { };
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: K0 R5 _3 n2 k2 w8 d5 x! b( m  w  /* USER CODE END ADC2_Init 2 */
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