用STM32MP157D-DK1为基础修改了以下补丁文件的内容，全都是设备树，并附上了所有修改的文件。所用的PIMC不是STPMIC，是EA3056QDR，应该已经调好了。DDR是一个MT41K256M16TW-107-P-V00H，和STM32MP157D-DK1的原理图一样，log文件如下，打印完就卡死了。卡在tf-a-stm32mp-v2.8.6-stm32mp-r1\bl2\bl2_main.c文件中bl2_run_next_image(next_bl_ep_info)，bl2_run_next_image函数位于tf-a-stm32mp-v2.8.6-stm32mp-r1\bl2\aarch32\bl2_run_next_image.S

NOTICE:  CPU: STM32MP157DAD Rev.Z
NOTICE:  Model: STMicroelectronics STM32MP157D-DK1 Discovery Board
INFO:    Reset reason (0x15):
INFO:      Power-on Reset (rst_por)
INFO:    FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000
INFO:    FCONF: Reading firmware configuration information for: stm32mp_io
INFO:    Using SDMMC
INFO:      Instance 1
INFO:    Boot used partition fsbl1
NOTICE:  BL2: v2.8-stm32mp1-r1.0(debug):2d65b91-dirty(2d65b919)
NOTICE:  BL2: Built : 06:47:33, Sep  8 2023
INFO:    BL2: Doing platform setup
INFO:    RAM: DDR3-DDR3L 16bits 533000kHz
INFO:    Memory size = 0x20000000 (512 MB)
INFO:    BL2: Loading image id 1
INFO:    Loading image id=1 at address 0x2ffff000
INFO:    Image id=1 loaded: 0x2ffff000 - 0x2ffff1ea
INFO:    FCONF: Reading FW_CONFIG firmware configuration file from: 0x2ffff000
INFO:    FCONF: Reading firmware configuration information for: dyn_cfg
INFO:    FCONF: Reading firmware configuration information for: stm32mp1_firewall
INFO:    BL2: Loading image id 4
INFO:    Loading image id=4 at address 0xde000000
INFO:    Image id=4 loaded: 0xde000000 - 0xde00001c
INFO:    OPTEE ep=0xde000000
INFO:    OPTEE header info:
INFO:          magic=0x4554504f
INFO:          version=0x2
INFO:          arch=0x0
INFO:          flags=0x0
INFO:          nb_images=0x1
INFO:    BL2: Loading image id 8
INFO:    Loading image id=8 at address 0xde000000
INFO:    Image id=8 loaded: 0xde000000 - 0xde036b68
INFO:    BL2: Skip loading image id 9
INFO:    BL2: Loading image id 2
INFO:    Loading image id=2 at address 0xc0500000
INFO:    Image id=2 loaded: 0xc0500000 - 0xc051ee40
INFO:    BL2: Skip loading image id 16
INFO:    BL2: Loading image id 5
INFO:    Loading image id=5 at address 0xc0100000
INFO:    Image id=5 loaded: 0xc0100000 - 0xc01f5d3c
NOTICE:  BL2: Booting BL32
INFO:    Entry point address = 0xde000000
INFO:    SPSR = 0x1d3

补丁文件

From 2d65b919c8ce2adf9475c4618577347d2d39dd6a Mon Sep 17 00:00:00 2001
From: ZhangZhiWei <[email]527115855@qq.com[/email]>
Date: Fri, 8 Sep 2023 13:19:40 +0800
Subject: [PATCH 1/2] modify uart, pmic, .gitignore

---
 .gitignore                      |  1 +
 fdts/stm32mp15-pinctrl.dtsi     | 13 ++++++++
 fdts/stm32mp157d-dk1.dts        |  2 +-
 fdts/stm32mp15xx-dkx.dtsi       | 53 +++++++++++++++++++++++++++++----
 plat/st/stm32mp1/stm32mp1_def.h |  2 +-
 5 files changed, 63 insertions(+), 8 deletions(-)

diff --git a/.gitignore b/.gitignore
index 1f4efb6..09542c5 100644
--- a/.gitignore
+++ b/.gitignore
@@ -49,3 +49,4 @@ node_modules/
 env/
 .venv/
 venv/
+*.pyc
diff --git a/fdts/stm32mp15-pinctrl.dtsi b/fdts/stm32mp15-pinctrl.dtsi
index a1be447..a8c14fb 100644
--- a/fdts/stm32mp15-pinctrl.dtsi
+++ b/fdts/stm32mp15-pinctrl.dtsi
@@ -298,6 +298,19 @@
        };
    };

+   usart1_pins_a: usart1-0 {
+       pins1 {
+           pinmux = <STM32_PINMUX('G', 11, AF4)>; /* USART1_TX */
+           bias-disable;
+           drive-push-pull;
+           slew-rate = <0>;
+       };
+       pins2 {
+           pinmux = <STM32_PINMUX('B', 2, AF4)>; /* USART1_RX */
+           bias-disable;
+       };
+   };
+
    usart2_pins_a: usart2-0 {
        pins1 {
            pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
diff --git a/fdts/stm32mp157d-dk1.dts b/fdts/stm32mp157d-dk1.dts
index 2b7dde5..f5bd5b0 100644
--- a/fdts/stm32mp157d-dk1.dts
+++ b/fdts/stm32mp157d-dk1.dts
@@ -17,7 +17,7 @@
    compatible = "st,stm32mp157d-dk1", "st,stm32mp157";

    aliases {
-       serial0 = &uart4;
+       serial0 = &usart1;
        serial1 = &usart3;
        serial2 = &uart7;
    };
diff --git a/fdts/stm32mp15xx-dkx.dtsi b/fdts/stm32mp15xx-dkx.dtsi
index d00ca51..4219eab 100644
--- a/fdts/stm32mp15xx-dkx.dtsi
+++ b/fdts/stm32mp15xx-dkx.dtsi
@@ -13,12 +13,47 @@
        reg = <0xc0000000 0x20000000>;
    };

-   vin: vin {
+   /*vin: vin {
        compatible = "regulator-fixed";
        regulator-name = "vin";
        regulator-min-microvolt = <5000000>;
        regulator-max-microvolt = <5000000>;
        regulator-always-on;
+   };*/
+   vddcore: regulator-vddcore {
+       compatible = "regulator-fixed";
+       regulator-name = "vddcore";
+       regulator-min-microvolt = <1200000>;
+       regulator-max-microvolt = <1350000>;
+       regulator-off-in-suspend;
+       regulator-always-on;
+   };
+
+   v3v3: regulator-3p3v {
+       compatible = "regulator-fixed";
+       regulator-name = "v3v3";
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-off-in-suspend;
+       regulator-always-on;
+   };
+
+   vdd: regulator-vdd {
+       compatible = "regulator-fixed";
+       regulator-name = "vdd";
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-off-in-suspend;
+       regulator-always-on;
+   };
+
+   vdd_usb: regulator-vdd-usb {
+       compatible = "regulator-fixed";
+       regulator-name = "vdd_usb";
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-off-in-suspend;
+       regulator-always-on;
    };
 };

@@ -53,7 +88,7 @@
    clock-frequency = <400000>;
    status = "okay";

-   pmic: stpmic@33 {
+   /*pmic: stpmic@33 {
        compatible = "st,stpmic1";
        reg = <0x33>;
        interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
@@ -174,7 +209,7 @@
                regulator-active-discharge = <1>;
            };
        };
-   };
+   };*/
 };

 &iwdg1 {
@@ -327,7 +362,7 @@
 &uart4 {
    pinctrl-names = "default";
    pinctrl-0 = <&uart4_pins_a>;
-   status = "okay";
+   status = "disabled";
 };

 &uart7 {
@@ -336,11 +371,17 @@
    status = "disabled";
 };

+&usart1 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&usart1_pins_a>;
+   status = "okay";
+};
+
 &usart3 {
    pinctrl-names = "default";
-   pinctrl-0 = <&usart3_pins_c>;
+   pinctrl-0 = <&usart3_pins_a>;
    uart-has-rtscts;
-   status = "disabled";
+   status = "okay";
 };

 &usbotg_hs {
diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h
index d564cc8..bab63c8 100644
--- a/plat/st/stm32mp1/stm32mp1_def.h
+++ b/plat/st/stm32mp1/stm32mp1_def.h
@@ -692,7 +692,7 @@ static inline uintptr_t tamp_bkpr(uint32_t idx)
 /* 3 PWR + 1 VREFBUF + 14 PMIC regulators + 1 FIXED */
 #define PLAT_NB_RDEVS          U(19)
 /* 2 FIXED */
-#define PLAT_NB_FIXED_REGUS        U(2)
+#define PLAT_NB_FIXED_REGUS        U(6)
 /* No GPIO regu */
 #define PLAT_NB_GPIO_REGUS     U(0)

-- 
2.34.1

stm32mp157d-dk1.dts

// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
 * Author: Alexandre Torgue <[email]alexandre.torgue@foss.st.com[/email]> for STMicroelectronics.
 */

/dts-v1/;

#include "stm32mp157.dtsi"
#include "stm32mp15xd.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include "stm32mp15xx-dkx.dtsi"

/ {
    model = "STMicroelectronics STM32MP157D-DK1 Discovery Board";
    compatible = "st,stm32mp157d-dk1", "st,stm32mp157";

    aliases {
        serial0 = &usart1;
        serial1 = &usart3;
        serial2 = &uart7;
    };

    chosen {
        stdout-path = "serial0:115200n8";
    };
};

stm32mp15xx-dkx.dtsi

// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (c) 2019-2023, STMicroelectronics - All Rights Reserved
 * Author: Alexandre Torgue <[email]alexandre.torgue@st.com[/email]> for STMicroelectronics.
 */

#include <dt-bindings/clock/stm32mp1-clksrc.h>
#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"

/ {
    memory@c0000000 {
        device_type = "memory";
        reg = <0xc0000000 0x20000000>;
    };

    /*vin: vin {
        compatible = "regulator-fixed";
        regulator-name = "vin";
        regulator-min-microvolt = <5000000>;
        regulator-max-microvolt = <5000000>;
        regulator-always-on;
    };*/
    vddcore: regulator-vddcore {
        compatible = "regulator-fixed";
        regulator-name = "vddcore";
        regulator-min-microvolt = <1200000>;
        regulator-max-microvolt = <1350000>;
        regulator-off-in-suspend;
        regulator-always-on;
    };

    v3v3: regulator-3p3v {
        compatible = "regulator-fixed";
        regulator-name = "v3v3";
        regulator-min-microvolt = <3300000>;
        regulator-max-microvolt = <3300000>;
        regulator-off-in-suspend;
        regulator-always-on;
    };

    vdd: regulator-vdd {
        compatible = "regulator-fixed";
        regulator-name = "vdd";
        regulator-min-microvolt = <3300000>;
        regulator-max-microvolt = <3300000>;
        regulator-off-in-suspend;
        regulator-always-on;
    };

    vdd_usb: regulator-vdd-usb {
        compatible = "regulator-fixed";
        regulator-name = "vdd_usb";
        regulator-min-microvolt = <3300000>;
        regulator-max-microvolt = <3300000>;
        regulator-off-in-suspend;
        regulator-always-on;
    };
};

&bsec {
    board_id: board_id@ec {
        reg = <0xec 0x4>;
        st,non-secure-otp;
    };
};

&clk_hse {
    st,digbypass;
};

&cpu0 {
    cpu-supply = <&vddcore>;
};

&cpu1 {
    cpu-supply = <&vddcore>;
};

&hash1 {
    status = "okay";
};

&i2c4 {
    pinctrl-names = "default";
    pinctrl-0 = <&i2c4_pins_a>;
    i2c-scl-rising-time-ns = <185>;
    i2c-scl-falling-time-ns = <20>;
    clock-frequency = <400000>;
    status = "okay";

    /*pmic: stpmic@33 {
        compatible = "st,stpmic1";
        reg = <0x33>;
        interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
        interrupt-controller;
        #interrupt-cells = <2>;
        status = "okay";

        regulators {
            compatible = "st,stpmic1-regulators";
            buck1-supply = <&vin>;
            buck2-supply = <&vin>;
            buck3-supply = <&vin>;
            buck4-supply = <&vin>;
            ldo1-supply = <&v3v3>;
            ldo2-supply = <&vin>;
            ldo3-supply = <&vdd_ddr>;
            ldo4-supply = <&vin>;
            ldo5-supply = <&vin>;
            ldo6-supply = <&v3v3>;
            vref_ddr-supply = <&vin>;
            boost-supply = <&vin>;
            pwr_sw1-supply = <&bst_out>;
            pwr_sw2-supply = <&bst_out>;

            vddcore: buck1 {
                regulator-name = "vddcore";
                regulator-min-microvolt = <1200000>;
                regulator-max-microvolt = <1350000>;
                regulator-always-on;
                regulator-initial-mode = <0>;
                regulator-over-current-protection;
            };

            vdd_ddr: buck2 {
                regulator-name = "vdd_ddr";
                regulator-min-microvolt = <1350000>;
                regulator-max-microvolt = <1350000>;
                regulator-always-on;
                regulator-initial-mode = <0>;
                regulator-over-current-protection;
            };

            vdd: buck3 {
                regulator-name = "vdd";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                regulator-always-on;
                st,mask-reset;
                regulator-initial-mode = <0>;
                regulator-over-current-protection;
            };

            v3v3: buck4 {
                regulator-name = "v3v3";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                regulator-always-on;
                regulator-over-current-protection;
                regulator-initial-mode = <0>;
            };

            v1v8_audio: ldo1 {
                regulator-name = "v1v8_audio";
                regulator-min-microvolt = <1800000>;
                regulator-max-microvolt = <1800000>;
                regulator-always-on;
            };

            v3v3_hdmi: ldo2 {
                regulator-name = "v3v3_hdmi";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                regulator-always-on;
            };

            vtt_ddr: ldo3 {
                regulator-name = "vtt_ddr";
                regulator-always-on;
                regulator-over-current-protection;
                st,regulator-sink-source;
            };

            vdd_usb: ldo4 {
                regulator-name = "vdd_usb";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
            };

            vdda: ldo5 {
                regulator-name = "vdda";
                regulator-min-microvolt = <2900000>;
                regulator-max-microvolt = <2900000>;
                regulator-boot-on;
            };

            v1v2_hdmi: ldo6 {
                regulator-name = "v1v2_hdmi";
                regulator-min-microvolt = <1200000>;
                regulator-max-microvolt = <1200000>;
                regulator-always-on;
            };

            vref_ddr: vref_ddr {
                regulator-name = "vref_ddr";
                regulator-always-on;
            };

            bst_out: boost {
                regulator-name = "bst_out";
            };

            vbus_otg: pwr_sw1 {
                regulator-name = "vbus_otg";
            };

            vbus_sw: pwr_sw2 {
                regulator-name = "vbus_sw";
                regulator-active-discharge = <1>;
            };
        };
    };*/
};

&iwdg1 {
    timeout-sec = <32>;
    status = "okay";
};

&pwr_regulators {
    vdd-supply = <&vdd>;
    vdd_3v3_usbfs-supply = <&vdd_usb>;
};

&rcc {
    compatible = "st,stm32mp1-rcc-secure", "st,stm32mp1-rcc", "syscon";
    st,clksrc = <
        CLK_MPU_PLL1P
        CLK_AXI_PLL2P
        CLK_MCU_PLL3P
        CLK_RTC_LSE
        CLK_MCO1_DISABLED
        CLK_MCO2_DISABLED
        CLK_CKPER_HSE
        CLK_FMC_ACLK
        CLK_QSPI_ACLK
        CLK_ETH_PLL4P
        CLK_SDMMC12_PLL4P
        CLK_DSI_DSIPLL
        CLK_STGEN_HSE
        CLK_USBPHY_HSE
        CLK_SPI2S1_PLL3Q
        CLK_SPI2S23_PLL3Q
        CLK_SPI45_HSI
        CLK_SPI6_HSI
        CLK_I2C46_HSI
        CLK_SDMMC3_PLL4P
        CLK_USBO_USBPHY
        CLK_ADC_CKPER
        CLK_CEC_LSE
        CLK_I2C12_HSI
        CLK_I2C35_HSI
        CLK_UART1_HSI
        CLK_UART24_HSI
        CLK_UART35_HSI
        CLK_UART6_HSI
        CLK_UART78_HSI
        CLK_SPDIF_PLL4P
        CLK_FDCAN_PLL4R
        CLK_SAI1_PLL3Q
        CLK_SAI2_PLL3Q
        CLK_SAI3_PLL3Q
        CLK_SAI4_PLL3Q
        CLK_RNG1_CSI
        CLK_RNG2_LSI
        CLK_LPTIM1_PCLK1
        CLK_LPTIM23_PCLK3
        CLK_LPTIM45_LSE
    >;

    st,clkdiv = <
        DIV(DIV_MPU, 1)
        DIV(DIV_AXI, 0)
        DIV(DIV_MCU, 0)
        DIV(DIV_APB1, 1)
        DIV(DIV_APB2, 1)
        DIV(DIV_APB3, 1)
        DIV(DIV_APB4, 1)
        DIV(DIV_APB5, 2)
        DIV(DIV_RTC, 23)
        DIV(DIV_MCO1, 0)
        DIV(DIV_MCO2, 0)
    >;

    st,pll_vco {
        pll2_vco_1066Mhz: pll2-vco-1066Mhz {
            src = <CLK_PLL12_HSE>;
            divmn = <2 65>;
            frac = <0x1400>;
        };

        pll3_vco_417Mhz: pll3-vco-417Mhz {
            src = <CLK_PLL3_HSE>;
            divmn = <1 33>;
            frac = <0x1a04>;
        };

        pll4_vco_594Mhz: pll4-vco-594Mhz {
            src = <CLK_PLL4_HSE>;
            divmn = <3 98>;
        };
    };

    /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
    pll2: st,pll@1 {
        compatible = "st,stm32mp1-pll";
        reg = <1>;

        st,pll = <&pll2_cfg1>;

        pll2_cfg1: pll2_cfg1 {
            st,pll_vco = <&pll2_vco_1066Mhz>;
            st,pll_div_pqr = <1 0 0>;
        };
    };

    /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
    pll3: st,pll@2 {
        compatible = "st,stm32mp1-pll";
        reg = <2>;

        st,pll = <&pll3_cfg1>;

        pll3_cfg1: pll3_cfg1 {
            st,pll_vco = <&pll3_vco_417Mhz>;
            st,pll_div_pqr = <1 16 36>;
        };
    };

    /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
    pll4: st,pll@3 {
        compatible = "st,stm32mp1-pll";
        reg = <3>;

        st,pll = <&pll4_cfg1>;

        pll4_cfg1: pll4_cfg1 {
            st,pll_vco = <&pll4_vco_594Mhz>;
            st,pll_div_pqr = <5 7 7>;
        };
    };
};

&rng1 {
    status = "okay";
};

&rtc {
    status = "okay";
};

&sdmmc1 {
    pinctrl-names = "default";
    pinctrl-0 = <&sdmmc1_b4_pins_a>;
    disable-wp;
    st,neg-edge;
    bus-width = <4>;
    vmmc-supply = <&v3v3>;
    status = "okay";
};

&uart4 {
    pinctrl-names = "default";
    pinctrl-0 = <&uart4_pins_a>;
    status = "disabled";
};

&uart7 {
    pinctrl-names = "default";
    pinctrl-0 = <&uart7_pins_c>;
    status = "disabled";
};

&usart1 {
    pinctrl-names = "default";
    pinctrl-0 = <&usart1_pins_a>;
    status = "okay";
};

&usart3 {
    pinctrl-names = "default";
    pinctrl-0 = <&usart3_pins_a>;
    uart-has-rtscts;
    status = "okay";
};

&usbotg_hs {
    phys = <&usbphyc_port1 0>;
    phy-names = "usb2-phy";
    usb-role-switch;
    status = "okay";
};

&usbphyc {
    status = "okay";
};

&usbphyc_port0 {
    phy-supply = <&vdd_usb>;
};

&usbphyc_port1 {
    phy-supply = <&vdd_usb>;
};

stm32mp15-pinctrl.dtsi

// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (c) 2017-2023, STMicroelectronics - All Rights Reserved
 * Author: Ludovic Barre <[email]ludovic.barre@st.com[/email]> for STMicroelectronics.
 */
#include <dt-bindings/pinctrl/stm32-pinfunc.h>

&pinctrl {
    fmc_pins_a: fmc-0 {
        pins1 {
            pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
                 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
                 <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
                 <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
                 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
                 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
                 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
                 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
                 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
                 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
                 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
                 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
                 <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
            bias-disable;
            drive-push-pull;
            slew-rate = <1>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
            bias-pull-up;
        };
    };

    i2c2_pins_a: i2c2-0 {
        pins {
            pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
                 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
            bias-disable;
            drive-open-drain;
            slew-rate = <0>;
        };
    };

    qspi_clk_pins_a: qspi-clk-0 {
        pins {
            pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
            bias-disable;
            drive-push-pull;
            slew-rate = <3>;
        };
    };

    qspi_bk1_pins_a: qspi-bk1-0 {
        pins1 {
            pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
                 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
                 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
                 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
            bias-disable;
            drive-push-pull;
            slew-rate = <1>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
            bias-pull-up;
            drive-push-pull;
            slew-rate = <1>;
        };
    };

    qspi_bk2_pins_a: qspi-bk2-0 {
        pins1 {
            pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
                 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
                 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
                 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
            bias-disable;
            drive-push-pull;
            slew-rate = <1>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
            bias-pull-up;
            drive-push-pull;
            slew-rate = <1>;
        };
    };

    sdmmc1_b4_pins_a: sdmmc1-b4-0 {
        pins1 {
            pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
                 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
                 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
                 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
                 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
            slew-rate = <1>;
            drive-push-pull;
            bias-disable;
        };
        pins2 {
            pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
            slew-rate = <2>;
            drive-push-pull;
            bias-disable;
        };
    };

    sdmmc1_dir_pins_a: sdmmc1-dir-0 {
        pins1 {
            pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
                 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
                 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
            slew-rate = <1>;
            drive-push-pull;
            bias-pull-up;
        };
        pins2 {
            pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
            bias-pull-up;
        };
    };

    sdmmc1_dir_pins_b: sdmmc1-dir-1 {
        pins1 {
            pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
                 <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
                 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
            slew-rate = <1>;
            drive-push-pull;
            bias-pull-up;
        };
        pins2{
            pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
            bias-pull-up;
        };
    };

    sdmmc2_b4_pins_a: sdmmc2-b4-0 {
        pins1 {
            pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
                 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
                 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
                 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
                 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
            slew-rate = <1>;
            drive-push-pull;
            bias-pull-up;
        };
        pins2 {
            pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
            slew-rate = <2>;
            drive-push-pull;
            bias-pull-up;
        };
    };

    sdmmc2_b4_pins_b: sdmmc2-b4-1 {
        pins1 {
            pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
                 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
                 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
                 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
                 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
            slew-rate = <1>;
            drive-push-pull;
            bias-disable;
        };
        pins2 {
            pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
            slew-rate = <2>;
            drive-push-pull;
            bias-disable;
        };
    };

    sdmmc2_d47_pins_a: sdmmc2-d47-0 {
        pins {
            pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
                 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
                 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
                 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
            slew-rate = <1>;
            drive-push-pull;
            bias-pull-up;
        };
    };

    sdmmc2_d47_pins_b: sdmmc2-d47-1 {
        pins {
            pinmux = <STM32_PINMUX('A', 8, AF9)>,  /* SDMMC2_D4 */
                 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
                 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
                 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
            slew-rate = <1>;
            drive-push-pull;
            bias-disable;
        };
    };

    sdmmc2_d47_pins_c: sdmmc2-d47-2 {
        pins {
            pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
                 <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
                 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
                 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
            slew-rate = <1>;
            drive-push-pull;
            bias-pull-up;
        };
    };

    sdmmc2_d47_pins_d: sdmmc2-d47-3 {
        pins {
            pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
                 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
                 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
                 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
        };
    };

    uart4_pins_a: uart4-0 {
        pins1 {
            pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
            bias-disable;
        };
    };

    uart4_pins_b: uart4-1 {
        pins1 {
            pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
            bias-disable;
        };
    };

    uart7_pins_a: uart7-0 {
        pins1 {
            pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
                 <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
                 <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
            bias-disable;
        };
    };

    uart7_pins_b: uart7-1 {
        pins1 {
            pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
            bias-disable;
        };
    };

    uart7_pins_c: uart7-2 {
        pins1 {
            pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
            bias-disable;
        };
    };

    uart8_pins_a: uart8-0 {
        pins1 {
            pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
            bias-disable;
        };
    };

    usart1_pins_a: usart1-0 {
        pins1 {
            pinmux = <STM32_PINMUX('G', 11, AF4)>; /* USART1_TX */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('B', 2, AF4)>; /* USART1_RX */
            bias-disable;
        };
    };

    usart2_pins_a: usart2-0 {
        pins1 {
            pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
                 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
                 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
            bias-disable;
        };
    };

    usart2_pins_b: usart2-1 {
        pins1 {
            pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
                 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
                 <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
            bias-disable;
        };
    };

    usart2_pins_c: usart2-2 {
        pins1 {
            pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
                 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
            bias-disable;
            drive-push-pull;
            slew-rate = <3>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
                 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
            bias-disable;
        };
    };

    usart3_pins_a: usart3-0 {
        pins1 {
            pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
            bias-disable;
        };
    };

    usart3_pins_b: usart3-1 {
        pins1 {
            pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
                 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
                 <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
            bias-disable;
        };
    };

    usart3_pins_c: usart3-2 {
        pins1 {
            pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
                 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
                 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
            bias-disable;
        };
    };

    usbotg_hs_pins_a: usbotg-hs-0 {
        pins {
            pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
        };
    };

    usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
        pins {
            pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
                 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
        };
    };
};

&pinctrl_z {
    i2c4_pins_a: i2c4-0 {
        pins {
            pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
                 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
            bias-disable;
            drive-open-drain;
            slew-rate = <0>;
        };
    };
};

从描述看，用的是256M的DDR，但是DDR配置并没有做对应的修改。

FW_CONFIG文件需要重新定义。