STM32F0 单片机使用内部RC振荡器作为系统，软件修改
系统上电复位后，
运行如下

1. ; Reset handler routine
   
2. Reset_Handler PROC
   
3. EXPORT Reset_Handler [WEAK]
   
4. IMPORT __main
   
5. IMPORT SystemInit
   
6. LDR R0, =SystemInit
   
7. BLX R0
   
8. LDR R0, =__main
   
9. BX R0
   
10. ENDP

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然后进入 system_stm32f0xx.c 文件
在SystemInit函数里有 SetSysClock(); ，我们修改这个函数即可

1. void SystemInit (void)
   
2. {
   
3. /* Set HSION bit */
   
4. RCC->CR |= (uint32_t)0x00000001;
   
5. 
   
6. #if defined (STM32F031) || defined (STM32F072) || defined (STM32F042)
   
7. /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits /
   
8. RCC->CFGR &= (uint32_t)0xF8FFB80C;
   
9. #else
   
10. / Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, MCOSEL[2:0], MCOPRE[2:0] and PLLNODIV bits /
    
11. RCC->CFGR &= (uint32_t)0x08FFB80C;
    
12. #endif / STM32F031*/
    
13. 
    
14. /* Reset HSEON, CSSON and PLLON bits */
    
15. RCC->CR &= (uint32_t)0xFEF6FFFF; //1111 1110 1111 0110 1111 1111 1111 1111
    
16. 
    
17. /* Reset HSEBYP bit */
    
18. RCC->CR &= (uint32_t)0xFFFBFFFF;
    
19. 
    
20. /* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
    
21. RCC->CFGR &= (uint32_t)0xFFC0FFFF;
    
22. 
    
23. /* Reset PREDIV1[3:0] bits */
    
24. RCC->CFGR2 &= (uint32_t)0xFFFFFFF0;
    
25. 
    
26. /* Reset USARTSW[1:0], I2CSW, CECSW and ADCSW bits */
    
27. RCC->CFGR3 &= (uint32_t)0xFFFFFEAC;
    
28. 
    
29. /* Reset HSI14 bit */
    
30. RCC->CR2 &= (uint32_t)0xFFFFFFFE;
    
31. 
    
32. /* Disable all interrupts */
    
33. RCC->CIR = 0x00000000;
    
34. 
    
35. /* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */
    
36. SetSysClock();
    
37. }

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在文件system_stm32f0xx.c下修改static void SetSysClock(void)
如下：

1. static void SetSysClock(void)
   
2. {
   
3. __IO uint32_t StartUpCounter = 0, HSIStatus = 0;
   
4. 
   
5. /* SYSCLK, HCLK, PCLK configuration ----------------------------------------/
   
6. / Enable HSI*/
   
7. RCC->CR |= ((uint32_t)RCC_CR_HSION); //RCC_CR_HSION,RCC_CR_HSEON
   
8. 
   
9. /* Wait till HSE is ready and if Time out is reached exit */
   
10. do
    
11. {
    
12. HSIStatus = RCC->CR & RCC_CR_HSIRDY;
    
13. StartUpCounter++;
    
14. } while((HSIStatus == 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT));
    
15. 
    
16. if ((RCC->CR & RCC_CR_HSIRDY) != RESET)
    
17. {
    
18. HSIStatus = (uint32_t)0x01;
    
19. }
    
20. else
    
21. {
    
22. HSIStatus = (uint32_t)0x00;
    
23. }
    
24. 
    
25. if (HSIStatus == (uint32_t)0x01)
    
26. {
    
27. /* Enable Prefetch Buffer and set Flash Latency */
    
28. FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;
    
29. 
    
30. /* HCLK = SYSCLK */
    
31. RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
    
32. 
    
33. /* PCLK = HCLK */
    
34. RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;
    
35. 
    
36. /* PLL configuration = HSE * 6 = 48 MHz */
    
37. RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
    
38. RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2  | RCC_CFGR_PLLMULL12);
    
39. 
    
40. /* Enable PLL */
    
41. RCC->CR |= RCC_CR_PLLON;
    
42. 
    
43. /* Wait till PLL is ready */
    
44. while((RCC->CR & RCC_CR_PLLRDY) == 0)
    
45. {
    
46. }
    
47. 
    
48. /* Select PLL as system clock source */
    
49. RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
    
50. RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;   
    
51. 
    
52. /* Wait till PLL is used as system clock source */
    
53. while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
    
54. {
    
55. }
    
56. 
    
57. }
    
58. else
    
59. { /* If HSE fails to start-up, the application will have wrong clock
    
60. configuration. User can add here some code to deal with this error */
    
61. }
    
62. }

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