STM32F0 单片机使用内部RC振荡器作为系统，软件修改
系统上电复位后，
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1. ; Reset handler routine
   
2. Reset_Handler PROC
   
3. EXPORT Reset_Handler [WEAK]
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4. IMPORT __main
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5. IMPORT SystemInit
   
6. LDR R0, =SystemInit
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7. BLX R0
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8. LDR R0, =__main
   
9. BX R0
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10. ENDP

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然后进入 system_stm32f0xx.c 文件
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1. void SystemInit (void)
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2. {
   
3. /* Set HSION bit */
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4. RCC->CR |= (uint32_t)0x00000001;
   
5. 
   
6. #if defined (STM32F031) || defined (STM32F072) || defined (STM32F042)
   
7. /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits /
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8. RCC->CFGR &= (uint32_t)0xF8FFB80C;
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9. #else
   
10. / Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, MCOSEL[2:0], MCOPRE[2:0] and PLLNODIV bits /
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11. RCC->CFGR &= (uint32_t)0x08FFB80C;
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12. #endif / STM32F031*/
    
13. 
    
14. /* Reset HSEON, CSSON and PLLON bits */
    
15. RCC->CR &= (uint32_t)0xFEF6FFFF; //1111 1110 1111 0110 1111 1111 1111 1111
    
16. 
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17. /* Reset HSEBYP bit */
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18. RCC->CR &= (uint32_t)0xFFFBFFFF;
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19. 
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20. /* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
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21. RCC->CFGR &= (uint32_t)0xFFC0FFFF;
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22. 
    
23. /* Reset PREDIV1[3:0] bits */
    
24. RCC->CFGR2 &= (uint32_t)0xFFFFFFF0;
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25. 
    
26. /* Reset USARTSW[1:0], I2CSW, CECSW and ADCSW bits */
    
27. RCC->CFGR3 &= (uint32_t)0xFFFFFEAC;
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28. 
    
29. /* Reset HSI14 bit */
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30. RCC->CR2 &= (uint32_t)0xFFFFFFFE;
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31. 
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32. /* Disable all interrupts */
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33. RCC->CIR = 0x00000000;
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34. 
    
35. /* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */
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36. SetSysClock();
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37. }

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. k8 y  ?4 p5 |/ @; W/ o在文件system_stm32f0xx.c下修改static void SetSysClock(void)
如下：

1. static void SetSysClock(void)
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2. {
   
3. __IO uint32_t StartUpCounter = 0, HSIStatus = 0;
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4. 
   
5. /* SYSCLK, HCLK, PCLK configuration ----------------------------------------/
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6. / Enable HSI*/
   
7. RCC->CR |= ((uint32_t)RCC_CR_HSION); //RCC_CR_HSION,RCC_CR_HSEON
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8. 
   
9. /* Wait till HSE is ready and if Time out is reached exit */
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10. do
    
11. {
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12. HSIStatus = RCC->CR & RCC_CR_HSIRDY;
    
13. StartUpCounter++;
    
14. } while((HSIStatus == 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT));
    
15. 
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16. if ((RCC->CR & RCC_CR_HSIRDY) != RESET)
    
17. {
    
18. HSIStatus = (uint32_t)0x01;
    
19. }
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20. else
    
21. {
    
22. HSIStatus = (uint32_t)0x00;
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23. }
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24. 
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25. if (HSIStatus == (uint32_t)0x01)
    
26. {
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27. /* Enable Prefetch Buffer and set Flash Latency */
    
28. FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;
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29. 
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30. /* HCLK = SYSCLK */
    
31. RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
    
32. 
    
33. /* PCLK = HCLK */
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34. RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;
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35. 
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36. /* PLL configuration = HSE * 6 = 48 MHz */
    
37. RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
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38. RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2  | RCC_CFGR_PLLMULL12);
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39. 
    
40. /* Enable PLL */
    
41. RCC->CR |= RCC_CR_PLLON;
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42. 
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43. /* Wait till PLL is ready */
    
44. while((RCC->CR & RCC_CR_PLLRDY) == 0)
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45. {
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46. }
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47. 
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48. /* Select PLL as system clock source */
    
49. RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
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50. RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;   
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51. 
    
52. /* Wait till PLL is used as system clock source */
    # [3 g8 f! Z) h/ K3 X: C6 K
53. while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
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54. {
    
55. }
    
56. 
    
57. }
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58. else
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59. { /* If HSE fails to start-up, the application will have wrong clock
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60. configuration. User can add here some code to deal with this error */
    
61. }
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62. }

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