首先说明一下芯片内部并没有时钟, 而是内部振荡。" v" o4 T1 D1 X% V( \' c# Z* r. t; }
使用内部振荡的好处是外部无需设计晶振电路 ,再说的简单点 ,不用外部晶振依然可以让单片机正常运转。+ j9 p+ J$ J) j# t
书归正传 直接开始配置
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8 s" e8 p; z% p/ e U5 c W打开任意keli工程
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( \! J. ~1 }+ A7 j. K打开system_stm32f10x.c
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找到systeminit函数 全部注释掉
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8 O/ H+ ^0 i m& _; \# }然后在下面粘贴以下代码(这段代码来自CSDN的一位大佬,我不是原作者)
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直接替换就可以用了
9 u3 O# f% s" C) b7 [; V- #define USE_HSI 1 // 是否使用内部晶振 0 不使用 1使用2 ?- W; {, y4 ]. d! h8 d
- void SystemInit ( void )
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- $ M, C3 N5 B/ W; { W
- #if USE_HSI
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/ v- F5 D& Y2 c6 d J: E - //设置使用内部晶振9 {! @4 `" G! A4 U" O. {4 |3 B! ]
- /* 开启HSI 即内部晶振时钟 */
( p. R% @4 r, }4 S4 o. {9 L - RCC->CR |= ( uint32_t ) 0x00000001;1 v. Y* _) O0 e% }: ~
- /*选择HSI为PLL的时钟源HSI必须2分频给PLL*/* g6 Z g* i+ _. S5 Z6 U) |4 B
- RCC->CFGR |= ( uint32_t ) RCC_CFGR_PLLSRC_HSI_Div2;
) ]7 K% A$ I c0 I) x* q% r1 O - /*PLLCLK=8/2*9=36MHz 设置倍频得到时钟源PLL的频率*/
0 x' g1 F2 \; ^' M/ B - RCC->CFGR |= ( uint32_t ) RCC_CFGR_PLLMULL6; //设置倍频后的频率7 E* q' E! P: `$ x$ L% I) w
- /* PLL不分频输出 ?*/
* a" g( ]+ c1 Z - RCC->CFGR |= ( uint32_t ) RCC_CFGR_HPRE_DIV1;
% O( |- ^0 I- m3 t8 i! C - /* 使能 PLL时钟 */
* Y* e J' l( u& p) q - RCC->CR |= RCC_CR_PLLON;
, G' Z! H( X$ O6 A* ]+ d - /* 等待PLL时钟就绪*/+ T/ ^) O0 u% s0 W! l
- while ( ( RCC->CR & RCC_CR_PLLRDY ) == 0 )' P, R+ R' u- `1 z1 q- B
- {
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3 S K6 @% n8 t( T - /* 选择PLL为系统时钟的时钟源 */
/ n5 ]# ?( c* ?2 Z3 R: P - RCC->CFGR &= ( uint32_t ) ( ( uint32_t ) ~ ( RCC_CFGR_SW ) );7 \: l2 {8 V x& V
- RCC->CFGR |= ( uint32_t ) RCC_CFGR_SW_PLL;: L- a3 \, Z% l% [( A
- /* 等到PLL成为系统时钟的时钟源*/3 H# \4 w" @$ D
- while ( ( RCC->CFGR & ( uint32_t ) RCC_CFGR_SWS ) != ( uint32_t ) 0x08 )
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- #else+ n# k% _% y' Y0 ?1 }
- {
C5 U& [# P" C% M/ Y/ F - //设置使用外部8M晶振
5 P! u" G- A3 ?# Z. b. ? - /* Reset the RCC clock configuration to the default reset state(for debug purpose) */) M- F" q- c/ q6 |: N
- /* Set HSION bit */! z( M1 i# E: h* w. Z: j
- RCC->CR |= ( uint32_t ) 0x00000001;
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- /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
+ E1 G# x& w: B, u' E3 `# ~ - #ifndef STM32F10X_CL, Y# O( v) J/ Z# a' P
- RCC->CFGR &= ( uint32_t ) 0xF8FF0000;' e9 ?5 S8 L: h( q
- #else
$ ^! k M, r4 w, F. s - RCC->CFGR &= ( uint32_t ) 0xF0FF0000;, V& [ p8 A) F0 U/ j; M/ I
- #endif /* STM32F10X_CL */. y4 E0 J. F; M+ S5 I4 i* }2 r* O9 l1 B
4 A: R/ A1 i' [" t9 f- A+ f- i- /* Reset HSEON, CSSON and PLLON bits */
9 q' c& U) M7 v& j) n - RCC->CR &= ( uint32_t ) 0xFEF6FFFF;( C! Z( b$ v" u3 z; \
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- /* Reset HSEBYP bit */
: l M. g; y- S1 I - RCC->CR &= ( uint32_t ) 0xFFFBFFFF;
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) n* q* w. w. E) K {- /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */7 ^+ v! |0 d+ p7 r# Q2 }& X t
- RCC->CFGR &= ( uint32_t ) 0xFF80FFFF;: C' X) a4 F" p) ?
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- #ifdef STM32F10X_CL, K1 l: c6 q J6 o
- /* Reset PLL2ON and PLL3ON bits */
6 G6 W& L O# d, M0 `: I6 s - RCC->CR &= ( uint32_t ) 0xEBFFFFFF;7 N( v' ~, g4 P8 F7 k% o/ @* s
5 q! G( O' J6 O7 O" y- /* Disable all interrupts and clear pending bits */
3 ^3 [! o# g0 d7 R- c3 I4 Z - RCC->CIR = 0x00FF0000;
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- /* Reset CFGR2 register */
* a# ]" Y) H" \6 q5 V - RCC->CFGR2 = 0x00000000;+ M- b, p1 @! v5 q D
- #elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
! g& C5 ?; G! a/ s1 R6 \ - /* Disable all interrupts and clear pending bits */- E) B% m" m& [; a
- RCC->CIR = 0x009F0000;
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" |% w& `/ l+ O6 ^8 Z0 B" Y- /* Reset CFGR2 register *// n% ~) }1 U1 J6 A% x( A" L& d, l/ {- l
- RCC->CFGR2 = 0x00000000;
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- /* Disable all interrupts and clear pending bits */' E7 ^# u! L8 g1 ^. X7 t% l
- RCC->CIR = 0x009F0000;* q' ?2 K# |& j; C$ S: Q2 g
- #endif /* STM32F10X_CL */8 M$ s/ p) V9 K& o$ [ I% k
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- #if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)
$ S* N* W7 _, a" R - #ifdef DATA_IN_ExtSRAM
. ]' X# h8 I. v3 `8 J - SystemInit_ExtMemCtl();
/ u# I# W. M" v( o+ _; s - #endif /* DATA_IN_ExtSRAM */
- j/ I* Q+ I0 |. c - #endif1 ]4 {/ Y, ^5 G$ B9 o" g0 _
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- /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */4 @4 G9 V3 ]- P8 B# o, _; ~ ^9 Y
- /* Configure the Flash Latency cycles and enable prefetch buffer */
9 [, m" F! W* R3 u" u/ T$ X( g$ c$ @( x - SetSysClock();9 b- X0 _1 U# k! P# H0 B0 k
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- #ifdef VECT_TAB_SRAM! v- H6 E3 D: _
- SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
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1 X8 V8 ?# Z# Y+ y( x* @ - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */$ `4 H! d) h, Y! p6 k
- #endif
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复制代码
]1 ^5 O! u! b7 F! T然后我简单拉高/低是试了一下引脚的电压 是正常的 大家可以去试试
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