Introduction
The STM32MP151, STM32MP153 and STM32MP157 devices are part of the STM32 Arm® Cortex® MPUs subclass; they all feature a Cortex®-M4 and depending on the part number, either a single-core or a dual-core Cortex®-A7. These devices are referred to as STM32MP15x in this document.
The Cortex®-M4 inside the STM32MP15x devices is compatible (for STM32Cube package) with the STM32F469/479 line devices. This compatibility permits an easy migration from an STM32F469/479 design to a similar device from the STM32MP15x lines and to benefit from their significantly higher integration and their advanced peripherals without adding any
additional complexity.
The STM32MP15x high performance Cortex®-A7 runs open operating systems like Linux, which provides rich connectivity and the support of a software community.
This application note provides information to facilitate the migration from an STM32F469/479 design towards an STM32MP15x design.


1 STM32MP15x lines overview
The STM32MP15x devices are part of the STM32MP1 Series. Depending on the device’s part number,the system includes a Cortex®-M4 and either a single-core or a dual-core Cortex®-A7.
The full featured system (see the table below) is partitioned in:
• One MPU subsystem: dual Cortex-A7 with L2 cache
• One MCU subsystem: Cortex-M4 with associated peripherals clocked according to CPU activity






The STM32MP15x lines offer extra performance compared to the STM32F469/479 devices.
The STM32MP15x devices include a larger set of peripherals with advanced features and higher system integration compared to the STM32F469/479 devices such as:
• Dual-core Arm® Cortex®-A7 subsystem
• 3D graphic processing unit (GPU)
• External LPDDR2/LPDDR3/DDR3/DDR3L 16- or 32-bit interface
• Security related peripherals (ETZPC, TZC, BSEC, OTP)
• Gigabit Ethernet MAC interface (ETH1)
• FD controller area network (FDCAN1/FDCAN2) including one TTCAN
• Voltage reference buffer (VREFBUF)
• SPDIF receiver interface (SPDIFRX)
• High-definition multimedia interface - consumer electronics control (HDMI-CEC)
• Universal serial bus high-speed host with two ports (USBH)
• Two embedded USB 2.0 High-Speed PHY (USBPHYCTRL)
• Digital filter for sigma-delta modulators (DFSDM1)
• 8- to 16-bit analog-to-digital converters (ADC1/ADC2)
• DMAMUX extension to DMA1/DMA2
• Master direct memory access (MDMA)
• Hardware semaphore (HSEM)
• Low-power timer (LPTIM1/LPTIM2/LPTIM3/LPTIM4/LPTIM5)
• Digital temperature sensor (DTS)
This migration guide covers the migration from STM32F469/479 towards STM32MP15x devices. The new features present on the STM32MP15x lines but not already present on the STM32F469/479 line are not covered in this document (refer to the STM32MP15x lines reference manuals and datasheets for more details).
There are some features available on STM32F469/479 line that are not present in the SMT32MP15x lines. These features are listed below:
• DMA2D
• Internal Flash
This document applies to Arm®-based devices.
Note: Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.


2Hardware migration
There is no exact compatible package between SM32F469/479 line and STM32MP15x lines, but a good candidate for migration towards an STM32MP15x device can be chosen by considering the following criteria:
• GPIO: minimum number of available GPIOs. Precise count should be done for each application use case.
• Size: the package size (from 10×10 to 18×18)
• PCB: the PCB technology cost (TFBGA pitch 0.5 or LFBGA pitch 0.8)
• Perf (performance): the DDR bus width (16- or 32-bit) which is linked to the maximum Cortex-A7 performances.
The table below presents a cross reference to assist the user to choose the closest migration candidate in number of GPIO, but also according to some different criteria priority (smallest package size or lowest PCB cost or best performances).







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