#include "main.h"
#include "dma.h"
#include "i2s.h"
#include "usart.h"
#include "usb_device.h"
#include "gpio.h"
#include "FIFO.h"
#include "usbd_cdc_if.h"

uint32_t dma[4];
uint32_t val24[2];
int val32[2];
fifo_s_t *g_i2s_dma_recv_fifo = NULL;

void SystemClock_Config(void);

void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
{
if(hi2s==&hi2s1){

for(int i=0;i < 2;i++){   
        val24=(dma[2*i]<<8)+(dma[2*i+1]>>8);

        if(val24 & 0x800000){//negative
                val32=0xff000000 | val24;
        }else{//positive
                val32=val24;
        
        }

}
        if (!fifo_s_isfull(g_i2s_dma_recv_fifo)) {
            fifo_s_puts(g_i2s_dma_recv_fifo, (char*)val32, sizeof(val32));

}
}
}

int main(void)
{

HAL_Init();
SystemClock_Config();
MX_GPIO_Init();
MX_DMA_Init();
MX_I2S1_Init();
MX_USB_DEVICE_Init();
MX_USART1_UART_Init();

if (g_i2s_dma_recv_fifo != NULL) {
fifo_s_destroy(g_i2s_dma_recv_fifo);
}
g_i2s_dma_recv_fifo = fifo_s_create(480);

if (!g_i2s_dma_recv_fifo) {
    printf("fifo cre failed.\n");
    return -1;
}
HAL_I2S_Receive_DMA(&hi2s1, (uint16_t *)dma, 4);
while (1)
{
/* USER CODE END WHILE */
    if (!fifo_s_isempty(g_i2s_dma_recv_fifo)) {
        char res[16] = {'\0'};
        if (fifo_s_gets(g_i2s_dma_recv_fifo, res, sizeof(res)) > 0) {
         CDC_Transmit_FS((uint8_t*)res, sizeof(res));
                                       
        }
    }

/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 15;
RCC_OscInitStruct.PLL.PLLN = 144;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
RCC_OscInitStruct.PLL.PLLQ = 5;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}

/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
{
Error_Handler();
}
}

void Error_Handler(void)
{

__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT

void assert_failed(uint8_t *file, uint32_t line)
{

}

#endif /* USE_FULL_ASSERT */