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感谢管理“Seven”，因为工作原因不能实地参加STM32的深圳会议，在seven管理的热心组织下，通过线上直播让我了解了这一次的技术盛况，从开始的技术讲解到后期的竞赛直播，各个阶段都充分体现了专业性、素养性。不但使我学习了知识，同时也更好的了解了STM32的相关技术和使用场景，对我个人是一个很大的提升，在此对ST公司和seven管理再次表示感谢。8 x6 i8 X( k6 w0 f( [1 y 在黑客松的比赛中通过各个参赛队伍的作品，看到了不同的创意，产品技术是固定的，关键看人怎么使用。同样的平台，不同的思考方向，差异化的使用方法，打造出不同的产品方案。十分棒。在观看的过程中有幸获得抽奖奖品“STM32G474”，目前已经收到。谢谢。 希望以后的活动更加丰富，开发出更多的产品。3 H$ [: s9 p E. p$ @. w9 f3 z # O8 t, j I/ R4 Z( c: z 1 _# e7 E' N# i; w$ j# } % t9 C9 {6 s4 S K8 z9 z. _, T. c( w 描述 The STM32G474xB/xC/xE devices are based on the high-performance Arm® Cortex®-M4 32-bit RISC core. They operate at a frequency of up to 170 MHz. The Cortex-M4 core features a single-precision floating-point unit (FPU), which supports all the Arm single-precision data-processing instructions and all the data types. It also implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) which enhances the application’s security.) ?# D0 M1 q6 M j8 `1 A These devices embed high-speed memories (512 Kbytes of Flash memory, and 128 Kbytes of SRAM), a flexible external memory controller (FSMC) for static memories (for devices with packages of 100 pins and more), a Quad SPI Flash memory interface, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.4 ~8 p Y6 w0 E! r The devices also embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, securable memory area and proprietary code readout protection. The devices embed peripherals allowing mathematical/arithmetic function acceleration (CORDIC for trigonometric functions and FMAC unit for filter functions)./ A' q8 V- ?# S3 L They offer five fast 12-bit ADCs (5 Msps), seven comparators, six operational amplifiers, seven DAC channels (3 external and 4 internal), an internal voltage reference buffer, a low-power RTC, two general-purpose 32-bit timers, three 16-bit PWM timers dedicated to motor control, seven general-purpose 16-bit timers, and one 16-bit low-power timer, and high resolution timer with 184 ps resolution. They also feature standard and advanced communication interfaces such as: 所有功能 Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 170 MHz with 213 DMIPS, MPU, DSP instructions6 b" V' k) G9 M% y% _6 b5 u4 ?+ { Operating conditions: VDD, VDDA voltage range: 1.71 V to 3.6 V X# Y; M; G7 c' ? Mathematical hardware accelerators9 ~7 S0 N" T' \8 d' n! l CORDIC for trigonometric functions acceleration FMAC: filter mathematical accelerator Memories 512 Kbytes of Flash memory with ECC support, two banks read-while-write, proprietary code readout protection (PCROP), securable memory area, 1 Kbyte OTP 96 Kbytes of SRAM, with hardware parity check implemented on the first 32 Kbytes4 T+ E! \( [; c! h! m- G9 o Routine booster: 32 Kbytes of SRAM on instruction and data bus, with hardware parity check (CCM SRAM) External memory interface for static memories FSMC supporting SRAM, PSRAM, NOR and NAND memories Quad-SPI memory interface Reset and supply management Power-on/power-down reset (POR/PDR/BOR) Programmable voltage detector (PVD)2 g# T8 T" f, w F. a Low-power modes: sleep, stop, standby and shutdown3 Z5 n* Z# N) M/ H# j+ J! I VBAT supply for RTC and backup registers Clock management, e6 Z; A$ ?' c4 d5 G 4 to 48 MHz crystal oscillator 32 kHz oscillator with calibration Internal 16 MHz RC with PLL option (± 1%) Internal 32 kHz RC oscillator (± 5%) Up to 107 fast I/Os$ {% q4 D( ]. i/ B2 Z All mappable on external interrupt vectors0 S6 E2 J/ W( o+ a+ E' E Several I/Os with 5 V tolerant capability9 E2 _/ h/ }5 [# g7 [+ K Interconnect matrix 16-channel DMA controller 5 x 12-bit ADCs 0.25 µs, up to 42 channels. Resolution up to 16-bit with hardware oversampling, 0 to 3.6 V conversion range 7 x 12-bit DAC channels. v- M6 Z, }) X: h9 a, l8 u/ O% C8 Q 3 x buffered external channels 1 MSPS2 {5 ^7 p4 v* ^$ V 4 x unbuffered internal channels 15 MSPS' K) D4 |1 @, O/ @ 7 x ultra-fast rail-to-rail analog comparators 6 x operational amplifiers that can be used in PGA mode, all terminals accessible Internal voltage reference buffer (VREFBUF) supporting three output voltages (2.048 V, 2.5 V, 2.95 V) 17 timers: HRTIM (Hi-Resolution and complex waveform builder): 6 x16-bit counters, 184 ps resolution, 12 PWM+ @+ k1 y$ L5 L: F* ^5 q 2 x 32-bit timer and 2 x 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input 3 x 16-bit 8-channel advanced motor control timers, with up to 8 x PWM channels, dead time generation and emergency stop 1 x 16-bit timer with 2 x IC/OCs, one OCN/PWM, dead time generation and emergency stop# y( `5 ]; w( { 2 x 16-bit timers with IC/OC/OCN/PWM, dead time generation and emergency stop 2 x watchdog timers (independent, window)1 f: w7 S0 l* g; X6 Z 1 x SysTick timer: 24-bit downcounter+ f0 V) S+ j$ n0 p9 O% Z 2 x 16-bit basic timers 1 x low-power timer" a0 c& f+ G. ~0 ~ Calendar RTC with alarm, periodic wakeup from stop/standby$ c' y+ Q/ m5 M& i1 x Communication interfaces 3 x FDCAN controller supporting flexible data rate 4 x I2C Fast mode plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from stop) h- a" d+ Q0 ^6 P 5 x USART/UARTs (ISO 7816 interface, LIN, IrDA, modem control); R1 F f, m( v: U. h 1 x LPUART 4 x SPIs, 4 to 16 programmable bit frames, 2 x with multiplexed half duplex I2S interface! b3 c8 Z4 r2 A( y 1 x SAI (serial audio interface) USB 2.0 full-speed interface with LPM and BCD support) ~3 V5 t/ G6 D& V6 e IRTIM (infrared interface) USB Type-C™ /USB power delivery controller (UCPD) True random number generator (RNG) CRC calculation unit, 96-bit unique ID Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™ |
