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STM32_深圳峰会_黑客松,奖品开箱

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ghost110 发布时间:2021-5-12 10:19
感谢管理“Seven”,因为工作原因不能实地参加STM32的深圳会议,在seven管理的热心组织下,通过线上直播让我了解了这一次的技术盛况,从开始的技术讲解到后期的竞赛直播,各个阶段都充分体现了专业性、素养性。不但使我学习了知识,同时也更好的了解了STM32的相关技术和使用场景,对我个人是一个很大的提升,在此对ST公司和seven管理再次表示感谢。$ U/ z4 ]6 u0 U  H. v
在黑客松的比赛中通过各个参赛队伍的作品,看到了不同的创意,产品技术是固定的,关键看人怎么使用。同样的平台,不同的思考方向,差异化的使用方法,打造出不同的产品方案。十分棒。在观看的过程中有幸获得抽奖奖品“STM32G474”,目前已经收到。谢谢。
# H# ], `% c- l# m希望以后的活动更加丰富,开发出更多的产品。
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描述
% F- r( |  _8 b; Y  z- JThe STM32G474xB/xC/xE devices are based on the high-performance Arm® Cortex®-M4 32-bit RISC core. They operate at a frequency of up to 170 MHz. The Cortex-M4 core features a single-precision floating-point unit (FPU), which supports all the Arm single-precision data-processing instructions and all the data types. It also implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) which enhances the application’s security.
/ s/ m! j- V+ v: J/ p" d) L2 ^These devices embed high-speed memories (512 Kbytes of Flash memory, and 128 Kbytes of SRAM), a flexible external memory controller (FSMC) for static memories (for devices with packages of 100 pins and more), a Quad SPI Flash memory interface, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix., }$ s* q6 Y8 C0 G3 l
The devices also embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, securable memory area and proprietary code readout protection.
- K5 x  ^2 H( u8 A1 O7 JThe devices embed peripherals allowing mathematical/arithmetic function acceleration (CORDIC for trigonometric functions and FMAC unit for filter functions).
6 a( W) S" `8 Q5 DThey offer five fast 12-bit ADCs (5 Msps), seven comparators, six operational amplifiers, seven DAC channels (3 external and 4 internal), an internal voltage reference buffer, a low-power RTC, two general-purpose 32-bit timers, three 16-bit PWM timers dedicated to motor control, seven general-purpose 16-bit timers, and one 16-bit low-power timer, and high resolution timer with 184 ps resolution.
3 a! i. e( O( W0 nThey also feature standard and advanced communication interfaces such as:2 ?( ~  M. m2 ]5 a9 j7 G8 R
所有功能* |* x  z8 I6 V0 n( Q  ]
Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 170 MHz with 213 DMIPS, MPU, DSP instructions
1 F' ~1 e4 N/ {* vOperating conditions:
& V% x% R: M$ Y2 ]2 iVDD, VDDA voltage range: 1.71 V to 3.6 V5 l% z  _+ o  v9 j* `
Mathematical hardware accelerators* w$ _5 b$ o, E2 R- M; l2 k# L
CORDIC for trigonometric functions acceleration
9 q9 O* K) [' b. NFMAC: filter mathematical accelerator
6 Z5 y) @' E2 T* n5 P# F- EMemories
- _: S  l- ?4 C$ n, U6 O+ I' V0 Y512 Kbytes of Flash memory with ECC support, two banks read-while-write, proprietary code readout protection (PCROP), securable memory area, 1 Kbyte OTP& F; D- C) @! P% q2 ?- ^( T6 Y1 O
96 Kbytes of SRAM, with hardware parity check implemented on the first 32 Kbytes% h  P7 G) E! n4 P/ B0 N& n
Routine booster: 32 Kbytes of SRAM on instruction and data bus, with hardware parity check (CCM SRAM)
& j) N# t( T5 K* ^: @4 UExternal memory interface for static memories FSMC supporting SRAM, PSRAM, NOR and NAND memories
# P  r* z/ Y1 |( IQuad-SPI memory interface
3 s2 J# ~1 \) H% R3 _, ]8 B7 UReset and supply management- D# y  M( F8 S* F+ O
Power-on/power-down reset (POR/PDR/BOR)
$ l; e) D9 ^/ {) ?Programmable voltage detector (PVD), v6 [; l- f( R- ~% m+ U
Low-power modes: sleep, stop, standby and shutdown
% G' _3 A. O+ O# r5 B: v4 |1 [VBAT supply for RTC and backup registers
( g/ h0 M, _" o- G3 N' Z: jClock management
# A# X; f# j. }2 A4 to 48 MHz crystal oscillator
$ e# {/ Q6 f) B' }32 kHz oscillator with calibration
8 ^1 z1 P2 ~  k% a3 }; bInternal 16 MHz RC with PLL option (± 1%)" d5 @" \  C9 @$ `% s: c
Internal 32 kHz RC oscillator (± 5%)
8 B; r9 Y+ n9 e! [& s' q5 t! EUp to 107 fast I/Os
+ ]+ O# k3 w) O# JAll mappable on external interrupt vectors
+ u- j5 m7 c0 q" f$ E5 S* ESeveral I/Os with 5 V tolerant capability8 C& h) A7 V) o- t9 @
Interconnect matrix9 W1 J3 B* J& C, V5 ]/ X5 V
16-channel DMA controller
/ O/ q% r5 K: D5 }5 x 12-bit ADCs 0.25 µs, up to 42 channels. Resolution up to 16-bit with hardware oversampling, 0 to 3.6 V conversion range5 J3 X6 R+ ?' Y& N2 `2 v$ V; k9 {
7 x 12-bit DAC channels
1 [' l0 f8 s6 ?: x, }! W: x  R3 x buffered external channels 1 MSPS
0 f9 p6 a8 s. Z- H3 _0 q4 }4 x unbuffered internal channels 15 MSPS
: J1 r, ?6 n8 y9 I/ j1 R4 R7 x ultra-fast rail-to-rail analog comparators, o& A& C% A4 E4 b) r
6 x operational amplifiers that can be used in PGA mode, all terminals accessible. `6 ^% l3 y* C; Y+ E" S# i
Internal voltage reference buffer (VREFBUF) supporting three output voltages (2.048 V, 2.5 V, 2.95 V)
8 S& K% |' @' H9 g6 K$ X* H  l17 timers:
7 w; A9 M, H( l+ d* T9 k. O0 {HRTIM (Hi-Resolution and complex waveform builder): 6 x16-bit counters, 184 ps resolution, 12 PWM
# z0 r% p2 O6 ?5 w* }2 C' [2 x 32-bit timer and 2 x 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
1 y1 e+ y( w' ^! {& }: h8 w3 x 16-bit 8-channel advanced motor control timers, with up to 8 x PWM channels, dead time generation and emergency stop
6 z5 ?4 O3 L! W) F; W1 x 16-bit timer with 2 x IC/OCs, one OCN/PWM, dead time generation and emergency stop3 _  v1 v. o' @+ u8 j" J* z" y3 c
2 x 16-bit timers with IC/OC/OCN/PWM, dead time generation and emergency stop0 j3 T& w  t' x, m4 ~
2 x watchdog timers (independent, window)1 S* A" V7 H- v; }! w8 ?
1 x SysTick timer: 24-bit downcounter
$ m; f$ q% b- L& a; @7 e2 x 16-bit basic timers
3 t2 S6 `/ h# h7 M, Z/ M1 x low-power timer* }8 S4 `. i* r' x$ y, q& J$ o' L- B3 f
Calendar RTC with alarm, periodic wakeup from stop/standby
+ Y1 h. ?! K$ i; H3 L9 D" r3 |Communication interfaces
# }5 l9 ^5 {4 A6 Y, s3 x FDCAN controller supporting flexible data rate
* j. L0 O$ q. }3 G. c4 x I2C Fast mode plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from stop( W! S9 @' b- a& ?! S
5 x USART/UARTs (ISO 7816 interface, LIN, IrDA, modem control)6 x5 X( @2 l; z2 s- R
1 x LPUART
1 r1 U$ s) b+ E7 s0 m3 S4 x SPIs, 4 to 16 programmable bit frames, 2 x with multiplexed half duplex I2S interface8 S+ F4 d  H/ k6 s5 k) m* i1 q; U
1 x SAI (serial audio interface), O3 \* t# w3 |  U, |  q6 w/ r
USB 2.0 full-speed interface with LPM and BCD support
% n8 K" z: _, J7 J8 c3 nIRTIM (infrared interface)8 Z$ M" ]* t* l* ]  q; |
USB Type-C™ /USB power delivery controller (UCPD)
% c0 d* U+ ^9 E2 k, U% WTrue random number generator (RNG), a8 z/ b) d3 J+ J- H# a2 \
CRC calculation unit, 96-bit unique ID
! A/ l# r7 ?+ O$ J* {/ P4 W' w4 dDevelopment support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™
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1 收藏 评论0 发布时间:2021-5-12 10:19

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