
感谢管理“Seven”,因为工作原因不能实地参加STM32的深圳会议,在seven管理的热心组织下,通过线上直播让我了解了这一次的技术盛况,从开始的技术讲解到后期的竞赛直播,各个阶段都充分体现了专业性、素养性。不但使我学习了知识,同时也更好的了解了STM32的相关技术和使用场景,对我个人是一个很大的提升,在此对ST公司和seven管理再次表示感谢。' ?+ u. b* u3 ?2 d3 } 在黑客松的比赛中通过各个参赛队伍的作品,看到了不同的创意,产品技术是固定的,关键看人怎么使用。同样的平台,不同的思考方向,差异化的使用方法,打造出不同的产品方案。十分棒。在观看的过程中有幸获得抽奖奖品“STM32G474”,目前已经收到。谢谢。( g% ?9 G- v* V' u 希望以后的活动更加丰富,开发出更多的产品。3 d& D7 K: `+ r$ v$ E . `8 Q3 T9 l% C7 R+ Q/ k. Z g4 p- ?. X4 c# V' Z7 B; @& C % s2 p9 }& A3 h0 o# `/ U 描述 The STM32G474xB/xC/xE devices are based on the high-performance Arm® Cortex®-M4 32-bit RISC core. They operate at a frequency of up to 170 MHz. The Cortex-M4 core features a single-precision floating-point unit (FPU), which supports all the Arm single-precision data-processing instructions and all the data types. It also implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) which enhances the application’s security.! ^/ z7 P( F% C8 }; @: | These devices embed high-speed memories (512 Kbytes of Flash memory, and 128 Kbytes of SRAM), a flexible external memory controller (FSMC) for static memories (for devices with packages of 100 pins and more), a Quad SPI Flash memory interface, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.: M- A9 X" Y, A The devices also embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, securable memory area and proprietary code readout protection. The devices embed peripherals allowing mathematical/arithmetic function acceleration (CORDIC for trigonometric functions and FMAC unit for filter functions). They offer five fast 12-bit ADCs (5 Msps), seven comparators, six operational amplifiers, seven DAC channels (3 external and 4 internal), an internal voltage reference buffer, a low-power RTC, two general-purpose 32-bit timers, three 16-bit PWM timers dedicated to motor control, seven general-purpose 16-bit timers, and one 16-bit low-power timer, and high resolution timer with 184 ps resolution. They also feature standard and advanced communication interfaces such as:3 r- w4 t* S( o- b( r 所有功能# y+ N" v) Y6 Q) J8 K& O Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 170 MHz with 213 DMIPS, MPU, DSP instructions7 o1 V1 _ J# z% [7 b4 { Operating conditions: VDD, VDDA voltage range: 1.71 V to 3.6 V Mathematical hardware accelerators CORDIC for trigonometric functions acceleration FMAC: filter mathematical accelerator4 Y: R4 w$ w; m4 @! C | Memories 512 Kbytes of Flash memory with ECC support, two banks read-while-write, proprietary code readout protection (PCROP), securable memory area, 1 Kbyte OTP3 g ~; s0 n" z: }+ R 96 Kbytes of SRAM, with hardware parity check implemented on the first 32 Kbytes! g" Q% A) X# P2 n2 d Routine booster: 32 Kbytes of SRAM on instruction and data bus, with hardware parity check (CCM SRAM) External memory interface for static memories FSMC supporting SRAM, PSRAM, NOR and NAND memories4 N0 O, W9 I9 n$ ] [ Quad-SPI memory interface Reset and supply management Power-on/power-down reset (POR/PDR/BOR)$ {, X% J: p0 u7 R0 Y Programmable voltage detector (PVD) Low-power modes: sleep, stop, standby and shutdown: H0 K3 d- \* m/ U( `' I: N VBAT supply for RTC and backup registers Clock management 4 to 48 MHz crystal oscillator% R0 X$ l3 H7 O 32 kHz oscillator with calibration2 f7 y1 f. B( W M# A7 v: ?+ b Internal 16 MHz RC with PLL option (± 1%) Internal 32 kHz RC oscillator (± 5%) Up to 107 fast I/Os' L; d' F) }7 l$ T4 r; Q All mappable on external interrupt vectors0 b" X, e' w! g) ]! T Several I/Os with 5 V tolerant capability Interconnect matrix 16-channel DMA controller 5 x 12-bit ADCs 0.25 µs, up to 42 channels. Resolution up to 16-bit with hardware oversampling, 0 to 3.6 V conversion range 7 x 12-bit DAC channels 3 x buffered external channels 1 MSPS/ i2 ]1 w0 b# T% u' e2 | 4 x unbuffered internal channels 15 MSPS 7 x ultra-fast rail-to-rail analog comparators, z- E# i$ b9 {( l, I 6 x operational amplifiers that can be used in PGA mode, all terminals accessible# s9 k" R9 p; ^0 ]' A Internal voltage reference buffer (VREFBUF) supporting three output voltages (2.048 V, 2.5 V, 2.95 V) 17 timers: HRTIM (Hi-Resolution and complex waveform builder): 6 x16-bit counters, 184 ps resolution, 12 PWM 2 x 32-bit timer and 2 x 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input 3 x 16-bit 8-channel advanced motor control timers, with up to 8 x PWM channels, dead time generation and emergency stop D7 p: E" h6 L$ k' g 1 x 16-bit timer with 2 x IC/OCs, one OCN/PWM, dead time generation and emergency stop 2 x 16-bit timers with IC/OC/OCN/PWM, dead time generation and emergency stop 2 x watchdog timers (independent, window) 1 x SysTick timer: 24-bit downcounter* w+ E( X# v: F" `6 V 2 x 16-bit basic timers 1 x low-power timer5 R9 y% q F' e( v4 u' A0 K* h6 r Calendar RTC with alarm, periodic wakeup from stop/standby Communication interfaces6 f$ {0 x7 R/ H! N 3 x FDCAN controller supporting flexible data rate 4 x I2C Fast mode plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from stop 5 x USART/UARTs (ISO 7816 interface, LIN, IrDA, modem control) 1 x LPUART2 C$ {9 Y( L: q, q" Q. i8 z' Q 4 x SPIs, 4 to 16 programmable bit frames, 2 x with multiplexed half duplex I2S interface* U0 i2 q" W, r% J 1 x SAI (serial audio interface)' P5 F$ X& L- i" t# `) ^ K USB 2.0 full-speed interface with LPM and BCD support! Z6 {& }+ U. @ y6 _ IRTIM (infrared interface)- c. e* m3 f0 G USB Type-C™ /USB power delivery controller (UCPD), A0 u) S7 B( B% L True random number generator (RNG) CRC calculation unit, 96-bit unique ID, b( h% [+ b% d) o9 P: h; H0 V Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™ |
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