【经验分享】STM32 定时器相关函数和类型

STMCU小助手 · 2022-03-31T03:00:00+00:00

01. TIM概述 " n7 X8 m$ ^2 B0 b- i# p: Hstm32f4xx_tim.h和stm32f4xx_tim.c文件中 4 I. x4 B& G$ [ p) P( p: F6 x7 g: ~; i* [8 _ 02. 相关类型 - [4 o/ \) G# S8 I' m$ TTIM_TimeBaseInitTypeDef : D9 X6 r0 N: Z; m3 z( i2 e& f1 o: E) e" [& u @ /** ) ]2 M3 J( P; d& J5 U * @brief TIM Time Base Init structure definition 9 R, u, Q4 H( s) a5 [( H2 Q) A! X * @note This structure is used with all TIMx except for TIM6 and TIM7. + _$ Z1 j" H5 T9 `" D' p9 K */5 W# {/ w- [2 G6 H7 z: B9 ` " v* ?$ y# @' I: ]8 M! v1 t6 I typedef struct 1 \, y: r! d4 \{: h2 C, v- _6 P4 ]5 F+ k! M uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. 6 { [- H5 P5 H5 h2 B' W This parameter can be a number between 0x0000 and 0xFFFF */ ) i+ i: ?; @' I* U, ]1 X/ W. S7 `4 S: m O9 P$ L1 v# u6 k! w uint16_t TIM_CounterMode; /*!< Specifies the counter mode./ j2 v$ O" B: r* w This parameter can be a value of @ref TIM_Counter_Mode */3 X) H p7 k$ k) Y. w ! t% g; [6 V: N k& w8 B uint32_t TIM_Period; /*!< Specifies the period value to be loaded into the active" W2 N1 ^5 p. ~. e+ t0 l/ s Auto-Reload Register at the next update event.' I; L; }; l9 q/ {: H Y" t# B This parameter must be a number between 0x0000 and 0xFFFF. */ + t5 a b4 r! O0 F1 \# D" I! g. [8 P uint16_t TIM_ClockDivision; /*!< Specifies the clock division.% W- _) {: `- B0 s% U This parameter can be a value of @ref TIM_Clock_Division_CKD */5 e: E1 r2 U/ ^ D 5 N E/ J, o V z6 i. r uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter - P& A5 C8 p3 `; ?2 \# \ reaches zero, an update event is generated and counting restarts ' F! D' d) u+ y% `! | from the RCR value (N).- Z' n$ W& D( m, U u8 n This means in PWM mode that (N+1) corresponds to: T9 m; D/ x' U! c7 X - the number of PWM periods in edge-aligned mode) F0 j: H1 j- @; @% W: } - the number of half PWM period in center-aligned mode: b2 U$ R/ j i1 \+ z This parameter must be a number between 0x00 and 0xFF. # i$ }2 d3 w$ f! t" d5 J @note This parameter is valid only for TIM1 and TIM8. */ % [/ e, l0 c' F y. O+ P3 G} TIM_TimeBaseInitTypeDef; 2 D- M3 u3 r8 s2 P% j$ `* R 复制代码 - A2 b+ \% x- f/ X9 qTIM_OCInitTypeDef 0 [1 O* Z+ T/ b1 I6 d u- p* } ! B2 R7 M3 B S, e% m/** " u# s8 _ {3 C: Y6 f * @brief TIM Output Compare Init structure definition " s7 K( o [) ?+ I; y */ 4 U4 n+ w. y7 g* n& A0 L 3 l/ W, [- h/ p: z8 \7 Gtypedef struct' ?* k1 Z9 o" \. H, q {. X7 f: k M7 {& d uint16_t TIM_OCMode; /*!< Specifies the TIM mode.4 r+ f7 w. ^$ N2 q4 P This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */: V( a8 |. F& l( P8 { Z$ q * Z5 v! Y b8 ?# e uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.6 j6 i6 @8 Q/ E' d* y7 C- h% t This parameter can be a value of @ref TIM_Output_Compare_State */ $ y( T; t. R. a 0 _! F9 {8 W/ G! M3 p3 A uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state.) q2 r( o4 }3 F0 v: i& w* t This parameter can be a value of @ref TIM_Output_Compare_N_State% t$ f2 I$ i1 x; Y @note This parameter is valid only for TIM1 and TIM8. */ $ S; r7 M* |2 |" d3 A1 y: W4 K% a$ ]3 c6 @7 v% R uint32_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. * n& M# F8 ~& p$ Y! ^ This parameter can be a number between 0x0000 and 0xFFFF */' B2 j8 h7 i9 @* X 3 G& a- q& T4 v* n5 E+ Y- ? uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.9 l0 U$ ?* _# s% M5 W2 W$ n2 l This parameter can be a value of @ref TIM_Output_Compare_Polarity */ 6 v+ B& B5 B" Y; X: z1 u. j m ! t- W1 q. M2 K+ ~: }7 w uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity. . S$ k$ M" G7 x5 {% S This parameter can be a value of @ref TIM_Output_Compare_N_Polarity 5 c! [* s. ^$ M5 E$ n3 {# Z @note This parameter is valid only for TIM1 and TIM8. */ # ]9 W! E9 L/ B ' e1 ` T; x: ~7 \ g/ R uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.2 i6 U# A+ _' { This parameter can be a value of @ref TIM_Output_Compare_Idle_State 4 {& L1 u. a/ e% _, o" u$ _, y* N @note This parameter is valid only for TIM1 and TIM8. */ ' A* ^$ z$ s/ i# Z" @ ]* l) t5 m. }3 X0 i. A- t. g uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. ~8 I" T0 p2 a. x This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State ' [. s6 e3 c+ O }1 M+ { @note This parameter is valid only for TIM1 and TIM8. */! |) s$ g8 j# i7 c7 Y } TIM_OCInitTypeDef; " A( F" Y, ]) i% z; W复制代码 9 O6 R1 q W, B$ f+ j8 G& v0 pTIM_ICInitTypeDef9 V5 n, p9 O4 _& F1 _5 k5 P 5 g, B# l1 u# S$ Z /** / h) s( ?0 p! C * @brief TIM Input Capture Init structure definition " O: F" W V+ i0 L */. c# {, f' A4 V( t" @1 } & L/ d% u2 w6 Q7 R; ~, stypedef struct0 q6 X( O% M, }2 ^9 _4 _# _ {6 E% T/ \0 k" e6 w) z7 S* q6 o6 Y 2 Q J: p% q, q7 t5 g5 x, o& e uint16_t TIM_Channel; /*!< Specifies the TIM channel. U t/ }# v* ?& ^ This parameter can be a value of @ref TIM_Channel */ 2 L( z& a0 N9 o1 u6 p" B' M ( F3 q3 r) i' C$ I uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal. 9 Q! O3 Q) R0 |0 A3 A' `# p( C This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 1 _$ T5 A" |! d, ~) I8 `$ l0 o' }# Z4 ^0 }& F uint16_t TIM_ICSelection; /*!< Specifies the input. " ^, @ ^ K5 J& l. W This parameter can be a value of @ref TIM_Input_Capture_Selection */- A) }% R& M3 v+ T - c& x) C: m( }4 _ ^ uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler. # i N- U$ A& M/ S1 c/ p This parameter can be a value of @ref TIM_Input_Capture_Prescaler */3 U# `) w+ F4 H6 p. g+ D / _2 C- k5 Z0 S6 p: f; A uint16_t TIM_ICFilter; /*!< Specifies the input capture filter. 4 P ~# D, F+ i This parameter can be a number between 0x0 and 0xF */& p# _" \9 y, d# X } TIM_ICInitTypeDef; ; ]7 m5 ?$ p: F: L% V* Q复制代码 + W* K4 b4 Y7 p$ C" X `TIM_BDTRInitTypeDef% b% [3 p5 @, V" s: N/ ^+ t, e6 J ) ]( b' P* \, u/** ; G- B( W# T, M * @brief BDTR structure definition . D/ H, P C: z$ @9 r * @note This structure is used only with TIM1 and TIM8. $ b$ \% V$ T9 o7 I. Z% O */# v6 u, F1 k6 v$ |& ?; }: ] Z& f9 D) R/ O3 s typedef struct8 Z+ z7 |6 A7 x5 L( J/ s { * X0 l8 z+ q$ b; N ) Z; w! v4 I; W) E uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode.; M( e7 Z( h8 w This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ 1 D2 G5 M8 c. m( O8 _+ ~3 G A/ ^. t' K( I3 C5 v. _ uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state. ( |3 _) f2 Z/ V' j% q V8 s# N* q This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */# v0 Z0 r6 J H3 o& a' L9 {# e ! _9 o7 Z0 b2 ]' D1 t. c% m3 p uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters. 8 q: d2 V0 p/ s+ w3 X This parameter can be a value of @ref TIM_Lock_level */ # ?: G) w2 J9 D, W+ b; @ X8 p% F T B b# B$ V uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the . o/ ]) ?! A& v" s switching-on of the outputs.) j6 P2 z7 e& I' C( M* g) S4 G This parameter can be a number between 0x00 and 0xFF */ ) y& ?4 @2 M r: r, D . j4 a& X' I- e uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not. 7 P+ u6 g( |; J$ n1 S This parameter can be a value of @ref TIM_Break_Input_enable_disable */ 8 J$ d& j0 g6 A" y/ [; r 6 d7 s, r3 l/ S! r3 P uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. 2 U3 X# n5 V& c( B% H4 x8 v This parameter can be a value of @ref TIM_Break_Polarity */2 A* b+ K% s4 S4 ? * P$ h% o) g# L# T6 D6 C% p uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. 8 j, Y. s6 s' ^! F9 r* | This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */3 o7 U6 V; O8 J8 k4 `( c } TIM_BDTRInitTypeDef;6 |) h0 e& h1 ]; \ 复制代码 4 z. K0 p' e6 n* z7 j0 sTIM . L0 P& \" K: U4 ~' }9 W" D 0 I" ~' c4 Y& U) V+ X* e ; w5 \+ N! C: a# P0 I+ g, P6 z/** @defgroup TIM_Exported_constants ) _2 M( q4 G, J _) ? * @{ ) D; ~/ [6 O" Z) g/ }, b */: @* y2 k) {( V4 h" Z, d% N) H4 n g! j% p: R1 \2 L% U2 L5 r #define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \& V7 b5 W& Q$ J# r ((PERIPH) == TIM2) || \ " V- C$ w* \7 _& E" X- T- L ((PERIPH) == TIM3) || \7 k$ W5 Q* n+ e( @1 @# ~ ((PERIPH) == TIM4) || \1 R6 M5 ~0 D, C* q* d* t& i& V ((PERIPH) == TIM5) || \ 5 x( r, \: K7 w5 L8 t: G6 W# X3 |2 N ((PERIPH) == TIM6) || \# t2 b( W. Z9 `9 {2 F% S% H& e ((PERIPH) == TIM7) || \ - `% T9 h$ {- i- P, g- h9 O ((PERIPH) == TIM8) || \( U( w$ j: _' I$ G( W ((PERIPH) == TIM9) || \7 ]) z7 W2 ^7 }" C+ U B0 k ((PERIPH) == TIM10) || \0 A0 E2 ~* q( l% h1 n2 Q ((PERIPH) == TIM11) || \ 6 l* w* K& d* w1 }8 Z3 l0 D ((PERIPH) == TIM12) || \ 3 Z: M$ N6 y, E8 _. r (((PERIPH) == TIM13) || \5 V0 x6 u/ S) J* \( `1 Q* x ((PERIPH) == TIM14))) , O: J& i; x) @7 w$ X C$ U( K/* LIST1: TIM1, TIM2, TIM3, TIM4, TIM5, TIM8, TIM9, TIM10, TIM11, TIM12, TIM13 and TIM14 */ 2 f$ p# T! N: B3 z" j #define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \: z0 ]4 c; i& h" J ((PERIPH) == TIM2) || \ ' ?$ g- u, f% n* R9 R ((PERIPH) == TIM3) || \$ T) C! Y: U3 o" S8 ` ((PERIPH) == TIM4) || \* ^& B6 s# e5 i' x ((PERIPH) == TIM5) || \ / R% W$ C$ H6 c9 x/ m2 }# R ~ ((PERIPH) == TIM8) || \ 8 w( J: _: X+ C8 f% A ((PERIPH) == TIM9) || \ 1 r/ f5 v1 ?3 J1 P' Z6 b ((PERIPH) == TIM10) || \6 v& m; O$ z$ c2 f. ~ ((PERIPH) == TIM11) || \ / ^: e1 J( {8 _) c ((PERIPH) == TIM12) || \( C$ H4 Y9 V! c. s9 u ((PERIPH) == TIM13) || \+ u. L. q1 W4 j- e# d9 ^) k* x M ((PERIPH) == TIM14))1 Z' d+ r1 s) W0 @, C' k0 w : b' K8 @. A0 B8 R/* LIST2: TIM1, TIM2, TIM3, TIM4, TIM5, TIM8, TIM9 and TIM12 */ $ S6 P6 V: b) b# u8 v#define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ 7 K( M4 n ^6 D& t( y ((PERIPH) == TIM2) || \. s9 ^# A: k* @, S ((PERIPH) == TIM3) || \$ b! w" {7 b- e4 h" q, { ((PERIPH) == TIM4) || \0 N0 l3 ? V; o' |/ K% q' a; F( ?7 L ((PERIPH) == TIM5) || \ 9 V# P% G) |+ n: _* \; y0 E ((PERIPH) == TIM8) || \ # O, w! R4 _3 M# ]: B& I" @ ((PERIPH) == TIM9) || \ 9 L, o* z- J8 v% v9 @) g ((PERIPH) == TIM12)) $ m8 h/ _ ]& M7 ]% N! z8 N/* LIST3: TIM1, TIM2, TIM3, TIM4, TIM5 and TIM8 */! P( B7 F1 i" a8 f9 z #define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \. H( G( E* a! T* h( ~7 V6 p; h ((PERIPH) == TIM2) || \7 v U" [9 }5 v ((PERIPH) == TIM3) || \ : H) W0 Z0 ]6 A8 r }1 o( k ((PERIPH) == TIM4) || \ }$ Y8 N7 ~! F& | ((PERIPH) == TIM5) || \0 [9 E, x* I; q0 I5 b ((PERIPH) == TIM8)) 5 j3 h+ M7 Y' x) A6 f/* LIST4: TIM1 and TIM8 */ 3 C# Z6 l7 r, R: Y2 [#define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ ' _: n! P, S4 y" x8 s* H ((PERIPH) == TIM8)) 5 M! U; e7 p+ Z% g8 C/* LIST5: TIM1, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7 and TIM8 */ 5 Z' ~3 g6 c9 _5 o# ]9 W( B#define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ , Z6 M' b l/ l7 A! } ((PERIPH) == TIM2) || \! {+ t. f( i9 Z# n ((PERIPH) == TIM3) || \ ' U8 K' ?, l# E' z& n4 r ((PERIPH) == TIM4) || \' o0 [8 d0 z( g$ [ ((PERIPH) == TIM5) || \6 J; O! {% s$ f2 a% x ((PERIPH) == TIM6) || \7 Y# S0 P/ y- O" w% U j/ e* r. A) ^ ((PERIPH) == TIM7) || \ & |% v; O% z7 ^* [1 K ((PERIPH) == TIM8)) # O# `4 o: f5 x1 u/* LIST6: TIM2, TIM5 and TIM11 */ + x' X% {5 r0 q" S: [. {( F#define IS_TIM_LIST6_PERIPH(TIMx)(((TIMx) == TIM2) || \' [& g5 h, H+ D0 y5 p* B+ n* x9 _ ((TIMx) == TIM5) || \ : s+ O' O" c* w9 G O; ` ((TIMx) == TIM11)) ( B4 _$ \/ m5 P复制代码 & |: `! t& e. L1 l& qTIM_Output_Compare_and_PWM_modes& S6 d4 |* ?, C / g" N. P: G9 i# T- i/ i9 Y" u /** @defgroup TIM_Output_Compare_and_PWM_modes # I# D4 e$ b% e4 i4 A2 [' W: r& h * @{ % _% H$ ]2 o8 ]7 }4 U */- [' d3 |: t& G# }1 f+ R 2 _) e+ J5 m$ f#define TIM_OCMode_Timing ((uint16_t)0x0000) |0 t# h- m: i1 s8 B #define TIM_OCMode_Active ((uint16_t)0x0010). L* X) s9 [5 M1 n, V& s& ~ #define TIM_OCMode_Inactive ((uint16_t)0x0020). B. M& X- V* _2 M #define TIM_OCMode_Toggle ((uint16_t)0x0030)! H8 L* N O0 m$ h1 i7 ^3 u4 l #define TIM_OCMode_PWM1 ((uint16_t)0x0060) & Y3 u; J& z! t0 j. S H#define TIM_OCMode_PWM2 ((uint16_t)0x0070)( N! o; ~8 Q* s- U8 p) e0 I #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \- l( C1 Q& t0 o7 k ((MODE) == TIM_OCMode_Active) || \/ {* u) x% @8 r1 z/ e6 g' p ((MODE) == TIM_OCMode_Inactive) || \ 6 T0 l3 V4 g( {: W; ` ((MODE) == TIM_OCMode_Toggle)|| \; H' N& n j' R8 V! L( d ((MODE) == TIM_OCMode_PWM1) || \ H# K, y9 b4 D p ((MODE) == TIM_OCMode_PWM2))& ~; E( C6 M3 H9 U7 I, A. d. a #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ 1 [& D+ @+ r" [- H' R T ((MODE) == TIM_OCMode_Active) || \ ) n7 q6 A. p G( |5 U ((MODE) == TIM_OCMode_Inactive) || \ B- @; u8 A2 \& ` ((MODE) == TIM_OCMode_Toggle)|| \ 2 N; u3 W7 C! N1 a3 x( ]+ ?+ | ((MODE) == TIM_OCMode_PWM1) || \ ( @; q3 U( D0 ?! a ((MODE) == TIM_OCMode_PWM2) || \ 4 H1 B m4 u' n6 m% o% C ((MODE) == TIM_ForcedAction_Active) || \ / C8 ?) v2 r' t ((MODE) == TIM_ForcedAction_InActive))) v- ` |! Y/ z( u8 g+ ]2 O0 ~# U 复制代码 a2 W* m+ Y+ D: ^( HTIM_One_Pulse_Mode9 ^3 H; n3 {9 V ( P4 r: V! W2 s/ r1 P. ?+ K# d, B /** @defgroup TIM_One_Pulse_Mode / z. B. b/ Q/ q8 X# F+ s * @{ " K& k2 `7 L \+ ~. ^( U; I */ 6 w& W8 L8 Q( y* ?' K4 i . c/ Q4 L0 z. y) ?#define TIM_OPMode_Single ((uint16_t)0x0008) , H f$ V7 U# U' c: l#define TIM_OPMode_Repetitive ((uint16_t)0x0000)' n: r( _& H5 X y- p #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ , ^" L8 B0 H6 j; w3 c ((MODE) == TIM_OPMode_Repetitive))复制代码 : B$ k* X, |! [( m" `7 ^TIM_Channel ! C( A! j+ v* `3 r4 M! L * U9 I4 o% K9 J0 K- Z2 k/** @defgroup TIM_Channel / f5 a' l7 N, {1 | * @{ ) z C: k5 [( s+ d& d/ T */ 8 `1 i; E {+ n1 {6 W 3 e" D f: l; U#define TIM_Channel_1 ((uint16_t)0x0000) + q' {/ b. f( ~! |: [4 s0 b8 q#define TIM_Channel_2 ((uint16_t)0x0004) / [& d3 }- _% c% T- u% p9 ^#define TIM_Channel_3 ((uint16_t)0x0008)# x+ C! C5 L0 `4 T+ d4 V5 t" X #define TIM_Channel_4 ((uint16_t)0x000C)9 G( O4 g; Q2 M6 J" n1 n) g " { i+ W3 h7 i: L: g#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \1 `2 a, l3 v ? U ((CHANNEL) == TIM_Channel_2) || \ & W$ F* Y7 M5 ? ((CHANNEL) == TIM_Channel_3) || \: v2 Z5 g5 ~" J5 J4 e ((CHANNEL) == TIM_Channel_4))! G3 f0 T% j; e r! P ) ]8 }# ]: U3 U7 ]6 }; m #define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \4 e! W+ R9 c- }$ @! ^ ((CHANNEL) == TIM_Channel_2)) , C. p, w; g9 c* }3 T, b5 x2 z#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ N& _' G! k. X2 C7 C; W9 H ((CHANNEL) == TIM_Channel_2) || \ # M) }( W8 R5 z1 b2 H9 k, T3 k ((CHANNEL) == TIM_Channel_3))- F% ]- w8 P$ D" q9 J9 {5 \ 复制代码4 s2 }4 F' h, J1 g/ ]' o1 C TIM_Clock_Division_CKD/ y8 I! ]5 o% U& W0 g' J' s3 R 3 D* ?) N" i; a$ _# ~2 d+ } /** @defgroup TIM_Clock_Division_CKD 2 \' l# M9 M7 I0 y2 z( N * @{1 r' _1 S7 I% e+ a *// ]/ o5 V T# y. C # P, u# X5 v! z" b. L8 e #define TIM_CKD_DIV1 ((uint16_t)0x0000) - x$ A$ e9 N9 [( a F' _. f#define TIM_CKD_DIV2 ((uint16_t)0x0100)6 s4 S3 h7 U9 _- a, B/ c! Z9 Y #define TIM_CKD_DIV4 ((uint16_t)0x0200) + g; ]1 R* Y- z/ `; x#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \ - L4 k6 L7 x0 R i: k- n5 e ((DIV) == TIM_CKD_DIV2) || \ c6 C4 X: w- C* S ((DIV) == TIM_CKD_DIV4))" z1 N) G# V4 |4 f! X7 t2 t# W 复制代码 & R2 a9 x% c9 Q# eTIM_Counter_Mode5 r/ Q. A2 s6 D7 K+ q( A# y " C ]' }$ g3 }. C/ [ /** @defgroup TIM_Counter_Mode w) i0 h" F- n; R9 R8 y * @{ 1 X5 X( g- R+ S2 L5 O' \$ J# U */ : U. Q) w- V3 Y1 z+ B5 X* |" k# d! S . R7 b5 M; T8 I" W0 ^#define TIM_CounterMode_Up ((uint16_t)0x0000) t! u2 p8 U0 \' H #define TIM_CounterMode_Down ((uint16_t)0x0010): c ^. G5 j0 w( s1 B( Z #define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020) ; Q1 X- O4 R/ b4 T3 |% w; B: d#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040) + x; W2 R. u; a1 P% S7 }#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060) _% J0 H7 D: @+ H6 m" ~4 Z; z #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \( ?3 ~1 H3 V; K4 Y0 K8 s5 a7 I" j8 n ((MODE) == TIM_CounterMode_Down) || \ " {/ k2 _- U5 O& o1 o/ } ((MODE) == TIM_CounterMode_CenterAligned1) || \ - T: B5 m0 A- U) p q" q- Q- F5 _( ~6 N ((MODE) == TIM_CounterMode_CenterAligned2) || \' g7 K# X; A% x' ]* e- Z6 L; J ((MODE) == TIM_CounterMode_CenterAligned3))复制代码5 U( E7 C" p) }" T4 g4 H: L8 ] ]' n TIM_Output_Compare_Polarity , M) S+ D2 n; G$ _2 ]! e! G" |- g /** @defgroup TIM_Output_Compare_Polarity * s' d$ P! N2 K, S * @{: {* O/ l* _* a% @6 c */ 9 C w: q; K' A {! H% W& ^: \' Y |$ d & V0 ], M! e; f1 A6 i! ?: j, a* Q2 G#define TIM_OCPolarity_High ((uint16_t)0x0000)3 v& Y# u8 _3 d. B' u! b #define TIM_OCPolarity_Low ((uint16_t)0x0002)% v2 i, R. A& T+ x, F/ E! A2 z& m #define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \ 7 s% \" c" q2 F4 q& j" r) H ((POLARITY) == TIM_OCPolarity_Low))复制代码; A$ \+ U& h7 d, f1 a7 @% h* n9 \, q TIM_Output_Compare_N_Polarity / z% T3 W- v0 L2 F7 X' c' Y 8 f9 U# O/ n8 l# Q) U& q; j/** @defgroup TIM_Output_Compare_N_Polarity 6 M W. ~9 C/ C- f! T. y" W1 u4 W8 B * @{ 2 l3 e4 O* p- r) z f */ f; J" F% C- M5 a; A' s) N: X8 y #define TIM_OCNPolarity_High ((uint16_t)0x0000)6 R6 H3 `/ N8 H: M! D: u6 w# R #define TIM_OCNPolarity_Low ((uint16_t)0x0008)( j6 H# \' L6 c) a #define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \7 k' V0 M: c! @( i7 q9 O/ v/ d ((POLARITY) == TIM_OCNPolarity_Low))% D* Q8 v* ?1 T5 i1 m1 f* z# W 复制代码 # x8 g% h+ p N# m) Z% l! GTIM_Output_Compare_State7 @: y) D8 t4 }2 a7 Z L 8 d( F3 t$ \/ }, k /** @defgroup TIM_Output_Compare_State & S' r5 @& d. t * @{ t' H `' b0 R S% ^5 v: I6 z */ 8 j! [: F0 ?0 o, T& e" w' R. O6 J5 K) W2 J0 ^8 Q. {) y #define TIM_OutputState_Disable ((uint16_t)0x0000) 1 a% e0 \- m+ K& H#define TIM_OutputState_Enable ((uint16_t)0x0001) ) L% l# X; _" _- j6 Z) C, V2 ~#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \0 ?+ B4 o% }6 B ((STATE) == TIM_OutputState_Enable)) * A' ]* z* u$ X9 T7 _复制代码+ B9 Q( u6 K8 s/ Q TIM_Output_Compare_N_State/** @defgroup TIM_Output_Compare_N_State - T+ D3 o% B8 j9 a1 y+ L0 T * @{5 n1 `; j' M; m' p/ Q! \ */ 9 u, J: { M) z. B: G) O! r8 o. b2 @. Y& _6 l |1 | #define TIM_OutputNState_Disable ((uint16_t)0x0000) " R0 _3 j# V( s#define TIM_OutputNState_Enable ((uint16_t)0x0004)* [1 \3 }) q3 ~6 l #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ ; q& O7 {1 P4 t3 P0 V7 K1 P ^ ((STATE) == TIM_OutputNState_Enable))复制代码0 v9 Z3 e2 x' \* B TIM_Capture_Compare_State + B7 h- N0 `% Z# E' y( f% [) X M+ {* M5 D/ L4 J' J0 ] g$ p [$ ~/** @defgroup TIM_Capture_Compare_State " R1 D( o3 q. I( l) V' B * @{& R. q1 U4 b8 g6 [; P */ / L0 ~: }- S9 {6 b, G: t 5 L4 a9 m- m2 r6 M& G; r#define TIM_CCx_Enable ((uint16_t)0x0001) 2 O2 k+ Q. a& z; F3 z5 ]#define TIM_CCx_Disable ((uint16_t)0x0000)+ |: `+ M$ i$ P4 I9 c #define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \ % @! [# v N. G! z5 j( v ((CCX) == TIM_CCx_Disable))复制代码6 K2 e1 N( F5 M2 L/ H* F0 l TIM_Capture_Compare_N_State : P( C/ m5 f* J$ v, M/ n3 J& O+ w4 I6 A( }! s; r /** @defgroup TIM_Capture_Compare_N_State. X* l. F; ]4 V% D * @{0 N& k, } a& K */1 `7 |7 u2 X3 x5 V ! B; z/ E6 ]) f- ]/ J6 C! R; `& H* @#define TIM_CCxN_Enable ((uint16_t)0x0004) ( ^! i- O/ X4 M4 V- b#define TIM_CCxN_Disable ((uint16_t)0x0000)8 D [' v1 A% R! x8 F' U #define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \. U8 @ c+ l0 @) N2 [7 j ((CCXN) == TIM_CCxN_Disable))复制代码 , t `* H( T, ^6 I: lTIM_Break_Input_enable_disable ; w) l8 [& H6 N2 k+ j, k3 \+ {$ B5 X /** @defgroup TIM_Break_Input_enable_disable 9 I" n6 D# T! k7 n x; m2 g * @{" w# H3 b1 a5 O5 j% w! z. R */; [5 Y9 [5 g# z2 g I ; m- B# P* T- T2 n q+ c( n #define TIM_Break_Enable ((uint16_t)0x1000) 9 h8 O- e' Q) v& y; S) n1 K#define TIM_Break_Disable ((uint16_t)0x0000) , e! k! k4 R( C#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ 8 {9 U* F7 s' {: X. ?8 B ((STATE) == TIM_Break_Disable))复制代码+ R4 B/ T# X& l; Q8 f1 \ TIM_Break_Polarity* t, y3 K j% a2 w& | 7 ]% i0 Y% [1 d% \5 L9 O7 e. Q. P3 f1 ~ /** @defgroup TIM_Break_Polarity & G2 W) J1 Y* C# N * @{4 @! G. y9 z; {8 {4 t7 m3 @ */ 6 K/ w) t6 l- A, n6 k/ W" A8 N % J0 g; ]- [4 \6 B( W$ {7 r* H) q& s#define TIM_BreakPolarity_Low ((uint16_t)0x0000)7 A8 O* h1 m6 I5 |6 G3 H+ m #define TIM_BreakPolarity_High ((uint16_t)0x2000)7 p# s% J; n+ {3 M& K4 Q3 s #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \1 Z. z8 t4 y( d* [ ((POLARITY) == TIM_BreakPolarity_High))复制代码 ! \' q" f6 K; M5 HTIM_AOE_Bit_Set_Reset X6 A7 [% C! C& J 6 g1 T8 _6 C/ y$ R S( } & P' s# D- a2 Y2 T/** @defgroup TIM_AOE_Bit_Set_Reset z8 p# r: C1 r& ] * @{ |# h) a, s' ?7 N */ 9 `, L6 A/ k# R, f ! o5 Y# B( o. z9 a" a5 h. W#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000) , p2 |, B4 m( @4 C; j+ I# |- ?#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)! O; s$ w* _+ [) H$ q& p% u9 z #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \7 N( ]+ i% ]* x$ L! j ((STATE) == TIM_AutomaticOutput_Disable))复制代码; m$ j4 U+ e/ I TIM_Lock_level 2 T, M% H8 n/ X) y) y3 H7 v0 N3 ~ /** @defgroup TIM_Lock_level / n8 Y; g U( ^6 p * @{ * I7 Z- [' a+ y4 } x$ S */7 T$ P) Q1 u% ]% F1 q/ t* a 7 O- F7 I+ @9 Z: `% i#define TIM_LOCKLevel_OFF ((uint16_t)0x0000)8 {; u9 C j( d! B! H #define TIM_LOCKLevel_1 ((uint16_t)0x0100) 2 o, m* a3 p! R: u& e#define TIM_LOCKLevel_2 ((uint16_t)0x0200) 0 b2 {. q/ c0 V& R+ d! h#define TIM_LOCKLevel_3 ((uint16_t)0x0300) , }! ^+ i5 z) b1 p#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \1 o$ s, o& O" Z# \ ((LEVEL) == TIM_LOCKLevel_1) || \ 8 d2 h6 W# k# Q9 G+ C: n) d4 G ((LEVEL) == TIM_LOCKLevel_2) || \. B' P8 b: B- z9 e/ K. k4 E7 \ ((LEVEL) == TIM_LOCKLevel_3))复制代码 + n* a" V1 O( G0 F" m! zTIM_OSSI_Off_State_Selection_for_Idle_mode_state . L( [+ V: W7 v( e( y! T" U" W1 f# \. n5 p 5 Q+ P) ?2 c: J. ^6 Y/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state . V7 G8 i" S+ c0 P# G- K: S/ i9 u * @{ * E# A% b4 V- u, y% L: ? */ + V" y' t, X# V- D) S5 i9 y( j6 |9 F3 j" i* d& j #define TIM_OSSIState_Enable ((uint16_t)0x0400)" U/ o8 D) `) H# @2 A #define TIM_OSSIState_Disable ((uint16_t)0x0000) 0 J. P) x# I3 e" A: \. f/ r4 L#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ - o I& L# e* E0 i$ b ((STATE) == TIM_OSSIState_Disable))复制代码: A" W, n5 E8 Q8 B* E TIM_OSSR_Off_State_Selection_for_Run_mode_state " ]1 H: r7 r. Z- F- \* R. {7 ]* `' o' a: Q /** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state9 h* G8 t) X$ v; B9 s5 C& _ * @{: d3 m3 V5 j0 z/ t* X */ 1 H* x U2 C$ @' E2 @& J; {+ L% j1 r* U3 \ #define TIM_OSSRState_Enable ((uint16_t)0x0800) 5 B+ P4 B: N+ u#define TIM_OSSRState_Disable ((uint16_t)0x0000)& v- ~: w, r$ n8 Z7 M# r' F #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ ( a9 j3 ~2 B# B$ E4 a+ x4 ^; s ((STATE) == TIM_OSSRState_Disable)) ' Q# `2 L, U) x% m2 |/ D% q复制代码# c1 ?) N; C' E Q! { TIM_Output_Compare_Idle_State N. l5 W( L) C+ s , c4 \' { ^" z9 d9 {5 [ /** @defgroup TIM_Output_Compare_Idle_State ! s9 ~0 K. d9 [) \# v* K* ]; ` * @{" }* |" y2 Q& q3 }: { */+ [4 I) z+ n' h ~ G! D3 A' k ! w1 k1 k% A- z/ a( \9 C #define TIM_OCIdleState_Set ((uint16_t)0x0100) 8 N) w% W5 h6 N# Q: E#define TIM_OCIdleState_Reset ((uint16_t)0x0000)+ Q. x. |: E4 Q5 ?1 }/ {' @' J$ I6 l #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ ( E, L/ h6 Z7 P9 e# [ ((STATE) == TIM_OCIdleState_Reset))复制代码$ D; {' b( _0 N7 e1 c- P TIM_Output_Compare_N_Idle_State/ Y$ X5 K4 N1 ? , E8 K& n5 T! p; o/** @defgroup TIM_Output_Compare_N_Idle_State 9 {1 Y0 E" [: m * @{ 9 H- d1 a/ O6 |' [- U- ~ */6 L; A1 {- w" X9 K ! h7 w- I: @6 d1 s" B#define TIM_OCNIdleState_Set ((uint16_t)0x0200) / m- ]: q( Z4 o" Q#define TIM_OCNIdleState_Reset ((uint16_t)0x0000) ; X8 ~ k+ S9 i0 m' @#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ , g2 A4 \& O; {: s) s, v/ q& q3 U ((STATE) == TIM_OCNIdleState_Reset))复制代码 6 Y# n4 e2 {2 K2 b4 _+ |( ~/ [TIM_Input_Capture_Polarity ; e, _, D* E. |) h% g, b7 R2 B/ s* | l/ q# y( D' H /** @defgroup TIM_Input_Capture_Polarity % m9 t# T# z1 }. o( } * @{7 E: w! g7 y i7 f+ W ^! ? */; w9 H0 o7 [) x9 V; |$ I; H, S1 r ! q' d2 J) f4 o1 _. k1 x1 T #define TIM_ICPolarity_Rising ((uint16_t)0x0000): I! e E/ R6 E. W3 P9 F( b #define TIM_ICPolarity_Falling ((uint16_t)0x0002) / u, @4 ?4 K" F. W: a6 \#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A) - o9 V {) m) O" q2 P' |#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ * l/ ]0 g' q1 B ((POLARITY) == TIM_ICPolarity_Falling)|| \ ; |# U6 D- V L; N$ T! t ((POLARITY) == TIM_ICPolarity_BothEdge))复制代码1 e6 _. V5 V) T! T TIM_Input_Capture_Selection/** @defgroup TIM_Input_Capture_Selection 7 _" g+ e% y2 ^: a1 |/ \3 | * @{ + a8 e2 c7 ~9 a7 S+ o& ] */ 0 s# R1 Z/ D; v& _ , g9 o# V% y$ k#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be 2 N2 g" o, w0 N; y connected to IC1, IC2, IC3 or IC4, respectively */ ! y) {% Y3 o5 \# N% J7 X#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be 6 R% L) x/ ?$ u connected to IC2, IC1, IC4 or IC3, respectively. */ + N3 n8 `4 B" {$ X" t#define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */( j G7 X+ F; b+ J7 ? #define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \6 D+ t6 N, l* y; u4 F# V ((SELECTION) == TIM_ICSelection_IndirectTI) || \ o3 L) [4 B) Q. b/ Q, O, J ((SELECTION) == TIM_ICSelection_TRC))复制代码 / q t" U2 M6 n+ [* O# N! UTIM_Input_Capture_Prescaler * n2 Q" O5 |) f& y6 K- }1 p( @ @ /** @defgroup TIM_Input_Capture_Prescaler 4 P) N8 C# k/ m/ o * @{; L: s( M( ?1 P* |0 \5 H; k$ {5 [* C6 p6 D */( p! v) d' ^$ I/ p# X' o) p 8 a( Y, H T W* V2 E#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */ 7 Z9 ]. f/ L4 E; q$ R7 y#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */8 f+ l7 g+ d0 u #define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */, T- N9 P$ p) ^, n% V #define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */6 ~/ V. Z& @) f" J #define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \9 {# F' h. _) q ((PRESCALER) == TIM_ICPSC_DIV2) || \ " R+ C! ~0 F B, u ((PRESCALER) == TIM_ICPSC_DIV4) || \ - P! d& h) n E7 J6 k ((PRESCALER) == TIM_ICPSC_DIV8)) , t0 B `9 O( J( E复制代码 4 M' o: O! _2 @; K8 r7 zTIM_interrupt_sources ; u& U$ {+ |: g8 j 1 P( x" I( U& M/** @defgroup TIM_interrupt_sources 4 I& X) B/ f- L. u * @{1 R* d3 B% ~. @4 G' j5 d */7 }' }! ?: ^( i2 ?: E% ]6 a$ S 4 u& e1 V1 ]6 ^3 _! e9 k #define TIM_IT_Update ((uint16_t)0x0001), J! s: p; o! }4 n! d6 o) V. b #define TIM_IT_CC1 ((uint16_t)0x0002) / j' Q7 n' S- S/ B3 \* E#define TIM_IT_CC2 ((uint16_t)0x0004)# ~2 |" q1 s! W& A #define TIM_IT_CC3 ((uint16_t)0x0008) + L" `8 ~2 a# W7 m) p" X, A#define TIM_IT_CC4 ((uint16_t)0x0010)6 a0 I# J# N, i/ C" y #define TIM_IT_COM ((uint16_t)0x0020)7 C7 t. Q7 k3 `" {) [. L# c #define TIM_IT_Trigger ((uint16_t)0x0040) * s2 c& w+ L: X# s1 `#define TIM_IT_Break ((uint16_t)0x0080) U$ n& m6 G8 O! ?) ~) E #define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000)) 7 ?0 T* L, C- o8 \8 L * B( O) @ _1 }1 |#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \ % b( Z6 L7 d4 O. A( r4 V- X% e ((IT) == TIM_IT_CC1) || \ / P+ O* G X& e ((IT) == TIM_IT_CC2) || \1 k' U; r* t* Q4 v: N' J5 w ((IT) == TIM_IT_CC3) || \ , {1 t/ V& e, t8 p+ ] j ((IT) == TIM_IT_CC4) || \ 9 c$ o& R5 ]4 T4 S2 D. F$ e) {3 i8 ] ((IT) == TIM_IT_COM) || \" h, W9 g! ?% | ((IT) == TIM_IT_Trigger) || \ / i5 y! e) J D, E9 {# ` ~0 z ((IT) == TIM_IT_Break))复制代码& {: z8 `! t; f9 T6 R TIM_DMA_Base_address/ @$ D% Z$ P# |5 j. }! v$ s 8 }8 a4 X& v2 G" N: b) G /** @defgroup TIM_DMA_Base_address 6 o# f4 {$ Z4 h% F( [ * @{ ; o m0 Z+ W+ P$ R9 f) J */+ D: F8 d n4 G3 ~3 y' J9 D ! ^) z. A1 L* R6 I; ]) \) w #define TIM_DMABase_CR1 ((uint16_t)0x0000)8 @. q8 J! a/ D$ a1 r. F #define TIM_DMABase_CR2 ((uint16_t)0x0001): }0 y: i! ^4 ]% t #define TIM_DMABase_SMCR ((uint16_t)0x0002) ( f* j; B0 S* V$ m8 z% T* P#define TIM_DMABase_DIER ((uint16_t)0x0003) ! v) Z' S' U/ v- L( i5 r" i# E& h$ ]# K- o#define TIM_DMABase_SR ((uint16_t)0x0004) 5 ~. W- V/ i5 x6 B#define TIM_DMABase_EGR ((uint16_t)0x0005) 6 [/ [5 X d8 i; a" d8 r#define TIM_DMABase_CCMR1 ((uint16_t)0x0006)3 f0 N. o- @$ X z/ ^3 S #define TIM_DMABase_CCMR2 ((uint16_t)0x0007)! m# r2 Q+ ~+ m+ J1 b; k1 b2 X+ I #define TIM_DMABase_CCER ((uint16_t)0x0008) 1 s4 `. g- V6 k7 }#define TIM_DMABase_CNT ((uint16_t)0x0009)+ y5 O1 f0 V( a: t% n4 m #define TIM_DMABase_PSC ((uint16_t)0x000A) 3 @% `" [' z2 n9 ]. H7 v' ~6 j! x#define TIM_DMABase_ARR ((uint16_t)0x000B). B, U+ t( K/ K( W& F #define TIM_DMABase_RCR ((uint16_t)0x000C)2 I! a5 S2 X9 q* O #define TIM_DMABase_CCR1 ((uint16_t)0x000D) 9 n) t) L" T( F9 r0 C#define TIM_DMABase_CCR2 ((uint16_t)0x000E) - j8 |# `; o0 d) [7 [- }# K R9 s#define TIM_DMABase_CCR3 ((uint16_t)0x000F) 5 E" ?- e1 ]+ X- e; |#define TIM_DMABase_CCR4 ((uint16_t)0x0010)0 g1 B/ h0 |0 y- Y8 J7 i #define TIM_DMABase_BDTR ((uint16_t)0x0011) 5 P- n# \1 J! W) c+ U#define TIM_DMABase_DCR ((uint16_t)0x0012): X0 _4 E/ w: M G' H #define TIM_DMABase_OR ((uint16_t)0x0013) 4 Q- K) m2 J p$ L! ]4 }#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \ ' D1 [" K9 I S1 O$ a ((BASE) == TIM_DMABase_CR2) || \5 H7 S2 [ q, V( | l ((BASE) == TIM_DMABase_SMCR) || \ 9 N9 `4 b* v1 r9 x C( o ((BASE) == TIM_DMABase_DIER) || \; `. v0 \/ w" ~0 ^- T1 ] ((BASE) == TIM_DMABase_SR) || \" C9 b( o# V, p, T0 v ((BASE) == TIM_DMABase_EGR) || \ # C2 ]. s# q* I2 N3 e7 B ((BASE) == TIM_DMABase_CCMR1) || \3 @8 ?/ C' \' b. k" i% B! f ((BASE) == TIM_DMABase_CCMR2) || \8 g6 a1 M. [+ Y ((BASE) == TIM_DMABase_CCER) || \ ( Z" t( t. ?8 G, E, f# T# U, F4 R ((BASE) == TIM_DMABase_CNT) || \ `6 l2 P. s) n v0 c& k ((BASE) == TIM_DMABase_PSC) || \- e: m" I: g% t: E4 a ((BASE) == TIM_DMABase_ARR) || \ b! u6 E7 q( T ((BASE) == TIM_DMABase_RCR) || \( J5 q0 N6 z0 }5 Z; A q8 y0 J; H ((BASE) == TIM_DMABase_CCR1) || \3 N" i% X7 Y/ D/ f% @ R$ { ((BASE) == TIM_DMABase_CCR2) || \ 4 y; m! o/ z8 _6 ~ T( l ((BASE) == TIM_DMABase_CCR3) || \ 6 K; G+ x$ W2 Y k' i3 T ((BASE) == TIM_DMABase_CCR4) || \ 3 L5 T( {9 K+ U3 M d ((BASE) == TIM_DMABase_BDTR) || \: u" W! I7 C5 m/ ?/ ~. Z/ t8 s0 ` p ((BASE) == TIM_DMABase_DCR) || \ % \5 m: b' v+ j ((BASE) == TIM_DMABase_OR)) 复制代码 * h) Z) q- Z* s; h( x5 |2 u, NTIM_DMA_Burst_Length - F5 s; }! x& f' |7 I- ^. W# {# |! X* h+ Y+ K& W U$ k /** @defgroup TIM_DMA_Burst_Length * s+ u1 S K6 }# ]1 P * @{+ O; h O" r- g0 D$ p" Y/ \2 G. D6 e */2 m9 y& g4 e4 U# t0 s * a5 T) T& a0 w2 x" R9 r x #define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000) 7 J0 [6 e! d0 ?+ c#define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100) v% I1 R% m/ N0 |3 c% H ~#define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)5 V3 B0 c! w6 S #define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)9 k" S5 G5 r6 N' g( T7 Y #define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)' x$ U3 y$ B8 c: c" S #define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500) l( t: F2 @/ o8 k #define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600) 6 h$ G+ l8 R) n2 e#define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700) ( H5 s; B1 u# m; ]% N1 l" C6 }#define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)- |2 S5 a* S5 p$ U; |" M! D #define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)% o w6 x, @. ~( t: Q0 Z8 `( [ #define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)# P! T4 ]; S5 K; M* G #define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)5 U, [4 y- C. A8 ?3 e0 d' y7 k# K' k #define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)2 k: W8 V& S, P #define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)* L; J7 w+ X! y* N) p #define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00) : ]5 r0 b# Z+ O6 O2 h* g#define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00) 1 W% Y& d$ w, c. W" x2 j* S* _#define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)1 O( x l$ j) K- g, w4 g$ s #define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100) ) w7 m+ ]: o+ \% ^#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \6 j3 O3 U C" j5 k: O ((LENGTH) == TIM_DMABurstLength_2Transfers) || \ ; T8 s! s, i/ D) ^ ((LENGTH) == TIM_DMABurstLength_3Transfers) || \ 6 j9 ], ~7 R2 P ((LENGTH) == TIM_DMABurstLength_4Transfers) || \ 0 r0 d: \# X* W+ y( y/ g; A ((LENGTH) == TIM_DMABurstLength_5Transfers) || \ ! d8 l5 m3 E2 _" `% O) l& L4 [. G: C ((LENGTH) == TIM_DMABurstLength_6Transfers) || \ 2 @5 I6 i& G* V) o7 T8 \ ((LENGTH) == TIM_DMABurstLength_7Transfers) || \% F, c! }4 R6 Q& j5 z ((LENGTH) == TIM_DMABurstLength_8Transfers) || \. v# u' }% v) ]+ M ((LENGTH) == TIM_DMABurstLength_9Transfers) || \ % L+ \" U$ [6 p ((LENGTH) == TIM_DMABurstLength_10Transfers) || \ ! v3 \& K; F) f; D ((LENGTH) == TIM_DMABurstLength_11Transfers) || \6 p% E& @) d/ f, j% Y ((LENGTH) == TIM_DMABurstLength_12Transfers) || \: m8 L7 D7 z) F1 W9 w9 P ((LENGTH) == TIM_DMABurstLength_13Transfers) || \5 Y2 O6 ]: U( }& s% ^ ((LENGTH) == TIM_DMABurstLength_14Transfers) || \ 1 V) u8 ? x E5 W ((LENGTH) == TIM_DMABurstLength_15Transfers) || \- g* O" |+ ]4 B* N- i ((LENGTH) == TIM_DMABurstLength_16Transfers) || \& |3 z# y5 F7 _* N) } ((LENGTH) == TIM_DMABurstLength_17Transfers) || \) g; x( I& {# S ((LENGTH) == TIM_DMABurstLength_18Transfers)) ( j0 ~4 g5 R9 d3 s- Z2 P7 r% _复制代码 8 V+ u% m: X Q2 e7 o. ]9 ]+ ZTIM_DMA_sources ! [8 X1 k) h/ U5 n$ j% `( ~: w9 i8 J! q0 q7 s/ \7 ~2 | /** @defgroup TIM_DMA_sources 9 t% |8 b( j% ^" }" u * @{ + ?4 q9 z% p' X& H% u# l% E! Y */ # g1 N( D3 F/ s( A- W$ K, } . P0 ~1 g( P/ p" E6 {- i$ q#define TIM_DMA_Update ((uint16_t)0x0100) ! O; M6 M2 J; J& |( c1 X+ |#define TIM_DMA_CC1 ((uint16_t)0x0200) # i l# f+ g* q#define TIM_DMA_CC2 ((uint16_t)0x0400) W$ }3 y! {! l#define TIM_DMA_CC3 ((uint16_t)0x0800)8 E4 h6 ~8 j7 f$ `, r) y% o #define TIM_DMA_CC4 ((uint16_t)0x1000)- s1 D/ c. j0 a( w #define TIM_DMA_COM ((uint16_t)0x2000) ; {! q; E8 n2 q8 O4 |#define TIM_DMA_Trigger ((uint16_t)0x4000) 4 a7 D& T: q5 B9 v0 g#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))复制代码$ d7 H W$ O) P5 M+ B0 M' m0 R/ D B TIM_External_Trigger_Prescaler" \: @) m8 w" `* `0 M % {( \0 _: x6 Y* {/** @defgroup TIM_External_Trigger_Prescaler ; L: N+ q3 I) f7 k2 a * @{ , }; P: j5 n% M) ] */ + u$ l5 k; p4 P% W+ \$ E7 X- n: L2 R 4 u5 l4 f8 a/ L' J @+ n+ R#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000) 0 N' O5 x- B1 k: S#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000) 0 K, b. k- `. O4 s9 v$ K3 n) Y4 K: E#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)) o( N9 H- b* W( u9 q5 M# o8 u #define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)/ z, q a* ^0 |" @ #define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \ - J9 a! T" r$ d4 `# K1 |3 F, b ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \8 m) m4 a! l- L) I ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \ ( |: h; e4 F$ W* w* F2 c3 Q ((PRESCALER) == TIM_ExtTRGPSC_DIV8))复制代码 * a2 Y# `$ g9 g) z+ dTIM_Internal_Trigger_Selection5 o" Z/ T5 i2 y! U / }1 F3 C' n/ D2 t, B G /** @defgroup TIM_Internal_Trigger_Selection 3 {. {5 z6 E. O0 z8 F9 w7 J0 K/ V * @{4 }2 l9 `6 f P */ ; X6 G; K- @" _ 7 z; C6 ]6 ~3 q8 { x#define TIM_TS_ITR0 ((uint16_t)0x0000) , Y0 u5 u, ^% h8 y+ _/ p#define TIM_TS_ITR1 ((uint16_t)0x0010) 1 R* x5 U) k, ] |#define TIM_TS_ITR2 ((uint16_t)0x0020) % m7 R+ H1 z% Y. G) i9 c# M#define TIM_TS_ITR3 ((uint16_t)0x0030) ; H6 Y) L6 W( W( B( N# p# i I+ ~#define TIM_TS_TI1F_ED ((uint16_t)0x0040) 7 i7 _ k/ W) }: D#define TIM_TS_TI1FP1 ((uint16_t)0x0050) * @6 `& X" v! B#define TIM_TS_TI2FP2 ((uint16_t)0x0060)3 a3 T- w! [+ C4 s0 x9 V& z #define TIM_TS_ETRF ((uint16_t)0x0070) 4 U. X; p; w; C#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ - A: [# R# U) z/ P. s ((SELECTION) == TIM_TS_ITR1) || \ 1 ^4 e& B6 Y. O3 m2 W1 O ((SELECTION) == TIM_TS_ITR2) || \: R' y+ h$ h) w8 H; n4 t) k$ z ((SELECTION) == TIM_TS_ITR3) || \ & G( ]! b. g( n/ E [+ d l ((SELECTION) == TIM_TS_TI1F_ED) || \- E9 V @& K0 k( q5 U4 a2 p ((SELECTION) == TIM_TS_TI1FP1) || \) j" p5 d; w4 _& l ((SELECTION) == TIM_TS_TI2FP2) || \ 0 x" {2 L2 A* ~( _( f# A1 [0 g ((SELECTION) == TIM_TS_ETRF)) ) }; N+ f Y0 S! y( m, u0 J#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ 2 Q5 e( B( f: }8 c1 c/ K9 }: h9 b ((SELECTION) == TIM_TS_ITR1) || \4 ?! M4 v& [3 ]" s" J ((SELECTION) == TIM_TS_ITR2) || \ ; k( O# [& g4 ]1 }; P1 C+ O ((SELECTION) == TIM_TS_ITR3)) 0 z1 h6 C/ W' G7 K) C$ T+ p复制代码 & E( r+ q4 {/ b" r) _' @TIM_TIx_External_Clock_Source 6 q+ R- s5 U+ n5 p' Z1 M- Q6 X' \1 x + v6 f) ~: P) ]/ c* u0 _# a! k/** @defgroup TIM_TIx_External_Clock_Source 3 K6 P9 `* G5 G0 q * @{ b* n; l6 T0 p5 g5 C' k# h */ , y0 Z( C* m' M4 _ % r& Y' g. K6 x1 u. i" I#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050) 2 l( e. O/ T3 J7 b/ C) e#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060) 0 X U% j* E( P3 g l* }# T" n5 Z/ O#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)复制代码1 k4 |% I" E( |" p3 u- J* M" e, T TIM_External_Trigger_Polarity. l6 e, T6 m% b8 U" v 8 f; O. H+ @! p& _3 I /** @defgroup TIM_External_Trigger_Polarity 0 z1 [' J) ]8 M) Q: w2 W * @{' q* V- @' v$ d. Z0 k! i* P6 ~ */ , T6 j5 d& b, c- c& x% \( b9 f #define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000) 4 M1 ~$ i6 a: J; d* s6 U#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)5 C8 r( V! j" p! z7 p) V #define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \ % q0 z9 S' Z5 \ ((POLARITY) == TIM_ExtTRGPolarity_NonInverted))复制代码+ }; n+ B C3 I" a6 G: U0 G) R TIM_Prescaler_Reload_Mode2 [5 u% x3 A) f& h, D - Q9 K1 ], A+ ]$ W% p; Z /** @defgroup TIM_Prescaler_Reload_Mode " d/ ]/ v9 \3 x, ^- K& K# \ * @{ 1 K9 I+ A7 e( v' w3 V5 G */, G' Z3 H; R0 O 0 p. A+ l; e" [) ]7 S# d* ]' Q#define TIM_PSCReloadMode_Update ((uint16_t)0x0000) $ k3 R- C% p) Q2 K1 _#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)8 d6 n. e+ [) y! Y* O; t0 Z0 X- W #define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \ 0 |% T; b( Y# e+ X ((RELOAD) == TIM_PSCReloadMode_Immediate))复制代码 H- n' @$ l) I2 O4 z$ Z. wTIM_Forced_Action 6 \4 U8 C1 H1 T4 u1 V# f3 l6 }+ o, {% m# @9 O6 Q( ^; m- \ /** @defgroup TIM_Forced_Action 1 j; t Y; w& V * @{0 N3 I6 H9 X3 n! I4 o* d- W S */ 2 h) s4 W( G! x: ^1 j2 o! Q3 h: G2 ^( h/ D #define TIM_ForcedAction_Active ((uint16_t)0x0050) 8 ^$ e, C: C" D4 p2 n#define TIM_ForcedAction_InActive ((uint16_t)0x0040)% z; q; M9 b* L; J6 W- m! K: G. u #define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \0 O; B5 V4 \& U) c ((ACTION) == TIM_ForcedAction_InActive))复制代码! P) M8 @% i' k* T TIM_Encoder_Mode5 j. e: t% H; V% {$ g9 ]8 v , X( C/ ^- g1 t. G2 {/** @defgroup TIM_Encoder_Mode 7 U. B0 l) C+ C* Y- C& W6 x * @{ _, e9 |- N6 l& q$ ?" ?$ X */) L4 W" ?3 p9 \. k+ v 2 K& a2 Q0 v) [) e0 D#define TIM_EncoderMode_TI1 ((uint16_t)0x0001)& R( }# P7 Y* m# p* P4 ] #define TIM_EncoderMode_TI2 ((uint16_t)0x0002) L" S+ j0 u8 r) v#define TIM_EncoderMode_TI12 ((uint16_t)0x0003) : Y* K. {; r _' O+ M0 J; I% s#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ # P' m8 `" q5 |0 \- ^/ Q1 o: {0 W- V ((MODE) == TIM_EncoderMode_TI2) || \% }* S- \$ E' G. u ((MODE) == TIM_EncoderMode_TI12))复制代码 ' i& v! L: {% [+ {! ZTIM_Event_Source& b6 d( J. S" C' i* v4 l . i) l0 p, j& Y$ g7 J, ]0 g P- g/** @defgroup TIM_Event_Source - I! V: Y4 U* Y( H * @{% a3 w9 H% F0 P( v6 x* [ */0 t/ R/ q1 Y" x ' I# X( }5 y9 r) W- H; l& u( J #define TIM_EventSource_Update ((uint16_t)0x0001) , T: j; V- }6 z#define TIM_EventSource_CC1 ((uint16_t)0x0002) , \1 o( O- k _/ B$ d( g, B#define TIM_EventSource_CC2 ((uint16_t)0x0004)& D. t6 @" W# Z! B #define TIM_EventSource_CC3 ((uint16_t)0x0008) 2 S/ ~( f- U' _7 ?* s" l& S9 B#define TIM_EventSource_CC4 ((uint16_t)0x0010) % i% T% ?4 N, h% X#define TIM_EventSource_COM ((uint16_t)0x0020)! g% e, y: Z( D8 V0 t) n8 d #define TIM_EventSource_Trigger ((uint16_t)0x0040)1 _. h0 E, N' N6 S #define TIM_EventSource_Break ((uint16_t)0x0080) 2 F% ]$ D2 O5 ^( a#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000)) 复制代码 7 h5 l8 X! o$ l& t5 V) RTIM_Update_Source0 e: G/ [# j6 B: b2 ?: T$ U6 m/ U 6 N; t' k0 A0 z( T$ r' V. L# a' Q* c/** @defgroup TIM_Update_Source . D; G4 l0 b& v+ G$ p4 Z- I) q * @{% `& R N" @" ^5 Y7 P */2 F* `5 \$ R8 a) P6 p7 {# Q ' S' m" Q: j, b0 `1 [) ~ #define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow 9 A* e0 _. T: B3 _7 n6 o: ~ or the setting of UG bit, or an update generation ' J7 [# R+ v. D6 c( i$ r$ k) w through the slave mode controller. */: n8 O M; ^) ^( g& g7 m, j2 U #define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */1 ^8 I, W' H1 t' f4 y' S #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \ 1 r1 o# b/ c; X2 z# |1 J( H ((SOURCE) == TIM_UpdateSource_Regular))复制代码 " i) ~( m: g1 ~, p4 VTIM_Output_Compare_Preload_State8 x6 y0 }4 I5 K# t5 R1 O. i 9 M1 @# d! M/ M) w( c /** @defgroup TIM_Output_Compare_Preload_State * |2 }% e" Y6 M, H- [ * @{ V) e/ g4 G7 k. x */" L" R& Q7 ~, m# K5 X 3 ] j5 K% |2 |& z7 X6 T9 N: P #define TIM_OCPreload_Enable ((uint16_t)0x0008) ' n, [0 j7 l; M: K! }8 {#define TIM_OCPreload_Disable ((uint16_t)0x0000) % |6 t4 D: N" Z#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \5 h+ ]; V: N* W5 \ ((STATE) == TIM_OCPreload_Disable))复制代码 5 R$ g$ n2 v+ e( u, q- |+ nTIM_Output_Compare_Fast_State/** @defgroup TIM_Output_Compare_Fast_State - x3 `0 S0 b1 Q * @{ ' ~$ H2 I( c0 |2 v6 ^$ [& N */! @% O; t. K6 b" B$ Y4 F " h7 I% V: D, ~" G0 W2 W* _#define TIM_OCFast_Enable ((uint16_t)0x0004)( G5 n/ c* M! ?7 h# Q #define TIM_OCFast_Disable ((uint16_t)0x0000) % ]0 ?, @' C- R j+ h7 X+ K#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \% @; r( o8 M" X/ {. u4 r) X; n# R7 h ((STATE) == TIM_OCFast_Disable))复制代码 2 q g: w- h- o2 STIM_Output_Compare_Clear_State/** @defgroup TIM_Output_Compare_Clear_State ) U! _$ g' G1 B* i1 a. G1 B * @{) M. c" B% I/ S1 p7 E) A- t */; ?; X. _, [ N9 ` % [' b. n' _4 I9 O#define TIM_OCClear_Enable ((uint16_t)0x0080) " Y1 i, s1 L5 ]+ v#define TIM_OCClear_Disable ((uint16_t)0x0000) $ ]& V. C$ c. d0 V& l2 H# i, ^/ G3 }#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \5 P: j9 }, P4 C+ ~: y+ c" } ((STATE) == TIM_OCClear_Disable))复制代码( U1 w( h$ D4 ?& J4 D3 B& Y TIM_Trigger_Output_Source 5 q" l1 S# |4 i; o' ~+ ]7 w2 J# [, w /** @defgroup TIM_Trigger_Output_Source 7 |7 _1 M/ s, M" y8 H0 m2 Z * @{ ; f0 a$ |* U) V! e2 P) c2 U */" {+ | c' i7 G* [& ?2 I m/ U p/ ~) ~4 ~' u, B9 m ^1 U( j8 P( F#define TIM_TRGOSource_Reset ((uint16_t)0x0000)& {8 k1 ]% T$ p1 J' Q6 Z& f4 e #define TIM_TRGOSource_Enable ((uint16_t)0x0010) # A7 c0 c @) J#define TIM_TRGOSource_Update ((uint16_t)0x0020)1 ]% a( A6 y( A #define TIM_TRGOSource_OC1 ((uint16_t)0x0030) / r1 s3 G w! r4 e" k#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040) " r0 Q/ w3 j3 c% {- g- z#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)- _, H4 R4 [- O" w- Q$ a! a8 H' w* g1 |- t #define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)6 e2 e* n% d7 Q! C2 T( g7 R0 t #define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)2 }) x7 f7 l/ P4 ] #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \# ^& H; L* N9 w, q2 E ((SOURCE) == TIM_TRGOSource_Enable) || \ ) I; U+ Z7 w w ((SOURCE) == TIM_TRGOSource_Update) || \ 1 ]. p+ T1 S B# v- B M5 E ((SOURCE) == TIM_TRGOSource_OC1) || \ 7 k6 @' j; e/ A6 ]# f ((SOURCE) == TIM_TRGOSource_OC1Ref) || \ " n9 i% [1 V* V& e ((SOURCE) == TIM_TRGOSource_OC2Ref) || \ 6 G% [: i b3 {9 o V- k ((SOURCE) == TIM_TRGOSource_OC3Ref) || \ + t/ V1 F7 Y# S; p7 N$ ?' e ((SOURCE) == TIM_TRGOSource_OC4Ref))复制代码% a8 ]9 h& X1 ?5 m) h TIM_Slave_Mode , P; {: ^' z: ^' w6 d$ u2 C9 A% W8 `6 r7 b+ e3 g; A8 o$ ~( l /** @defgroup TIM_Slave_Mode * L) E. |% p& X- a4 g) H8 E3 y * @{ 6 H% }+ B* W# Y% ^/ K) V: } */ $ H3 a" Z; H# [3 s- c& ]1 J k3 ?* K) }0 n# ~% Y; E1 E7 c #define TIM_SlaveMode_Reset ((uint16_t)0x0004)% I) i; m& i$ S( W1 H- | #define TIM_SlaveMode_Gated ((uint16_t)0x0005)$ `0 \( n+ ^9 R2 ]5 H/ A5 j #define TIM_SlaveMode_Trigger ((uint16_t)0x0006) : z) V& l" y0 k8 T#define TIM_SlaveMode_External1 ((uint16_t)0x0007). ~* }' \4 l/ y( |2 L #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \8 g3 m) g3 A2 ?- l" o3 _0 P ((MODE) == TIM_SlaveMode_Gated) || \, G4 d- n! X6 L6 ]$ ^, t ((MODE) == TIM_SlaveMode_Trigger) || \8 r! P1 ]7 E) k3 Q ((MODE) == TIM_SlaveMode_External1))3 N# z! [- L5 g 复制代码 ' r# }0 n( C# Z* eTIM_Master_Slave_Mode/** @defgroup TIM_Master_Slave_Mode - `9 L9 [' R! A% P9 [" @ * @{ - l. U+ B( v2 D' U */ # r# k H2 C* `7 u: F B2 Y3 I8 {4 `( ~2 n1 B, ? h P; @ #define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)$ o* G) v, z$ O* H* Y" _ #define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)% V, d. q# G S# H #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \ F8 @1 Z+ a; l* ]6 ] ((STATE) == TIM_MasterSlaveMode_Disable))! r7 k3 }8 n i" D- C 复制代码- X- @6 v* ?$ o TIM_Remap " R8 _, }7 W3 J+ d3 ^ . y2 m; O7 P+ c. u' [0 [5 V/** @defgroup TIM_Remap U3 y7 ~4 R8 F6 v0 [ * @{ % ?0 E9 g' B: a' t6 \; d */, H( x8 u2 V: o9 W1 B ! w' W) o- h; g& E5 [' \/ k. b. I#define TIM2_TIM8_TRGO ((uint16_t)0x0000) 3 K% m; Y2 i$ q0 k#define TIM2_ETH_PTP ((uint16_t)0x0400) : X3 {( |6 d( @3 l- `#define TIM2_USBFS_SOF ((uint16_t)0x0800) - W$ \) y; s( W#define TIM2_USBHS_SOF ((uint16_t)0x0C00) ! k& B9 L7 H* x; y5 e# ` & k& _* Y1 Y. e) C" m& w' \9 T. a#define TIM5_GPIO ((uint16_t)0x0000)7 [- E% w( k" f6 G4 T( [" T #define TIM5_LSI ((uint16_t)0x0040) 0 R# Y, W2 k8 t6 a0 g6 Q#define TIM5_LSE ((uint16_t)0x0080)1 P$ q. b% r* p* d8 h' z) B( Z. i5 A7 ~ #define TIM5_RTC ((uint16_t)0x00C0) . a+ C/ E: O5 [% n9 w& y; m; {. O7 V$ t9 m( d #define TIM11_GPIO ((uint16_t)0x0000): J s }7 W X D# q' N #define TIM11_HSE ((uint16_t)0x0002)8 {7 d+ m5 e( {( [7 n# P & e: l3 D/ O/ H, ?#define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM2_TIM8_TRGO)||\: H, N6 \% V. N' n; ` ((TIM_REMAP) == TIM2_ETH_PTP)||\ ) o2 U- M0 U# Z J2 i% j1 j5 \ ((TIM_REMAP) == TIM2_USBFS_SOF)||\ 9 S) {! l/ s- u* e ((TIM_REMAP) == TIM2_USBHS_SOF)||\ * P4 U. i ?. Y T5 V ((TIM_REMAP) == TIM5_GPIO)||\/ L+ B# p# R2 F6 { ((TIM_REMAP) == TIM5_LSI)||\ . w. `* h: w3 o' X1 c& o( l ((TIM_REMAP) == TIM5_LSE)||\ - _' e$ e& n$ j- X4 E: U ((TIM_REMAP) == TIM5_RTC)||\: @5 }8 D# X+ _ ((TIM_REMAP) == TIM11_GPIO)||\+ x! I; Z: I$ c b- \9 s2 s" I ((TIM_REMAP) == TIM11_HSE))1 G( c8 f8 k$ a5 d' {4 Q# R3 ~ 复制代码! P j T' h6 Z TIM_Flags " \$ v R/ e; Q$ _ 5 {, d/ v% i% S; p/** @defgroup TIM_Flags 3 }1 N& s. A1 |4 x& K4 E * @{9 r5 K, ?$ E: M3 l5 k */: @7 _' y1 T& u+ O+ U* V3 W0 s n ; H( J( F* e4 d! T7 k- g #define TIM_FLAG_Update ((uint16_t)0x0001)6 ]. X, R3 u0 } k% z #define TIM_FLAG_CC1 ((uint16_t)0x0002)3 \1 y9 N' ~, K7 C #define TIM_FLAG_CC2 ((uint16_t)0x0004)3 U% o9 Y& y# A9 C #define TIM_FLAG_CC3 ((uint16_t)0x0008) 0 W5 [6 {6 n' j4 k' n+ Y: T#define TIM_FLAG_CC4 ((uint16_t)0x0010) 3 E7 t' w8 R/ E9 p. |#define TIM_FLAG_COM ((uint16_t)0x0020) + p# ?- U! }* u5 x* v#define TIM_FLAG_Trigger ((uint16_t)0x0040)) c% V( s: o* i- Z# @ #define TIM_FLAG_Break ((uint16_t)0x0080)" g. s, h* z; c+ n, Q; P #define TIM_FLAG_CC1OF ((uint16_t)0x0200)) r, O$ j9 ^, T* Y, Z# e #define TIM_FLAG_CC2OF ((uint16_t)0x0400)" x% y0 M5 j" ~+ A) v #define TIM_FLAG_CC3OF ((uint16_t)0x0800); ^( O9 n( \% q1 I #define TIM_FLAG_CC4OF ((uint16_t)0x1000)+ j" i2 ]- H6 P: c, M4 V #define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \( I1 D8 W" O( h+ y ?, U$ O ((FLAG) == TIM_FLAG_CC1) || \2 P# c# c$ a6 v2 n- j" o; G( L ((FLAG) == TIM_FLAG_CC2) || \, v' [8 d" f) Z/ F% Z8 z! \ ((FLAG) == TIM_FLAG_CC3) || \4 b. b3 G* Z7 w4 S! h ((FLAG) == TIM_FLAG_CC4) || \. z+ v/ r t3 R$ U ((FLAG) == TIM_FLAG_COM) || \9 [. ~: T) z! z4 ^ ((FLAG) == TIM_FLAG_Trigger) || \- T& c! T/ i: f" Y x/ Z6 Q1 ~ ((FLAG) == TIM_FLAG_Break) || \3 g, ^2 A% E2 [ ((FLAG) == TIM_FLAG_CC1OF) || \ % S7 Q, V+ @% r7 v, x/ T ((FLAG) == TIM_FLAG_CC2OF) || \ 9 N' l2 j' e2 A2 H) ?$ `. g9 k6 M ((FLAG) == TIM_FLAG_CC3OF) || \ ! z2 G) f% p# o2 ` ((FLAG) == TIM_FLAG_CC4OF))复制代码 3 n" f/ ^# t6 N其它 B/ D3 H: r9 K& R, {1 a" ]3 \ 0 P# c$ A: V* W2 @/** @defgroup TIM_Input_Capture_Filer_Value - S9 M' m0 M4 ?2 K * @{0 X; [4 V/ K1 g$ X$ z+ X4 h6 { */ % Y( {8 m7 B$ E8 W2 M" E: C" \" {! v- C& `# w: C #define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) 1 q, \: i$ A% C! q3 p) X /**. I, {" H0 F' m' E( w& s2 ? * @} # q1 n% L# x* E7 _1 d6 \4 O */ ( U* l+ h2 r$ X% L: s : f- W2 t( t5 {6 T& | /** @defgroup TIM_External_Trigger_Filter " |1 h5 B; z0 h) Q6 T& n * @{ ( Q! {0 s( l+ P3 W# C */! b" }& d, y' W ' |5 B8 u3 u3 ?* c. B #define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF) / b6 a% U; y; K; }: A/**3 b p! g) }6 l * @}" B7 K9 Z9 z) e% V* @ */ 4 |- I9 | X& D3 b , T1 A+ y) b* |/** @defgroup TIM_Legacy / J P1 |* q* N: U; C$ m; z x+ u * @{ ! T- c/ q: c' c! ~2 i7 D# l */ / r k) @1 w" V, v# O* v) p1 a' ]% D$ N7 ^6 G #define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer, j- S) s- K0 U M: i5 K) Q/ a #define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers% F- N, k4 e7 J9 u0 z8 u3 h6 k #define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers2 C5 u- h% W% D. Q% L- `% k #define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers7 W9 D1 r( Y8 c: c #define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers 8 n7 {6 m7 X. o, ? `#define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers* t- d+ H2 @# @( L #define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers$ w% _' ]# i( P$ q #define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers) [4 E% r: A& ]: z' w4 g6 S #define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers; O, L8 j" {& S A. J1 V" ^ #define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers. R) v9 u& h& X #define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers - A5 y- A! v# M& Z#define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers" q- O, D$ |! Y# ?% f: @6 [& Q #define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers M! l+ y. k4 a$ |7 u! v# k, D #define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers 8 I5 j3 u* h/ m. v. k#define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers ' L: A0 i+ z. I) C3 K6 Z#define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers & ^* D0 Z8 m) O0 _- q6 M4 E#define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers / h" s/ l/ {1 X0 i9 n" T#define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers复制代码2 u4 d0 y5 z1 w; i 03. 相关函数 2 F! P1 E- E/ w1 T2 _, M: s/* TimeBase management ********************************************************// d3 |: ^( V3 P# ]8 u( x% r void TIM_DeInit(TIM_TypeDef* TIMx); 0 A/ X7 r7 D1 h2 ]8 G jvoid TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); 4 n ]7 U# s O& m8 ^1 evoid TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); / X6 X- i+ c) i2 b8 o) Bvoid TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode); 2 k7 @' {1 K: R' ]( @( Q- W1 ?1 I* Xvoid TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode); 1 O3 Y7 j5 v+ dvoid TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter); 0 Q+ f: _0 n6 |* J2 fvoid TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload);1 V; r5 g% K& |- [5 [! i uint32_t TIM_GetCounter(TIM_TypeDef* TIMx);* q. a2 g( K* [0 B uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx); * n# z4 O) C* Kvoid TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState); U/ q! j2 f5 ` B! u2 J+ _/ C* u& Nvoid TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource); ! \- U. A8 i$ x" H9 G, `void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState); ( f. }& z) x {) g% G7 d" {void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode);, D9 B1 _$ V7 [4 c( ]& k) Y5 Y void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD);! y2 f5 h7 W: N, O; @ void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);9 f1 S, ]; Z5 m$ y. n # \% t+ P1 q2 I$ {% Q- N/* Output Compare management **************************************************/: l7 g) F/ i! E! x$ R) K/ u void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); ; @0 ]1 F, s' m. Tvoid TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); ! h1 C, L1 L* P/ Zvoid TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);. x# q( b. B. c% }, t void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);$ s% n1 d# s/ W0 a% X. a void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);7 W8 C" K6 [" e5 m void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode); , W" r! i- O; a4 ~void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1); + g, N; K# ~2 [7 m" \ Zvoid TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2);, t3 o: X% v$ m; i# }5 J7 p+ L' ^) Z void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3);6 b5 h, E7 l$ Z: K. | void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4);( o5 s5 |# L$ [! k# ` void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); 8 H- {0 i/ Y1 v, K' bvoid TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);% h+ s: y+ F& S4 B" \ void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);% M! N/ Q8 R, c7 E void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); ( _; S u1 _# f6 D& Pvoid TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); * ?9 q6 b( Z9 c% xvoid TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);9 q5 l- h5 R4 R8 S6 J$ {# [ U void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);& @1 e4 ^. I3 x void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); & f1 Q6 l) C6 i3 c: E/ |void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);6 v0 w) J S& U; A3 { void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);$ F) Y2 V& v+ g4 d: ?: x- H$ R- ` void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); + z7 O7 k; ]( h% h: j2 F6 t9 B; Hvoid TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); $ g2 Z8 ?- Z, `% I; }: @6 dvoid TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);- C* _$ f" z3 {; w; P7 w h void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); & s/ G+ ?3 J9 g* T; kvoid TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);, C( X" w0 U" X( j4 j void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);( W( M. S* P$ m: h( J void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);9 [' U; N% u0 @5 A- [! Q6 {2 M void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); 7 M* c* }1 @% w$ Nvoid TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); 3 W5 I: G4 ^4 D0 `/ t: svoid TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); ; c% t- [3 B4 s; j6 ~, @void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); ) V# [' Y( u! y) w ]8 Avoid TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);* x9 r g6 L& r8 H% C0 Y7 z void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); / h/ n7 V `+ |* M6 w: d- n( u5 Lvoid TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx); : U2 o( f( V" Z, I# ^4 avoid TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN); * ~' l5 d9 H0 M1 J5 s- w ; o7 k! }4 @4 a/ j$ k/* Input Capture management ***************************************************/8 L; y% u" B. t- {3 w7 w void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);1 Q: l3 M* ]# ], a: n void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct); . J# N* J$ ?3 U5 n# Svoid TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);9 [/ T0 l5 b, _* W. w. m5 R uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx); " _2 |: W5 d! ~4 W: S8 e' X+ E9 Huint32_t TIM_GetCapture2(TIM_TypeDef* TIMx); , r- {7 L& n; g- v, w& u- }1 e; }uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx); ( @# b/ }$ Y4 Xuint32_t TIM_GetCapture4(TIM_TypeDef* TIMx);1 S# L& |( S5 e( V void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);4 p0 f" V; t- ?; ^" R: R void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); 7 |1 o- p/ l0 W1 Vvoid TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); , v# K/ A7 `5 a) [- o- [5 Y' yvoid TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);7 a; i6 I7 a; |) e3 j h " ~& M% ?3 f1 N7 k0 s' J$ Y /* Advanced-control timers (TIM1 and TIM8) specific features ******************/ ( f# p' n) Q1 j9 I' ^! H Zvoid TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct); 2 A: X5 k+ T! s1 jvoid TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct);% I/ @8 v4 ?* x# i# |( f void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState);1 Y" O1 ~# Y( e& T' }& O4 q# o& U void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState);( g( K$ p1 I) H* k- z void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState); , d% R* i/ D3 H) R. K6 F& o* h5 G( `) R, _9 K9 @) M* ?3 m0 _ /* Interrupts, DMA and flags management ***************************************/ 8 K: G% n' Q$ @5 b: Z( Yvoid TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState); C* G3 L, ?2 @( @2 c) svoid TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource); N- M/ s% E' I0 y) ]* c8 ?" C FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); 1 R1 i1 k# M& U! u( E. T( }void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); ! G) `* g, d. b( K5 zITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT); - Q" S. S4 ?0 Bvoid TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT); ! _1 H p+ K8 W( F" n! ?void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength);: i# B6 r+ `. B3 | void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState); : Y. u2 g' P1 p: I2 ?7 Y9 tvoid TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState);- O" N% n7 w5 T% P: G: Y# q" ~ : ^8 _$ F' q$ I0 ^0 b4 l" e! j& I: m/* Clocks management **********************************************************/ y$ ]3 P. v* g, a void TIM_InternalClockConfig(TIM_TypeDef* TIMx);. c, L/ E, T {; x- u" l" O void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);5 t! o/ ]9 F5 c2 C+ _ g! ^ void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,8 m8 E/ H* r a& L% ?9 I uint16_t TIM_ICPolarity, uint16_t ICFilter); 9 k% ]# I; Q2 s1 ^7 vvoid TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, ! l! r! s( Z" z4 N+ @ uint16_t ExtTRGFilter);- t! Q0 u; \& k3 O; B void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, 1 C$ }8 {! f: a; F" A1 y) i" @ uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter); 8 g1 _5 \- W: o' \6 w7 g9 d H; B7 h7 U0 \) C! |/* Synchronization management *************************************************/, \% M' v, F0 }5 N+ F void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);# X" j4 M# O: w* A6 R7 k0 x void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource); % S; _; D" `, x7 z! `6 Evoid TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);5 _; D2 J5 {3 a void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode); 2 _! v8 D! F' _ K4 z/ bvoid TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, & h+ i$ l( J& q4 \ uint16_t ExtTRGFilter); / A( `0 f* f0 Q0 ]8 f3 a6 }; o% y1 `3 t+ ~8 \( }- p, W /* Specific interface management **********************************************/ / b% a0 l) j4 h0 X% ~3 W void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, q- ^2 f! ?6 f5 \; r2 V6 b/ X uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity); ) \* K. D, Y& @7 Dvoid TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState);( h+ v9 s& o% l3 h3 g' V . Q6 L" i3 C4 c8 I2 ^1 J/* Specific remapping management **********************************************/ ) z3 F8 K, V' N4 S4 Hvoid TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap);0 i/ S0 L1 S4 q 复制代码 1 r+ k! E3 r! T# x2 W04. 结构体封装 7 `6 M. z/ O% y( W! x/** * ^+ X9 g2 w& N2 |' h * @brief TIM ; \# I1 |5 g9 ~3 c" ^ */ 8 g4 _4 x7 V0 n7 E# v4 Y, P ( X2 }" `5 y3 N' ltypedef struct! O) D( ~/ O+ | h# g { 9 r# w, I4 L" Q* o2 j6 ]; c __IO uint16_t CR1; /*!< TIM control register 1, Address offset: 0x00 */3 R! y$ |" a' G' ?8 c uint16_t RESERVED0; /*!< Reserved, 0x02 *// X* x1 y* h& W0 @/ R/ ? __IO uint16_t CR2; /*!< TIM control register 2, Address offset: 0x04 */ ' J" i6 T: q7 t- ^ uint16_t RESERVED1; /*!< Reserved, 0x06 */ , q7 X$ }; r6 N3 H __IO uint16_t SMCR; /*!< TIM slave mode control register, Address offset: 0x08 */8 s# s: r7 ]5 s. b( f4 W0 H uint16_t RESERVED2; /*!< Reserved, 0x0A */; z6 t7 f9 J. N l+ P8 d. w$ z __IO uint16_t DIER; /*!< TIM DMA/interrupt enable register, Address offset: 0x0C */' e# U/ m2 h$ m. U, f# l uint16_t RESERVED3; /*!< Reserved, 0x0E *// h1 {( j4 i$ F __IO uint16_t SR; /*!< TIM status register, Address offset: 0x10 */( p0 B0 L$ Z$ Y i- T2 q. j$ C. ~ uint16_t RESERVED4; /*!< Reserved, 0x12 */4 G) M$ y# R) b& T, n5 y __IO uint16_t EGR; /*!< TIM event generation register, Address offset: 0x14 */$ p* X/ M ^( L3 L+ A/ Y: R uint16_t RESERVED5; /*!< Reserved, 0x16 */, a: v5 B: M1 }5 x2 Z7 v, i __IO uint16_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */ 0 f1 N( V+ p3 y9 V uint16_t RESERVED6; /*!< Reserved, 0x1A */ ( P# }( ~- f) H2 C4 b) O1 M1 ~0 }! x __IO uint16_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */$ }4 W: t7 }* s. L9 ^2 e" f$ p( ~4 H uint16_t RESERVED7; /*!< Reserved, 0x1E */5 l0 R; [* o; j4 g __IO uint16_t CCER; /*!< TIM capture/compare enable register, Address offset: 0x20 */& g" i* A' a( ^( ^4 p3 ^ uint16_t RESERVED8; /*!< Reserved, 0x22 */) h1 E2 R) i2 D% t# Q __IO uint32_t CNT; /*!< TIM counter register, Address offset: 0x24 */, U+ M' B3 C8 {+ k {0 Y __IO uint16_t PSC; /*!< TIM prescaler, Address offset: 0x28 */# p- I1 d* @6 L& D. o uint16_t RESERVED9; /*!< Reserved, 0x2A */5 b- r0 L$ T/ d __IO uint32_t ARR; /*!< TIM auto-reload register, Address offset: 0x2C */ " Y8 x, `3 h4 e- g1 p __IO uint16_t RCR; /*!< TIM repetition counter register, Address offset: 0x30 */ + V9 v( J+ x# f: w7 d( K0 N uint16_t RESERVED10; /*!< Reserved, 0x32 */6 [" d" k4 o" _8 U __IO uint32_t CCR1; /*!< TIM capture/compare register 1, Address offset: 0x34 */$ [' @1 i* Z" n: e __IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 *// L: A$ v. E0 c, I; l4 w5 ?& p7 ^ __IO uint32_t CCR3; /*!< TIM capture/compare register 3, Address offset: 0x3C */# |4 F+ M! \9 C' I __IO uint32_t CCR4; /*!< TIM capture/compare register 4, Address offset: 0x40 */. b3 y8 I4 B/ U3 |+ y; \ __IO uint16_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */- y. i( K9 F' C uint16_t RESERVED11; /*!< Reserved, 0x46 */ 4 f' t _: ~% e- L# A __IO uint16_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */ 9 ~5 ^% ?; p- i( Q; c- { uint16_t RESERVED12; /*!< Reserved, 0x4A */ ! S& U, j* t% d9 h* g __IO uint16_t DMAR; /*!< TIM DMA address for full transfer, Address offset: 0x4C */ : S3 S; W9 p+ S* o5 X3 o2 ~ uint16_t RESERVED13; /*!< Reserved, 0x4E */ , r; ?5 `" s" k& V' o( z __IO uint16_t OR; /*!< TIM option register, Address offset: 0x50 */ A0 b9 A! E" J1 i7 j* ~ uint16_t RESERVED14; /*!< Reserved, 0x52 */. ?. z7 \4 P9 q- K } TIM_TypeDef;复制代码 5 G; ?( \$ N, n0 q$ T) b. D7 h: U1 n9 ` , H) ]4 R5 j% w

[复制链接]

STMCU小助手发布时间：2022-3-31 11:00

技术帖
文章封面:
文章简介:	STM32 定时器相关函数和类型

01. TIM概述
stm32f4xx_tim.h和stm32f4xx_tim.c文件中

02. 相关类型
TIM_TimeBaseInitTypeDef

/** ) ]2 M3 J( P; d& J5 U
* @brief TIM Time Base Init structure definition
9 R, u, Q4 H( s) a5 [( H2 Q) A! X
* @note This structure is used with all TIMx except for TIM6 and TIM7. + _$ Z1 j" H5 T9 `" D' p9 K
*/5 W# {/ w- [2 G6 H7 z: B9 `
" v* ?$ y# @' I: ]8 M! v1 t6 I
typedef struct
1 \, y: r! d4 \
{: h2 C, v- _6 P4 ]5 F+ k! M
uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
6 { [- H5 P5 H5 h2 B' W
This parameter can be a number between 0x0000 and 0xFFFF */
) i+ i: ?; @' I* U, ]1 X/ W. S7 `4 S: m
O9 P$ L1 v# u6 k! w
uint16_t TIM_CounterMode; /*!< Specifies the counter mode./ j2 v$ O" B: r* w
This parameter can be a value of @ref TIM_Counter_Mode */3 X) H p7 k$ k) Y. w
! t% g; [6 V: N k& w8 B
uint32_t TIM_Period; /*!< Specifies the period value to be loaded into the active" W2 N1 ^5 p. ~. e+ t0 l/ s
Auto-Reload Register at the next update event.' I; L; }; l9 q/ {: H Y" t# B
This parameter must be a number between 0x0000 and 0xFFFF. */
+ t5 a b4 r! O0 F
1 \# D" I! g. [8 P
uint16_t TIM_ClockDivision; /*!< Specifies the clock division.% W- _) {: `- B0 s% U
This parameter can be a value of @ref TIM_Clock_Division_CKD */5 e: E1 r2 U/ ^ D
5 N E/ J, o V z6 i. r
uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
- P& A5 C8 p3 `; ?2 \# \
reaches zero, an update event is generated and counting restarts
' F! D' d) u+ y% `! |
from the RCR value (N).- Z' n$ W& D( m, U u8 n
This means in PWM mode that (N+1) corresponds to: T9 m; D/ x' U! c7 X
- the number of PWM periods in edge-aligned mode) F0 j: H1 j- @; @% W: }
- the number of half PWM period in center-aligned mode: b2 U$ R/ j i1 \+ z
This parameter must be a number between 0x00 and 0xFF.
# i$ }2 d3 w$ f! t" d5 J
@note This parameter is valid only for TIM1 and TIM8. */
% [/ e, l0 c' F y. O+ P3 G
} TIM_TimeBaseInitTypeDef; 2 D- M3 u3 r8 s2 P% j$ `* R

复制代码

TIM_OCInitTypeDef

/** " u# s8 _ {3 C: Y6 f
* @brief TIM Output Compare Init structure definition " s7 K( o [) ?+ I; y
*/
4 U4 n+ w. y7 g* n& A0 L
3 l/ W, [- h/ p: z8 \7 G
typedef struct' ?* k1 Z9 o" \. H, q
{. X7 f: k M7 {& d
uint16_t TIM_OCMode; /*!< Specifies the TIM mode.4 r+ f7 w. ^$ N2 q4 P
This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */: V( a8 |. F& l( P8 { Z$ q
* Z5 v! Y b8 ?# e
uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.6 j6 i6 @8 Q/ E' d* y7 C- h% t
This parameter can be a value of @ref TIM_Output_Compare_State */
$ y( T; t. R. a
0 _! F9 {8 W/ G! M3 p3 A
uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state.) q2 r( o4 }3 F0 v: i& w* t
This parameter can be a value of @ref TIM_Output_Compare_N_State% t$ f2 I$ i1 x; Y
@note This parameter is valid only for TIM1 and TIM8. */
$ S; r7 M* |2 |" d3 A1 y: W
4 K% a$ ]3 c6 @7 v% R
uint32_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
* n& M# F8 ~& p$ Y! ^
This parameter can be a number between 0x0000 and 0xFFFF */' B2 j8 h7 i9 @* X
3 G& a- q& T4 v* n5 E+ Y- ?
uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.9 l0 U$ ?* _# s% M5 W2 W$ n2 l
This parameter can be a value of @ref TIM_Output_Compare_Polarity */
6 v+ B& B5 B" Y; X: z1 u. j m
! t- W1 q. M2 K+ ~: }7 w
uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity.
. S$ k$ M" G7 x5 {% S
This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
5 c! [* s. ^$ M5 E$ n3 {# Z
@note This parameter is valid only for TIM1 and TIM8. */
# ]9 W! E9 L/ B
' e1 ` T; x: ~7 \ g/ R
uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.2 i6 U# A+ _' {
This parameter can be a value of @ref TIM_Output_Compare_Idle_State
4 {& L1 u. a/ e% _, o" u$ _, y* N
@note This parameter is valid only for TIM1 and TIM8. */
' A* ^$ z$ s/ i# Z" @ ]
* l) t5 m. }3 X0 i. A- t. g
uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. ~8 I" T0 p2 a. x
This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
' [. s6 e3 c+ O }1 M+ {
@note This parameter is valid only for TIM1 and TIM8. */! |) s$ g8 j# i7 c7 Y
} TIM_OCInitTypeDef;
" A( F" Y, ]) i% z; W

复制代码

TIM_ICInitTypeDef

/** / h) s( ?0 p! C
* @brief TIM Input Capture Init structure definition
" O: F" W V+ i0 L
*/. c# {, f' A4 V( t" @1 }
& L/ d% u2 w6 Q7 R; ~, s
typedef struct0 q6 X( O% M, }2 ^9 _4 _# _
{6 E% T/ \0 k" e6 w) z7 S* q6 o6 Y
2 Q J: p% q, q7 t5 g5 x, o& e
uint16_t TIM_Channel; /*!< Specifies the TIM channel.
U t/ }# v* ?& ^
This parameter can be a value of @ref TIM_Channel */
2 L( z& a0 N9 o1 u6 p" B' M
( F3 q3 r) i' C$ I
uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal.
9 Q! O3 Q) R0 |0 A3 A' `# p( C
This parameter can be a value of @ref TIM_Input_Capture_Polarity */
1 _$ T5 A" |! d, ~) I
8 `$ l0 o' }# Z4 ^0 }& F
uint16_t TIM_ICSelection; /*!< Specifies the input.
" ^, @ ^ K5 J& l. W
This parameter can be a value of @ref TIM_Input_Capture_Selection */- A) }% R& M3 v+ T
- c& x) C: m( }4 _ ^
uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler.
# i N- U$ A& M/ S1 c/ p
This parameter can be a value of @ref TIM_Input_Capture_Prescaler */3 U# `) w+ F4 H6 p. g+ D
/ _2 C- k5 Z0 S6 p: f; A
uint16_t TIM_ICFilter; /*!< Specifies the input capture filter.
4 P ~# D, F+ i
This parameter can be a number between 0x0 and 0xF */& p# _" \9 y, d# X
} TIM_ICInitTypeDef;
; ]7 m5 ?$ p: F: L% V* Q

复制代码

TIM_BDTRInitTypeDef

/** ; G- B( W# T, M
* @brief BDTR structure definition . D/ H, P C: z$ @9 r
* @note This structure is used only with TIM1 and TIM8. $ b$ \% V$ T9 o7 I. Z% O
*/# v6 u, F1 k6 v$ |& ?; }: ]
Z& f9 D) R/ O3 s
typedef struct8 Z+ z7 |6 A7 x5 L( J/ s
{
* X0 l8 z+ q$ b; N
) Z; w! v4 I; W) E
uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode.; M( e7 Z( h8 w
This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
1 D2 G5 M8 c. m( O8 _+ ~
3 G A/ ^. t' K( I3 C5 v. _
uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state.
( |3 _) f2 Z/ V' j% q V8 s# N* q
This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */# v0 Z0 r6 J H3 o& a' L9 {# e
! _9 o7 Z0 b2 ]' D1 t. c% m3 p
uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters.
8 q: d2 V0 p/ s+ w3 X
This parameter can be a value of @ref TIM_Lock_level */ # ?: G) w2 J9 D, W+ b; @ X8 p% F
T B b# B$ V
uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the
. o/ ]) ?! A& v" s
switching-on of the outputs.) j6 P2 z7 e& I' C( M* g) S4 G
This parameter can be a number between 0x00 and 0xFF */
) y& ?4 @2 M r: r, D
. j4 a& X' I- e
uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not.
7 P+ u6 g( |; J$ n1 S
This parameter can be a value of @ref TIM_Break_Input_enable_disable */
8 J$ d& j0 g6 A" y/ [; r
6 d7 s, r3 l/ S! r3 P
uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
2 U3 X# n5 V& c( B% H4 x8 v
This parameter can be a value of @ref TIM_Break_Polarity */2 A* b+ K% s4 S4 ?
* P$ h% o) g# L# T6 D6 C% p
uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
8 j, Y. s6 s' ^! F9 r* |
This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */3 o7 U6 V; O8 J8 k4 `( c
} TIM_BDTRInitTypeDef;6 |) h0 e& h1 ]; \

复制代码

TIM

; w5 \+ N! C: a# P0 I+ g, P6 z
/** @defgroup TIM_Exported_constants ) _2 M( q4 G, J _) ?
* @{
) D; ~/ [6 O" Z) g/ }, b
*/: @* y2 k) {( V4 h" Z, d% N) H4 n
g! j% p: R1 \2 L% U2 L5 r
#define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \& V7 b5 W& Q$ J# r
((PERIPH) == TIM2) || \
" V- C$ w* \7 _& E" X- T- L
((PERIPH) == TIM3) || \7 k$ W5 Q* n+ e( @1 @# ~
((PERIPH) == TIM4) || \1 R6 M5 ~0 D, C* q* d* t& i& V
((PERIPH) == TIM5) || \
5 x( r, \: K7 w5 L8 t: G6 W# X3 |2 N
((PERIPH) == TIM6) || \# t2 b( W. Z9 `9 {2 F% S% H& e
((PERIPH) == TIM7) || \
- `% T9 h$ {- i- P, g- h9 O
((PERIPH) == TIM8) || \( U( w$ j: _' I$ G( W
((PERIPH) == TIM9) || \7 ]) z7 W2 ^7 }" C+ U B0 k
((PERIPH) == TIM10) || \0 A0 E2 ~* q( l% h1 n2 Q
((PERIPH) == TIM11) || \
6 l* w* K& d* w1 }8 Z3 l0 D
((PERIPH) == TIM12) || \
3 Z: M$ N6 y, E8 _. r
(((PERIPH) == TIM13) || \5 V0 x6 u/ S) J* \( `1 Q* x
((PERIPH) == TIM14)))
, O: J& i; x) @7 w$ X C$ U( K
/* LIST1: TIM1, TIM2, TIM3, TIM4, TIM5, TIM8, TIM9, TIM10, TIM11, TIM12, TIM13 and TIM14 */ 2 f$ p# T! N: B3 z" j
#define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \: z0 ]4 c; i& h" J
((PERIPH) == TIM2) || \
' ?$ g- u, f% n* R9 R
((PERIPH) == TIM3) || \$ T) C! Y: U3 o" S8 `
((PERIPH) == TIM4) || \* ^& B6 s# e5 i' x
((PERIPH) == TIM5) || \
/ R% W$ C$ H6 c9 x/ m2 }# R ~
((PERIPH) == TIM8) || \
8 w( J: _: X+ C8 f% A
((PERIPH) == TIM9) || \
1 r/ f5 v1 ?3 J1 P' Z6 b
((PERIPH) == TIM10) || \6 v& m; O$ z$ c2 f. ~
((PERIPH) == TIM11) || \
/ ^: e1 J( {8 _) c
((PERIPH) == TIM12) || \( C$ H4 Y9 V! c. s9 u
((PERIPH) == TIM13) || \+ u. L. q1 W4 j- e# d9 ^) k* x M
((PERIPH) == TIM14))1 Z' d+ r1 s) W0 @, C' k0 w
: b' K8 @. A0 B8 R
/* LIST2: TIM1, TIM2, TIM3, TIM4, TIM5, TIM8, TIM9 and TIM12 */
$ S6 P6 V: b) b# u8 v
#define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
7 K( M4 n ^6 D& t( y
((PERIPH) == TIM2) || \. s9 ^# A: k* @, S
((PERIPH) == TIM3) || \$ b! w" {7 b- e4 h" q, {
((PERIPH) == TIM4) || \0 N0 l3 ? V; o' |/ K% q' a; F( ?7 L
((PERIPH) == TIM5) || \
9 V# P% G) |+ n: _* \; y0 E
((PERIPH) == TIM8) || \
# O, w! R4 _3 M# ]: B& I" @
((PERIPH) == TIM9) || \
9 L, o* z- J8 v% v9 @) g
((PERIPH) == TIM12))
$ m8 h/ _ ]& M7 ]% N! z8 N
/* LIST3: TIM1, TIM2, TIM3, TIM4, TIM5 and TIM8 */! P( B7 F1 i" a8 f9 z
#define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \. H( G( E* a! T* h( ~7 V6 p; h
((PERIPH) == TIM2) || \7 v U" [9 }5 v
((PERIPH) == TIM3) || \
: H) W0 Z0 ]6 A8 r }1 o( k
((PERIPH) == TIM4) || \ }$ Y8 N7 ~! F& |
((PERIPH) == TIM5) || \0 [9 E, x* I; q0 I5 b
((PERIPH) == TIM8))
5 j3 h+ M7 Y' x) A6 f
/* LIST4: TIM1 and TIM8 */
3 C# Z6 l7 r, R: Y2 [
#define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
' _: n! P, S4 y" x8 s* H
((PERIPH) == TIM8))
5 M! U; e7 p+ Z% g8 C
/* LIST5: TIM1, TIM2, TIM3, TIM4, TIM5, TIM6, TIM7 and TIM8 */
5 Z' ~3 g6 c9 _5 o# ]9 W( B
#define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
, Z6 M' b l/ l7 A! }
((PERIPH) == TIM2) || \! {+ t. f( i9 Z# n
((PERIPH) == TIM3) || \
' U8 K' ?, l# E' z& n4 r
((PERIPH) == TIM4) || \' o0 [8 d0 z( g$ [
((PERIPH) == TIM5) || \6 J; O! {% s$ f2 a% x
((PERIPH) == TIM6) || \7 Y# S0 P/ y- O" w% U j/ e* r. A) ^
((PERIPH) == TIM7) || \
& |% v; O% z7 ^* [1 K
((PERIPH) == TIM8))
# O# `4 o: f5 x1 u
/* LIST6: TIM2, TIM5 and TIM11 */
+ x' X% {5 r0 q" S: [. {( F
#define IS_TIM_LIST6_PERIPH(TIMx)(((TIMx) == TIM2) || \' [& g5 h, H+ D0 y5 p* B+ n* x9 _
((TIMx) == TIM5) || \
: s+ O' O" c* w9 G O; `
((TIMx) == TIM11))
( B4 _$ \/ m5 P

复制代码

TIM_Output_Compare_and_PWM_modes

/** @defgroup TIM_Output_Compare_and_PWM_modes # I# D4 e$ b% e4 i4 A2 [' W: r& h
* @{
% _% H$ ]2 o8 ]7 }4 U
*/- [' d3 |: t& G# }1 f+ R
2 _) e+ J5 m$ f
#define TIM_OCMode_Timing ((uint16_t)0x0000) |0 t# h- m: i1 s8 B
#define TIM_OCMode_Active ((uint16_t)0x0010). L* X) s9 [5 M1 n, V& s& ~
#define TIM_OCMode_Inactive ((uint16_t)0x0020). B. M& X- V* _2 M
#define TIM_OCMode_Toggle ((uint16_t)0x0030)! H8 L* N O0 m$ h1 i7 ^3 u4 l
#define TIM_OCMode_PWM1 ((uint16_t)0x0060)
& Y3 u; J& z! t0 j. S H
#define TIM_OCMode_PWM2 ((uint16_t)0x0070)( N! o; ~8 Q* s- U8 p) e0 I
#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \- l( C1 Q& t0 o7 k
((MODE) == TIM_OCMode_Active) || \/ {* u) x% @8 r1 z/ e6 g' p
((MODE) == TIM_OCMode_Inactive) || \
6 T0 l3 V4 g( {: W; `
((MODE) == TIM_OCMode_Toggle)|| \; H' N& n j' R8 V! L( d
((MODE) == TIM_OCMode_PWM1) || \
H# K, y9 b4 D p
((MODE) == TIM_OCMode_PWM2))& ~; E( C6 M3 H9 U7 I, A. d. a
#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
1 [& D+ @+ r" [- H' R T
((MODE) == TIM_OCMode_Active) || \
) n7 q6 A. p G( |5 U
((MODE) == TIM_OCMode_Inactive) || \ B- @; u8 A2 \& `
((MODE) == TIM_OCMode_Toggle)|| \
2 N; u3 W7 C! N1 a3 x( ]+ ?+ |
((MODE) == TIM_OCMode_PWM1) || \
( @; q3 U( D0 ?! a
((MODE) == TIM_OCMode_PWM2) || \
4 H1 B m4 u' n6 m% o% C
((MODE) == TIM_ForcedAction_Active) || \
/ C8 ?) v2 r' t
((MODE) == TIM_ForcedAction_InActive))) v- ` |! Y/ z( u8 g+ ]2 O0 ~# U

复制代码

TIM_One_Pulse_Mode

/** @defgroup TIM_One_Pulse_Mode
/ z. B. b/ Q/ q8 X# F+ s
* @{
" K& k2 `7 L \+ ~. ^( U; I
*/
6 w& W8 L8 Q( y* ?' K4 i
. c/ Q4 L0 z. y) ?
#define TIM_OPMode_Single ((uint16_t)0x0008)
, H f$ V7 U# U' c: l
#define TIM_OPMode_Repetitive ((uint16_t)0x0000)' n: r( _& H5 X y- p
#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
, ^" L8 B0 H6 j; w3 c
((MODE) == TIM_OPMode_Repetitive))

复制代码

: B$ k* X, |! [( m" `7 ^TIM_Channel

/** @defgroup TIM_Channel
/ f5 a' l7 N, {1 |
* @{
) z C: k5 [( s+ d& d/ T
*/
8 `1 i; E {+ n1 {6 W
3 e" D f: l; U
#define TIM_Channel_1 ((uint16_t)0x0000)
+ q' {/ b. f( ~! |: [4 s0 b8 q
#define TIM_Channel_2 ((uint16_t)0x0004)
/ [& d3 }- _% c% T- u% p9 ^
#define TIM_Channel_3 ((uint16_t)0x0008)# x+ C! C5 L0 `4 T+ d4 V5 t" X
#define TIM_Channel_4 ((uint16_t)0x000C)9 G( O4 g; Q2 M6 J" n1 n) g
" { i+ W3 h7 i: L: g
#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \1 `2 a, l3 v ? U
((CHANNEL) == TIM_Channel_2) || \
& W$ F* Y7 M5 ?
((CHANNEL) == TIM_Channel_3) || \: v2 Z5 g5 ~" J5 J4 e
((CHANNEL) == TIM_Channel_4))! G3 f0 T% j; e r! P
) ]8 }# ]: U3 U7 ]6 }; m
#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \4 e! W+ R9 c- }$ @! ^
((CHANNEL) == TIM_Channel_2))
, C. p, w; g9 c* }3 T, b5 x2 z
#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ N& _' G! k. X2 C7 C; W9 H
((CHANNEL) == TIM_Channel_2) || \
# M) }( W8 R5 z1 b2 H9 k, T3 k
((CHANNEL) == TIM_Channel_3))- F% ]- w8 P$ D" q9 J9 {5 \

复制代码

TIM_Clock_Division_CKD

/** @defgroup TIM_Clock_Division_CKD 2 \' l# M9 M7 I0 y2 z( N
* @{1 r' _1 S7 I% e+ a
*// ]/ o5 V T# y. C
# P, u# X5 v! z" b. L8 e
#define TIM_CKD_DIV1 ((uint16_t)0x0000)
- x$ A$ e9 N9 [( a F' _. f
#define TIM_CKD_DIV2 ((uint16_t)0x0100)6 s4 S3 h7 U9 _- a, B/ c! Z9 Y
#define TIM_CKD_DIV4 ((uint16_t)0x0200)
+ g; ]1 R* Y- z/ `; x
#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
- L4 k6 L7 x0 R i: k- n5 e
((DIV) == TIM_CKD_DIV2) || \
c6 C4 X: w- C* S
((DIV) == TIM_CKD_DIV4))" z1 N) G# V4 |4 f! X7 t2 t# W

复制代码

TIM_Counter_Mode

/** @defgroup TIM_Counter_Mode w) i0 h" F- n; R9 R8 y
* @{
1 X5 X( g- R+ S2 L5 O' \$ J# U
*/
: U. Q) w- V3 Y1 z+ B5 X* |" k# d! S
. R7 b5 M; T8 I" W0 ^
#define TIM_CounterMode_Up ((uint16_t)0x0000) t! u2 p8 U0 \' H
#define TIM_CounterMode_Down ((uint16_t)0x0010): c ^. G5 j0 w( s1 B( Z
#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
; Q1 X- O4 R/ b4 T3 |% w; B: d
#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
+ x; W2 R. u; a1 P% S7 }
#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060) _% J0 H7 D: @+ H6 m" ~4 Z; z
#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \( ?3 ~1 H3 V; K4 Y0 K8 s5 a7 I" j8 n
((MODE) == TIM_CounterMode_Down) || \
" {/ k2 _- U5 O& o1 o/ }
((MODE) == TIM_CounterMode_CenterAligned1) || \
((MODE) == TIM_CounterMode_CenterAligned2) || \' g7 K# X; A% x' ]* e- Z6 L; J
((MODE) == TIM_CounterMode_CenterAligned3))

复制代码

TIM_Output_Compare_Polarity

/** @defgroup TIM_Output_Compare_Polarity
* s' d$ P! N2 K, S
* @{: {* O/ l* _* a% @6 c
*/
& V0 ], M! e; f1 A6 i! ?: j, a* Q2 G
#define TIM_OCPolarity_High ((uint16_t)0x0000)3 v& Y# u8 _3 d. B' u! b
#define TIM_OCPolarity_Low ((uint16_t)0x0002)% v2 i, R. A& T+ x, F/ E! A2 z& m
#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
7 s% \" c" q2 F4 q& j" r) H
((POLARITY) == TIM_OCPolarity_Low))

复制代码

TIM_Output_Compare_N_Polarity

/** @defgroup TIM_Output_Compare_N_Polarity
6 M W. ~9 C/ C- f! T. y" W1 u4 W8 B
* @{
2 l3 e4 O* p- r) z f
*/
f; J" F% C- M5 a
; A' s) N: X8 y
#define TIM_OCNPolarity_High ((uint16_t)0x0000)6 R6 H3 `/ N8 H: M! D: u6 w# R
#define TIM_OCNPolarity_Low ((uint16_t)0x0008)( j6 H# \' L6 c) a
#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \7 k' V0 M: c! @( i7 q9 O/ v/ d
((POLARITY) == TIM_OCNPolarity_Low))% D* Q8 v* ?1 T5 i1 m1 f* z# W

复制代码

TIM_Output_Compare_State

/** @defgroup TIM_Output_Compare_State
& S' r5 @& d. t
* @{
t' H `' b0 R S% ^5 v: I6 z
*/
8 j! [: F0 ?0 o, T& e" w' R
. O6 J5 K) W2 J0 ^8 Q. {) y
#define TIM_OutputState_Disable ((uint16_t)0x0000)
1 a% e0 \- m+ K& H
#define TIM_OutputState_Enable ((uint16_t)0x0001)
) L% l# X; _" _- j6 Z) C, V2 ~
#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \0 ?+ B4 o% }6 B
((STATE) == TIM_OutputState_Enable))
* A' ]* z* u$ X9 T7 _

复制代码

TIM_Output_Compare_N_State

/** @defgroup TIM_Output_Compare_N_State
- T+ D3 o% B8 j9 a1 y+ L0 T
* @{5 n1 `; j' M; m' p/ Q! \
*/
9 u, J: { M) z. B: G) O! r
8 o. b2 @. Y& _6 l |1 |
#define TIM_OutputNState_Disable ((uint16_t)0x0000)
" R0 _3 j# V( s
#define TIM_OutputNState_Enable ((uint16_t)0x0004)* [1 \3 }) q3 ~6 l
#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
; q& O7 {1 P4 t3 P0 V7 K1 P ^
((STATE) == TIM_OutputNState_Enable))

复制代码

TIM_Capture_Compare_State

/** @defgroup TIM_Capture_Compare_State
" R1 D( o3 q. I( l) V' B
* @{& R. q1 U4 b8 g6 [; P
*/
/ L0 ~: }- S9 {6 b, G: t
5 L4 a9 m- m2 r6 M& G; r
#define TIM_CCx_Enable ((uint16_t)0x0001)
2 O2 k+ Q. a& z; F3 z5 ]
#define TIM_CCx_Disable ((uint16_t)0x0000)+ |: `+ M$ i$ P4 I9 c
#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
% @! [# v N. G! z5 j( v
((CCX) == TIM_CCx_Disable))

复制代码

TIM_Capture_Compare_N_State

/** @defgroup TIM_Capture_Compare_N_State. X* l. F; ]4 V% D
* @{0 N& k, } a& K
*/1 `7 |7 u2 X3 x5 V
! B; z/ E6 ]) f- ]/ J6 C! R; `& H* @
#define TIM_CCxN_Enable ((uint16_t)0x0004)
( ^! i- O/ X4 M4 V- b
#define TIM_CCxN_Disable ((uint16_t)0x0000)8 D [' v1 A% R! x8 F' U
#define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \. U8 @ c+ l0 @) N2 [7 j
((CCXN) == TIM_CCxN_Disable))

复制代码

, t `* H( T, ^6 I: lTIM_Break_Input_enable_disable

/** @defgroup TIM_Break_Input_enable_disable
9 I" n6 D# T! k7 n x; m2 g
* @{" w# H3 b1 a5 O5 j% w! z. R
*/; [5 Y9 [5 g# z2 g I
; m- B# P* T- T2 n q+ c( n
#define TIM_Break_Enable ((uint16_t)0x1000)
9 h8 O- e' Q) v& y; S) n1 K
#define TIM_Break_Disable ((uint16_t)0x0000)
, e! k! k4 R( C
#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
8 {9 U* F7 s' {: X. ?8 B
((STATE) == TIM_Break_Disable))

复制代码

TIM_Break_Polarity

/** @defgroup TIM_Break_Polarity & G2 W) J1 Y* C# N
* @{4 @! G. y9 z; {8 {4 t7 m3 @
*/
6 K/ w) t6 l- A, n6 k/ W" A8 N
% J0 g; ]- [4 \6 B( W$ {7 r* H) q& s
#define TIM_BreakPolarity_Low ((uint16_t)0x0000)7 A8 O* h1 m6 I5 |6 G3 H+ m
#define TIM_BreakPolarity_High ((uint16_t)0x2000)7 p# s% J; n+ {3 M& K4 Q3 s
#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \1 Z. z8 t4 y( d* [
((POLARITY) == TIM_BreakPolarity_High))

复制代码

TIM_AOE_Bit_Set_Reset

& P' s# D- a2 Y2 T
/** @defgroup TIM_AOE_Bit_Set_Reset z8 p# r: C1 r& ]
* @{
|# h) a, s' ?7 N
*/
9 `, L6 A/ k# R, f
! o5 Y# B( o. z9 a" a5 h. W
#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
, p2 |, B4 m( @4 C; j+ I# |- ?
#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)! O; s$ w* _+ [) H$ q& p% u9 z
#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \7 N( ]+ i% ]* x$ L! j
((STATE) == TIM_AutomaticOutput_Disable))

复制代码

TIM_Lock_level

/** @defgroup TIM_Lock_level
/ n8 Y; g U( ^6 p
* @{
* I7 Z- [' a+ y4 } x$ S
*/7 T$ P) Q1 u% ]% F1 q/ t* a
7 O- F7 I+ @9 Z: `% i
#define TIM_LOCKLevel_OFF ((uint16_t)0x0000)8 {; u9 C j( d! B! H
#define TIM_LOCKLevel_1 ((uint16_t)0x0100)
2 o, m* a3 p! R: u& e
#define TIM_LOCKLevel_2 ((uint16_t)0x0200)
0 b2 {. q/ c0 V& R+ d! h
#define TIM_LOCKLevel_3 ((uint16_t)0x0300)
, }! ^+ i5 z) b1 p
#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \1 o$ s, o& O" Z# \
((LEVEL) == TIM_LOCKLevel_1) || \
8 d2 h6 W# k# Q9 G+ C: n) d4 G
((LEVEL) == TIM_LOCKLevel_2) || \. B' P8 b: B- z9 e/ K. k4 E7 \
((LEVEL) == TIM_LOCKLevel_3))

复制代码

TIM_OSSI_Off_State_Selection_for_Idle_mode_state

5 Q+ P) ?2 c: J. ^6 Y
/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state . V7 G8 i" S+ c0 P# G- K: S/ i9 u
* @{
* E# A% b4 V- u, y% L: ?
*/
+ V" y' t, X# V- D
) S5 i9 y( j6 |9 F3 j" i* d& j
#define TIM_OSSIState_Enable ((uint16_t)0x0400)" U/ o8 D) `) H# @2 A
#define TIM_OSSIState_Disable ((uint16_t)0x0000)
0 J. P) x# I3 e" A: \. f/ r4 L
#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
- o I& L# e* E0 i$ b
((STATE) == TIM_OSSIState_Disable))

复制代码

TIM_OSSR_Off_State_Selection_for_Run_mode_state

/** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state9 h* G8 t) X$ v; B9 s5 C& _
* @{: d3 m3 V5 j0 z/ t* X
*/
1 H* x U2 C$ @
' E2 @& J; {+ L% j1 r* U3 \
#define TIM_OSSRState_Enable ((uint16_t)0x0800)
5 B+ P4 B: N+ u
#define TIM_OSSRState_Disable ((uint16_t)0x0000)& v- ~: w, r$ n8 Z7 M# r' F
#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
( a9 j3 ~2 B# B$ E4 a+ x4 ^; s
((STATE) == TIM_OSSRState_Disable))
' Q# `2 L, U) x% m2 |/ D% q

复制代码

TIM_Output_Compare_Idle_State

/** @defgroup TIM_Output_Compare_Idle_State ! s9 ~0 K. d9 [) \# v* K* ]; `
* @{" }* |" y2 Q& q3 }: {
*/+ [4 I) z+ n' h ~ G! D3 A' k
! w1 k1 k% A- z/ a( \9 C
#define TIM_OCIdleState_Set ((uint16_t)0x0100)
8 N) w% W5 h6 N# Q: E
#define TIM_OCIdleState_Reset ((uint16_t)0x0000)+ Q. x. |: E4 Q5 ?1 }/ {' @' J$ I6 l
#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
( E, L/ h6 Z7 P9 e# [
((STATE) == TIM_OCIdleState_Reset))

复制代码

$ D; {' b( _0 N7 e1 c- P
TIM_Output_Compare_N_Idle_State

/** @defgroup TIM_Output_Compare_N_Idle_State 9 {1 Y0 E" [: m
* @{
9 H- d1 a/ O6 |' [- U- ~
*/6 L; A1 {- w" X9 K
! h7 w- I: @6 d1 s" B
#define TIM_OCNIdleState_Set ((uint16_t)0x0200)
/ m- ]: q( Z4 o" Q
#define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
; X8 ~ k+ S9 i0 m' @
#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
, g2 A4 \& O; {: s) s, v/ q& q3 U
((STATE) == TIM_OCNIdleState_Reset))

复制代码

6 Y# n4 e2 {2 K2 b4 _+ |( ~/ [TIM_Input_Capture_Polarity

/** @defgroup TIM_Input_Capture_Polarity
% m9 t# T# z1 }. o( }
* @{7 E: w! g7 y i7 f+ W ^! ?
*/; w9 H0 o7 [) x9 V; |$ I; H, S1 r
! q' d2 J) f4 o1 _. k1 x1 T
#define TIM_ICPolarity_Rising ((uint16_t)0x0000): I! e E/ R6 E. W3 P9 F( b
#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
/ u, @4 ?4 K" F. W: a6 \
#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
- o9 V {) m) O" q2 P' |
#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
* l/ ]0 g' q1 B
((POLARITY) == TIM_ICPolarity_Falling)|| \
; |# U6 D- V L; N$ T! t
((POLARITY) == TIM_ICPolarity_BothEdge))

复制代码

TIM_Input_Capture_Selection

/** @defgroup TIM_Input_Capture_Selection
7 _" g+ e% y2 ^: a1 |/ \3 |
* @{
+ a8 e2 c7 ~9 a7 S+ o& ]
*/
0 s# R1 Z/ D; v& _
, g9 o# V% y$ k
#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be 2 N2 g" o, w0 N; y
connected to IC1, IC2, IC3 or IC4, respectively */
! y) {% Y3 o5 \# N% J7 X
#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be
6 R% L) x/ ?$ u
connected to IC2, IC1, IC4 or IC3, respectively. */
+ N3 n8 `4 B" {$ X" t
#define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */( j G7 X+ F; b+ J7 ?
#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \6 D+ t6 N, l* y; u4 F# V
((SELECTION) == TIM_ICSelection_IndirectTI) || \ o3 L) [4 B) Q. b/ Q, O, J
((SELECTION) == TIM_ICSelection_TRC))

复制代码

TIM_Input_Capture_Prescaler

/** @defgroup TIM_Input_Capture_Prescaler
4 P) N8 C# k/ m/ o
* @{; L: s( M( ?1 P* |0 \5 H; k$ {5 [* C6 p6 D
*/( p! v) d' ^$ I/ p# X' o) p
8 a( Y, H T W* V2 E
#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */
7 Z9 ]. f/ L4 E; q$ R7 y
#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */8 f+ l7 g+ d0 u
#define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */, T- N9 P$ p) ^, n% V
#define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */6 ~/ V. Z& @) f" J
#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \9 {# F' h. _) q
((PRESCALER) == TIM_ICPSC_DIV2) || \
" R+ C! ~0 F B, u
((PRESCALER) == TIM_ICPSC_DIV4) || \
- P! d& h) n E7 J6 k
((PRESCALER) == TIM_ICPSC_DIV8))
, t0 B `9 O( J( E

复制代码

4 M' o: O! _2 @; K8 r7 zTIM_interrupt_sources

/** @defgroup TIM_interrupt_sources
4 I& X) B/ f- L. u
* @{1 R* d3 B% ~. @4 G' j5 d
*/7 }' }! ?: ^( i2 ?: E% ]6 a$ S
4 u& e1 V1 ]6 ^3 _! e9 k
#define TIM_IT_Update ((uint16_t)0x0001), J! s: p; o! }4 n! d6 o) V. b
#define TIM_IT_CC1 ((uint16_t)0x0002)
/ j' Q7 n' S- S/ B3 \* E
#define TIM_IT_CC2 ((uint16_t)0x0004)# ~2 |" q1 s! W& A
#define TIM_IT_CC3 ((uint16_t)0x0008)
+ L" `8 ~2 a# W7 m) p" X, A
#define TIM_IT_CC4 ((uint16_t)0x0010)6 a0 I# J# N, i/ C" y
#define TIM_IT_COM ((uint16_t)0x0020)7 C7 t. Q7 k3 `" {) [. L# c
#define TIM_IT_Trigger ((uint16_t)0x0040)
* s2 c& w+ L: X# s1 `
#define TIM_IT_Break ((uint16_t)0x0080) U$ n& m6 G8 O! ?) ~) E
#define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
7 ?0 T* L, C- o8 \8 L
* B( O) @ _1 }1 |
#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
% b( Z6 L7 d4 O. A( r4 V- X% e
((IT) == TIM_IT_CC1) || \
/ P+ O* G X& e
((IT) == TIM_IT_CC2) || \1 k' U; r* t* Q4 v: N' J5 w
((IT) == TIM_IT_CC3) || \
, {1 t/ V& e, t8 p+ ] j
((IT) == TIM_IT_CC4) || \
9 c$ o& R5 ]4 T4 S2 D. F$ e) {3 i8 ]
((IT) == TIM_IT_COM) || \" h, W9 g! ?% |
((IT) == TIM_IT_Trigger) || \
/ i5 y! e) J D, E9 {# ` ~0 z
((IT) == TIM_IT_Break))

复制代码

TIM_DMA_Base_address

/** @defgroup TIM_DMA_Base_address
6 o# f4 {$ Z4 h% F( [
* @{
; o m0 Z+ W+ P$ R9 f) J
*/+ D: F8 d n4 G3 ~3 y' J9 D
! ^) z. A1 L* R6 I; ]) \) w
#define TIM_DMABase_CR1 ((uint16_t)0x0000)8 @. q8 J! a/ D$ a1 r. F
#define TIM_DMABase_CR2 ((uint16_t)0x0001): }0 y: i! ^4 ]% t
#define TIM_DMABase_SMCR ((uint16_t)0x0002)
( f* j; B0 S* V$ m8 z% T* P
#define TIM_DMABase_DIER ((uint16_t)0x0003)
#define TIM_DMABase_SR ((uint16_t)0x0004)
5 ~. W- V/ i5 x6 B
#define TIM_DMABase_EGR ((uint16_t)0x0005)
6 [/ [5 X d8 i; a" d8 r
#define TIM_DMABase_CCMR1 ((uint16_t)0x0006)3 f0 N. o- @$ X z/ ^3 S
#define TIM_DMABase_CCMR2 ((uint16_t)0x0007)! m# r2 Q+ ~+ m+ J1 b; k1 b2 X+ I
#define TIM_DMABase_CCER ((uint16_t)0x0008)
1 s4 `. g- V6 k7 }
#define TIM_DMABase_CNT ((uint16_t)0x0009)+ y5 O1 f0 V( a: t% n4 m
#define TIM_DMABase_PSC ((uint16_t)0x000A)
3 @% `" [' z2 n9 ]. H7 v' ~6 j! x
#define TIM_DMABase_ARR ((uint16_t)0x000B). B, U+ t( K/ K( W& F
#define TIM_DMABase_RCR ((uint16_t)0x000C)2 I! a5 S2 X9 q* O
#define TIM_DMABase_CCR1 ((uint16_t)0x000D)
9 n) t) L" T( F9 r0 C
#define TIM_DMABase_CCR2 ((uint16_t)0x000E)
- j8 |# `; o0 d) [7 [- }# K R9 s
#define TIM_DMABase_CCR3 ((uint16_t)0x000F)
5 E" ?- e1 ]+ X- e; |
#define TIM_DMABase_CCR4 ((uint16_t)0x0010)0 g1 B/ h0 |0 y- Y8 J7 i
#define TIM_DMABase_BDTR ((uint16_t)0x0011)
5 P- n# \1 J! W) c+ U
#define TIM_DMABase_DCR ((uint16_t)0x0012): X0 _4 E/ w: M G' H
#define TIM_DMABase_OR ((uint16_t)0x0013)
4 Q- K) m2 J p$ L! ]4 }
#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
' D1 [" K9 I S1 O$ a
((BASE) == TIM_DMABase_CR2) || \5 H7 S2 [ q, V( | l
((BASE) == TIM_DMABase_SMCR) || \
9 N9 `4 b* v1 r9 x C( o
((BASE) == TIM_DMABase_DIER) || \; `. v0 \/ w" ~0 ^- T1 ]
((BASE) == TIM_DMABase_SR) || \" C9 b( o# V, p, T0 v
((BASE) == TIM_DMABase_EGR) || \
# C2 ]. s# q* I2 N3 e7 B
((BASE) == TIM_DMABase_CCMR1) || \3 @8 ?/ C' \' b. k" i% B! f
((BASE) == TIM_DMABase_CCMR2) || \8 g6 a1 M. [+ Y
((BASE) == TIM_DMABase_CCER) || \
( Z" t( t. ?8 G, E, f# T# U, F4 R
((BASE) == TIM_DMABase_CNT) || \ `6 l2 P. s) n v0 c& k
((BASE) == TIM_DMABase_PSC) || \- e: m" I: g% t: E4 a
((BASE) == TIM_DMABase_ARR) || \
b! u6 E7 q( T
((BASE) == TIM_DMABase_RCR) || \( J5 q0 N6 z0 }5 Z; A q8 y0 J; H
((BASE) == TIM_DMABase_CCR1) || \3 N" i% X7 Y/ D/ f% @ R$ {
((BASE) == TIM_DMABase_CCR2) || \
4 y; m! o/ z8 _6 ~ T( l
((BASE) == TIM_DMABase_CCR3) || \
6 K; G+ x$ W2 Y k' i3 T
((BASE) == TIM_DMABase_CCR4) || \
3 L5 T( {9 K+ U3 M d
((BASE) == TIM_DMABase_BDTR) || \: u" W! I7 C5 m/ ?/ ~. Z/ t8 s0 ` p
((BASE) == TIM_DMABase_DCR) || \
% \5 m: b' v+ j
((BASE) == TIM_DMABase_OR))

复制代码

TIM_DMA_Burst_Length

/** @defgroup TIM_DMA_Burst_Length
* s+ u1 S K6 }# ]1 P
* @{+ O; h O" r- g0 D$ p" Y/ \2 G. D6 e
*/2 m9 y& g4 e4 U# t0 s
* a5 T) T& a0 w2 x" R9 r x
#define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)
7 J0 [6 e! d0 ?+ c
#define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)
v% I1 R% m/ N0 |3 c% H ~
#define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)5 V3 B0 c! w6 S
#define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)9 k" S5 G5 r6 N' g( T7 Y
#define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)' x$ U3 y$ B8 c: c" S
#define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500) l( t: F2 @/ o8 k
#define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)
6 h$ G+ l8 R) n2 e
#define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)
( H5 s; B1 u# m; ]% N1 l" C6 }
#define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)- |2 S5 a* S5 p$ U; |" M! D
#define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)% o w6 x, @. ~( t: Q0 Z8 `( [
#define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)# P! T4 ]; S5 K; M* G
#define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)5 U, [4 y- C. A8 ?3 e0 d' y7 k# K' k
#define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)2 k: W8 V& S, P
#define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)* L; J7 w+ X! y* N) p
#define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)
: ]5 r0 b# Z+ O6 O2 h* g
#define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)
1 W% Y& d$ w, c. W" x2 j* S* _
#define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)1 O( x l$ j) K- g, w4 g$ s
#define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)
) w7 m+ ]: o+ \% ^
#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \6 j3 O3 U C" j5 k: O
((LENGTH) == TIM_DMABurstLength_2Transfers) || \
; T8 s! s, i/ D) ^
((LENGTH) == TIM_DMABurstLength_3Transfers) || \
6 j9 ], ~7 R2 P
((LENGTH) == TIM_DMABurstLength_4Transfers) || \
0 r0 d: \# X* W+ y( y/ g; A
((LENGTH) == TIM_DMABurstLength_5Transfers) || \
! d8 l5 m3 E2 _" `% O) l& L4 [. G: C
((LENGTH) == TIM_DMABurstLength_6Transfers) || \
2 @5 I6 i& G* V) o7 T8 \
((LENGTH) == TIM_DMABurstLength_7Transfers) || \% F, c! }4 R6 Q& j5 z
((LENGTH) == TIM_DMABurstLength_8Transfers) || \. v# u' }% v) ]+ M
((LENGTH) == TIM_DMABurstLength_9Transfers) || \
% L+ \" U$ [6 p
((LENGTH) == TIM_DMABurstLength_10Transfers) || \
! v3 \& K; F) f; D
((LENGTH) == TIM_DMABurstLength_11Transfers) || \6 p% E& @) d/ f, j% Y
((LENGTH) == TIM_DMABurstLength_12Transfers) || \: m8 L7 D7 z) F1 W9 w9 P
((LENGTH) == TIM_DMABurstLength_13Transfers) || \5 Y2 O6 ]: U( }& s% ^
((LENGTH) == TIM_DMABurstLength_14Transfers) || \
1 V) u8 ? x E5 W
((LENGTH) == TIM_DMABurstLength_15Transfers) || \- g* O" |+ ]4 B* N- i
((LENGTH) == TIM_DMABurstLength_16Transfers) || \& |3 z# y5 F7 _* N) }
((LENGTH) == TIM_DMABurstLength_17Transfers) || \) g; x( I& {# S
((LENGTH) == TIM_DMABurstLength_18Transfers))
( j0 ~4 g5 R9 d3 s- Z2 P7 r% _

复制代码

TIM_DMA_sources

/** @defgroup TIM_DMA_sources 9 t% |8 b( j% ^" }" u
* @{
+ ?4 q9 z% p' X& H% u# l% E! Y
*/
# g1 N( D3 F/ s( A- W$ K, }
. P0 ~1 g( P/ p" E6 {- i$ q
#define TIM_DMA_Update ((uint16_t)0x0100)
! O; M6 M2 J; J& |( c1 X+ |
#define TIM_DMA_CC1 ((uint16_t)0x0200)
# i l# f+ g* q
#define TIM_DMA_CC2 ((uint16_t)0x0400)
W$ }3 y! {! l
#define TIM_DMA_CC3 ((uint16_t)0x0800)8 E4 h6 ~8 j7 f$ `, r) y% o
#define TIM_DMA_CC4 ((uint16_t)0x1000)- s1 D/ c. j0 a( w
#define TIM_DMA_COM ((uint16_t)0x2000)
; {! q; E8 n2 q8 O4 |
#define TIM_DMA_Trigger ((uint16_t)0x4000)
4 a7 D& T: q5 B9 v0 g
#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))

复制代码

TIM_External_Trigger_Prescaler" \: @) m8 w" `* `0 M

/** @defgroup TIM_External_Trigger_Prescaler
; L: N+ q3 I) f7 k2 a
* @{
, }; P: j5 n% M) ]
*/
+ u$ l5 k; p4 P% W+ \$ E7 X- n: L2 R
4 u5 l4 f8 a/ L' J @+ n+ R
#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
0 N' O5 x- B1 k: S
#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
0 K, b. k- `. O4 s9 v$ K3 n) Y4 K: E
#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)) o( N9 H- b* W( u9 q5 M# o8 u
#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)/ z, q a* ^0 |" @
#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
- J9 a! T" r$ d4 `# K1 |3 F, b
((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \8 m) m4 a! l- L) I
((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
( |: h; e4 F$ W* w* F2 c3 Q
((PRESCALER) == TIM_ExtTRGPSC_DIV8))

复制代码

TIM_Internal_Trigger_Selection

/** @defgroup TIM_Internal_Trigger_Selection 3 {. {5 z6 E. O0 z8 F9 w7 J0 K/ V
* @{4 }2 l9 `6 f P
*/
; X6 G; K- @" _
7 z; C6 ]6 ~3 q8 { x
#define TIM_TS_ITR0 ((uint16_t)0x0000)
, Y0 u5 u, ^% h8 y+ _/ p
#define TIM_TS_ITR1 ((uint16_t)0x0010)
1 R* x5 U) k, ] |
#define TIM_TS_ITR2 ((uint16_t)0x0020)
% m7 R+ H1 z% Y. G) i9 c# M
#define TIM_TS_ITR3 ((uint16_t)0x0030)
; H6 Y) L6 W( W( B( N# p# i I+ ~
#define TIM_TS_TI1F_ED ((uint16_t)0x0040)
7 i7 _ k/ W) }: D
#define TIM_TS_TI1FP1 ((uint16_t)0x0050)
* @6 `& X" v! B
#define TIM_TS_TI2FP2 ((uint16_t)0x0060)3 a3 T- w! [+ C4 s0 x9 V& z
#define TIM_TS_ETRF ((uint16_t)0x0070)
4 U. X; p; w; C
#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
- A: [# R# U) z/ P. s
((SELECTION) == TIM_TS_ITR1) || \
1 ^4 e& B6 Y. O3 m2 W1 O
((SELECTION) == TIM_TS_ITR2) || \: R' y+ h$ h) w8 H; n4 t) k$ z
((SELECTION) == TIM_TS_ITR3) || \
& G( ]! b. g( n/ E [+ d l
((SELECTION) == TIM_TS_TI1F_ED) || \- E9 V @& K0 k( q5 U4 a2 p
((SELECTION) == TIM_TS_TI1FP1) || \) j" p5 d; w4 _& l
((SELECTION) == TIM_TS_TI2FP2) || \
0 x" {2 L2 A* ~( _( f# A1 [0 g
((SELECTION) == TIM_TS_ETRF))
) }; N+ f Y0 S! y( m, u0 J
#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
2 Q5 e( B( f: }8 c1 c/ K9 }: h9 b
((SELECTION) == TIM_TS_ITR1) || \4 ?! M4 v& [3 ]" s" J
((SELECTION) == TIM_TS_ITR2) || \
; k( O# [& g4 ]1 }; P1 C+ O
((SELECTION) == TIM_TS_ITR3))
0 z1 h6 C/ W' G7 K) C$ T+ p

复制代码

& E( r+ q4 {/ b" r) _' @TIM_TIx_External_Clock_Source

/** @defgroup TIM_TIx_External_Clock_Source
3 K6 P9 `* G5 G0 q
* @{ b* n; l6 T0 p5 g5 C' k# h
*/
, y0 Z( C* m' M4 _
% r& Y' g. K6 x1 u. i" I
#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
2 l( e. O/ T3 J7 b/ C) e
#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)

复制代码

TIM_External_Trigger_Polarity

/** @defgroup TIM_External_Trigger_Polarity 0 z1 [' J) ]8 M) Q: w2 W
* @{' q* V- @' v$ d. Z0 k! i* P6 ~
*/ , T6 j5 d& b, c- c& x% \( b9 f
#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
4 M1 ~$ i6 a: J; d* s6 U
#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)5 C8 r( V! j" p! z7 p) V
#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
% q0 z9 S' Z5 \
((POLARITY) == TIM_ExtTRGPolarity_NonInverted))

复制代码

TIM_Prescaler_Reload_Mode

/** @defgroup TIM_Prescaler_Reload_Mode
" d/ ]/ v9 \3 x, ^- K& K# \
* @{
1 K9 I+ A7 e( v' w3 V5 G
*/, G' Z3 H; R0 O
0 p. A+ l; e" [) ]7 S# d* ]' Q
#define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
$ k3 R- C% p) Q2 K1 _
#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)8 d6 n. e+ [) y! Y* O; t0 Z0 X- W
#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
0 |% T; b( Y# e+ X
((RELOAD) == TIM_PSCReloadMode_Immediate))

复制代码

TIM_Forced_Action

/** @defgroup TIM_Forced_Action 1 j; t Y; w& V
* @{0 N3 I6 H9 X3 n! I4 o* d- W S
*/
2 h) s4 W( G! x: ^1 j
2 o! Q3 h: G2 ^( h/ D
#define TIM_ForcedAction_Active ((uint16_t)0x0050)
8 ^$ e, C: C" D4 p2 n
#define TIM_ForcedAction_InActive ((uint16_t)0x0040)% z; q; M9 b* L; J6 W- m! K: G. u
#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \0 O; B5 V4 \& U) c
((ACTION) == TIM_ForcedAction_InActive))

复制代码

TIM_Encoder_Mode

/** @defgroup TIM_Encoder_Mode 7 U. B0 l) C+ C* Y- C& W6 x
* @{
_, e9 |- N6 l& q$ ?" ?$ X
*/) L4 W" ?3 p9 \. k+ v
2 K& a2 Q0 v) [) e0 D
#define TIM_EncoderMode_TI1 ((uint16_t)0x0001)& R( }# P7 Y* m# p* P4 ]
#define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
L" S+ j0 u8 r) v
#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
: Y* K. {; r _' O+ M0 J; I% s
#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
# P' m8 `" q5 |0 \- ^/ Q1 o: {0 W- V
((MODE) == TIM_EncoderMode_TI2) || \% }* S- \$ E' G. u
((MODE) == TIM_EncoderMode_TI12))

复制代码

TIM_Event_Source

/** @defgroup TIM_Event_Source - I! V: Y4 U* Y( H
* @{% a3 w9 H% F0 P( v6 x* [
*/0 t/ R/ q1 Y" x
' I# X( }5 y9 r) W- H; l& u( J
#define TIM_EventSource_Update ((uint16_t)0x0001)
, T: j; V- }6 z
#define TIM_EventSource_CC1 ((uint16_t)0x0002)
, \1 o( O- k _/ B$ d( g, B
#define TIM_EventSource_CC2 ((uint16_t)0x0004)& D. t6 @" W# Z! B
#define TIM_EventSource_CC3 ((uint16_t)0x0008)
2 S/ ~( f- U' _7 ?* s" l& S9 B
#define TIM_EventSource_CC4 ((uint16_t)0x0010)
% i% T% ?4 N, h% X
#define TIM_EventSource_COM ((uint16_t)0x0020)! g% e, y: Z( D8 V0 t) n8 d
#define TIM_EventSource_Trigger ((uint16_t)0x0040)1 _. h0 E, N' N6 S
#define TIM_EventSource_Break ((uint16_t)0x0080)
2 F% ]$ D2 O5 ^( a
#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))

复制代码

TIM_Update_Source

/** @defgroup TIM_Update_Source . D; G4 l0 b& v+ G$ p4 Z- I) q
* @{% `& R N" @" ^5 Y7 P
*/2 F* `5 \$ R8 a) P6 p7 {# Q
' S' m" Q: j, b0 `1 [) ~
#define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow
9 A* e0 _. T: B3 _7 n6 o: ~
or the setting of UG bit, or an update generation
' J7 [# R+ v. D6 c( i$ r$ k) w
through the slave mode controller. */: n8 O M; ^) ^( g& g7 m, j2 U
#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */1 ^8 I, W' H1 t' f4 y' S
#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
1 r1 o# b/ c; X2 z# |1 J( H
((SOURCE) == TIM_UpdateSource_Regular))

复制代码

" i) ~( m: g1 ~, p4 VTIM_Output_Compare_Preload_State

/** @defgroup TIM_Output_Compare_Preload_State * |2 }% e" Y6 M, H- [
* @{
V) e/ g4 G7 k. x
*/" L" R& Q7 ~, m# K5 X
3 ] j5 K% |2 |& z7 X6 T9 N: P
#define TIM_OCPreload_Enable ((uint16_t)0x0008)
' n, [0 j7 l; M: K! }8 {
#define TIM_OCPreload_Disable ((uint16_t)0x0000)
% |6 t4 D: N" Z
#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \5 h+ ]; V: N* W5 \
((STATE) == TIM_OCPreload_Disable))

复制代码

TIM_Output_Compare_Fast_State

/** @defgroup TIM_Output_Compare_Fast_State
- x3 `0 S0 b1 Q
* @{
' ~$ H2 I( c0 |2 v6 ^$ [& N
*/! @% O; t. K6 b" B$ Y4 F
" h7 I% V: D, ~" G0 W2 W* _
#define TIM_OCFast_Enable ((uint16_t)0x0004)( G5 n/ c* M! ?7 h# Q
#define TIM_OCFast_Disable ((uint16_t)0x0000)
% ]0 ?, @' C- R j+ h7 X+ K
#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \% @; r( o8 M" X/ {. u4 r) X; n# R7 h
((STATE) == TIM_OCFast_Disable))

复制代码

TIM_Output_Compare_Clear_State

/** @defgroup TIM_Output_Compare_Clear_State
) U! _$ g' G1 B* i1 a. G1 B
* @{) M. c" B% I/ S1 p7 E) A- t
*/; ?; X. _, [ N9 `
% [' b. n' _4 I9 O
#define TIM_OCClear_Enable ((uint16_t)0x0080)
" Y1 i, s1 L5 ]+ v
#define TIM_OCClear_Disable ((uint16_t)0x0000)
$ ]& V. C$ c. d0 V& l2 H# i, ^/ G3 }
#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \5 P: j9 }, P4 C+ ~: y+ c" }
((STATE) == TIM_OCClear_Disable))

复制代码

TIM_Trigger_Output_Source

/** @defgroup TIM_Trigger_Output_Source
7 |7 _1 M/ s, M" y8 H0 m2 Z
* @{
; f0 a$ |* U) V! e2 P) c2 U
*/" {+ | c' i7 G* [& ?2 I m/ U
#define TIM_TRGOSource_Reset ((uint16_t)0x0000)& {8 k1 ]% T$ p1 J' Q6 Z& f4 e
#define TIM_TRGOSource_Enable ((uint16_t)0x0010)
# A7 c0 c @) J
#define TIM_TRGOSource_Update ((uint16_t)0x0020)1 ]% a( A6 y( A
#define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
/ r1 s3 G w! r4 e" k
#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
" r0 Q/ w3 j3 c% {- g- z
#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)- _, H4 R4 [- O" w- Q$ a! a8 H' w* g1 |- t
#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)6 e2 e* n% d7 Q! C2 T( g7 R0 t
#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)2 }) x7 f7 l/ P4 ]
#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \# ^& H; L* N9 w, q2 E
((SOURCE) == TIM_TRGOSource_Enable) || \
) I; U+ Z7 w w
((SOURCE) == TIM_TRGOSource_Update) || \
1 ]. p+ T1 S B# v- B M5 E
((SOURCE) == TIM_TRGOSource_OC1) || \
7 k6 @' j; e/ A6 ]# f
((SOURCE) == TIM_TRGOSource_OC1Ref) || \
" n9 i% [1 V* V& e
((SOURCE) == TIM_TRGOSource_OC2Ref) || \
6 G% [: i b3 {9 o V- k
((SOURCE) == TIM_TRGOSource_OC3Ref) || \
+ t/ V1 F7 Y# S; p7 N$ ?' e
((SOURCE) == TIM_TRGOSource_OC4Ref))

复制代码

TIM_Slave_Mode

/** @defgroup TIM_Slave_Mode * L) E. |% p& X- a4 g) H8 E3 y
* @{
6 H% }+ B* W# Y% ^/ K) V: }
*/
$ H3 a" Z; H# [3 s- c& ]1 J k
3 ?* K) }0 n# ~% Y; E1 E7 c
#define TIM_SlaveMode_Reset ((uint16_t)0x0004)% I) i; m& i$ S( W1 H- |
#define TIM_SlaveMode_Gated ((uint16_t)0x0005)$ `0 \( n+ ^9 R2 ]5 H/ A5 j
#define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
: z) V& l" y0 k8 T
#define TIM_SlaveMode_External1 ((uint16_t)0x0007). ~* }' \4 l/ y( |2 L
#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \8 g3 m) g3 A2 ?- l" o3 _0 P
((MODE) == TIM_SlaveMode_Gated) || \, G4 d- n! X6 L6 ]$ ^, t
((MODE) == TIM_SlaveMode_Trigger) || \8 r! P1 ]7 E) k3 Q
((MODE) == TIM_SlaveMode_External1))3 N# z! [- L5 g

复制代码

' r# }0 n( C# Z* eTIM_Master_Slave_Mode

/** @defgroup TIM_Master_Slave_Mode
- `9 L9 [' R! A% P9 [" @
* @{
- l. U+ B( v2 D' U
*/
2 n1 B, ? h P; @
#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)$ o* G) v, z$ O* H* Y" _
#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)% V, d. q# G S# H
#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \ F8 @1 Z+ a; l* ]6 ]
((STATE) == TIM_MasterSlaveMode_Disable))! r7 k3 }8 n i" D- C

复制代码

TIM_Remap

/** @defgroup TIM_Remap
U3 y7 ~4 R8 F6 v0 [
* @{
% ?0 E9 g' B: a' t6 \; d
*/, H( x8 u2 V: o9 W1 B
! w' W) o- h; g& E5 [' \/ k. b. I
#define TIM2_TIM8_TRGO ((uint16_t)0x0000)
3 K% m; Y2 i$ q0 k
#define TIM2_ETH_PTP ((uint16_t)0x0400)
: X3 {( |6 d( @3 l- `
#define TIM2_USBFS_SOF ((uint16_t)0x0800)
- W$ \) y; s( W
#define TIM2_USBHS_SOF ((uint16_t)0x0C00)
! k& B9 L7 H* x; y5 e# `
& k& _* Y1 Y. e) C" m& w' \9 T. a
#define TIM5_GPIO ((uint16_t)0x0000)7 [- E% w( k" f6 G4 T( [" T
#define TIM5_LSI ((uint16_t)0x0040)
0 R# Y, W2 k8 t6 a0 g6 Q
#define TIM5_LSE ((uint16_t)0x0080)1 P$ q. b% r* p* d8 h' z) B( Z. i5 A7 ~
#define TIM5_RTC ((uint16_t)0x00C0)
. a+ C/ E: O5 [
% n9 w& y; m; {. O7 V$ t9 m( d
#define TIM11_GPIO ((uint16_t)0x0000): J s }7 W X D# q' N
#define TIM11_HSE ((uint16_t)0x0002)8 {7 d+ m5 e( {( [7 n# P
& e: l3 D/ O/ H, ?
#define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM2_TIM8_TRGO)||\: H, N6 \% V. N' n; `
((TIM_REMAP) == TIM2_ETH_PTP)||\
) o2 U- M0 U# Z J2 i% j1 j5 \
((TIM_REMAP) == TIM2_USBFS_SOF)||\
9 S) {! l/ s- u* e
((TIM_REMAP) == TIM2_USBHS_SOF)||\
* P4 U. i ?. Y T5 V
((TIM_REMAP) == TIM5_GPIO)||\/ L+ B# p# R2 F6 {
((TIM_REMAP) == TIM5_LSI)||\
. w. `* h: w3 o' X1 c& o( l
((TIM_REMAP) == TIM5_LSE)||\
- _' e$ e& n$ j- X4 E: U
((TIM_REMAP) == TIM5_RTC)||\: @5 }8 D# X+ _
((TIM_REMAP) == TIM11_GPIO)||\+ x! I; Z: I$ c b- \9 s2 s" I
((TIM_REMAP) == TIM11_HSE))1 G( c8 f8 k$ a5 d' {4 Q# R3 ~

复制代码

TIM_Flags

/** @defgroup TIM_Flags
3 }1 N& s. A1 |4 x& K4 E
* @{9 r5 K, ?$ E: M3 l5 k
*/: @7 _' y1 T& u+ O+ U* V3 W0 s n
; H( J( F* e4 d! T7 k- g
#define TIM_FLAG_Update ((uint16_t)0x0001)6 ]. X, R3 u0 } k% z
#define TIM_FLAG_CC1 ((uint16_t)0x0002)3 \1 y9 N' ~, K7 C
#define TIM_FLAG_CC2 ((uint16_t)0x0004)3 U% o9 Y& y# A9 C
#define TIM_FLAG_CC3 ((uint16_t)0x0008)
0 W5 [6 {6 n' j4 k' n+ Y: T
#define TIM_FLAG_CC4 ((uint16_t)0x0010)
3 E7 t' w8 R/ E9 p. |
#define TIM_FLAG_COM ((uint16_t)0x0020)
+ p# ?- U! }* u5 x* v
#define TIM_FLAG_Trigger ((uint16_t)0x0040)) c% V( s: o* i- Z# @
#define TIM_FLAG_Break ((uint16_t)0x0080)" g. s, h* z; c+ n, Q; P
#define TIM_FLAG_CC1OF ((uint16_t)0x0200)) r, O$ j9 ^, T* Y, Z# e
#define TIM_FLAG_CC2OF ((uint16_t)0x0400)" x% y0 M5 j" ~+ A) v
#define TIM_FLAG_CC3OF ((uint16_t)0x0800); ^( O9 n( \% q1 I
#define TIM_FLAG_CC4OF ((uint16_t)0x1000)+ j" i2 ]- H6 P: c, M4 V
#define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \( I1 D8 W" O( h+ y ?, U$ O
((FLAG) == TIM_FLAG_CC1) || \2 P# c# c$ a6 v2 n- j" o; G( L
((FLAG) == TIM_FLAG_CC2) || \, v' [8 d" f) Z/ F% Z8 z! \
((FLAG) == TIM_FLAG_CC3) || \4 b. b3 G* Z7 w4 S! h
((FLAG) == TIM_FLAG_CC4) || \. z+ v/ r t3 R$ U
((FLAG) == TIM_FLAG_COM) || \9 [. ~: T) z! z4 ^
((FLAG) == TIM_FLAG_Trigger) || \- T& c! T/ i: f" Y x/ Z6 Q1 ~
((FLAG) == TIM_FLAG_Break) || \3 g, ^2 A% E2 [
((FLAG) == TIM_FLAG_CC1OF) || \
% S7 Q, V+ @% r7 v, x/ T
((FLAG) == TIM_FLAG_CC2OF) || \
9 N' l2 j' e2 A2 H) ?$ `. g9 k6 M
((FLAG) == TIM_FLAG_CC3OF) || \
! z2 G) f% p# o2 `
((FLAG) == TIM_FLAG_CC4OF))

复制代码

其它

/** @defgroup TIM_Input_Capture_Filer_Value - S9 M' m0 M4 ?2 K
* @{0 X; [4 V/ K1 g$ X$ z+ X4 h6 {
*/
% Y( {8 m7 B$ E8 W2 M" E: C
" \" {! v- C& `# w: C
#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) 1 q, \: i$ A% C! q3 p) X
/**. I, {" H0 F' m' E( w& s2 ?
* @}
# q1 n% L# x* E7 _1 d6 \4 O
*/ ( U* l+ h2 r$ X% L: s
: f- W2 t( t5 {6 T& |
/** @defgroup TIM_External_Trigger_Filter
" |1 h5 B; z0 h) Q6 T& n
* @{
( Q! {0 s( l+ P3 W# C
*/! b" }& d, y' W
' |5 B8 u3 u3 ?* c. B
#define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)
/ b6 a% U; y; K; }: A
/**3 b p! g) }6 l
* @}" B7 K9 Z9 z) e% V* @
*/ 4 |- I9 | X& D3 b
, T1 A+ y) b* |
/** @defgroup TIM_Legacy
/ J P1 |* q* N: U; C$ m; z x+ u
* @{
! T- c/ q: c' c! ~2 i7 D# l
*/
/ r k) @1 w" V, v# O* v) p1 a
' ]% D$ N7 ^6 G
#define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer, j- S) s- K0 U M: i5 K) Q/ a
#define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers% F- N, k4 e7 J9 u0 z8 u3 h6 k
#define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers2 C5 u- h% W% D. Q% L- `% k
#define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers7 W9 D1 r( Y8 c: c
#define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers
8 n7 {6 m7 X. o, ? `
#define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers* t- d+ H2 @# @( L
#define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers$ w% _' ]# i( P$ q
#define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers) [4 E% r: A& ]: z' w4 g6 S
#define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers; O, L8 j" {& S A. J1 V" ^
#define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers. R) v9 u& h& X
#define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers
- A5 y- A! v# M& Z
#define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers" q- O, D$ |! Y# ?% f: @6 [& Q
#define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers M! l+ y. k4 a$ |7 u! v# k, D
#define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers
8 I5 j3 u* h/ m. v. k
#define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers
' L: A0 i+ z. I) C3 K6 Z
#define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers
& ^* D0 Z8 m) O0 _- q6 M4 E
#define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers
/ h" s/ l/ {1 X0 i9 n" T
#define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers

复制代码

03. 相关函数

/* TimeBase management ********************************************************// d3 |: ^( V3 P# ]8 u( x% r
void TIM_DeInit(TIM_TypeDef* TIMx);
0 A/ X7 r7 D1 h2 ]8 G j
void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
4 n ]7 U# s O& m8 ^1 e
void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
/ X6 X- i+ c) i2 b8 o) B
void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode);
2 k7 @' {1 K: R' ]( @( Q- W1 ?1 I* X
void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode);
1 O3 Y7 j5 v+ d
void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter);
0 Q+ f: _0 n6 |* J2 f
void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload);1 V; r5 g% K& |- [5 [! i
uint32_t TIM_GetCounter(TIM_TypeDef* TIMx);* q. a2 g( K* [0 B
uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx);
* n# z4 O) C* K
void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource);
! \- U. A8 i$ x" H9 G, `
void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
( f. }& z) x {) g% G7 d" {
void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode);, D9 B1 _$ V7 [4 c( ]& k) Y5 Y
void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD);! y2 f5 h7 W: N, O; @
void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);9 f1 S, ]; Z5 m$ y. n
# \% t+ P1 q2 I$ {% Q- N
/* Output Compare management **************************************************/: l7 g) F/ i! E! x$ R) K/ u
void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
; @0 ]1 F, s' m. T
void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
! h1 C, L1 L* P/ Z
void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);. x# q( b. B. c% }, t
void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);$ s% n1 d# s/ W0 a% X. a
void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);7 W8 C" K6 [" e5 m
void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode);
, W" r! i- O; a4 ~
void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1);
+ g, N; K# ~2 [7 m" \ Z
void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2);, t3 o: X% v$ m; i# }5 J7 p+ L' ^) Z
void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3);6 b5 h, E7 l$ Z: K. |
void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4);( o5 s5 |# L$ [! k# `
void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
8 H- {0 i/ Y1 v, K' b
void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);% h+ s: y+ F& S4 B" \
void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);% M! N/ Q8 R, c7 E
void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
( _; S u1 _# f6 D& P
void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
* ?9 q6 b( Z9 c% x
void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);9 q5 l- h5 R4 R8 S6 J$ {# [ U
void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);& @1 e4 ^. I3 x
void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
& f1 Q6 l) C6 i3 c: E/ |
void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);6 v0 w) J S& U; A3 {
void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);$ F) Y2 V& v+ g4 d: ?: x- H$ R- `
void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
+ z7 O7 k; ]( h% h: j2 F6 t9 B; H
void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
$ g2 Z8 ?- Z, `% I; }: @6 d
void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);- C* _$ f" z3 {; w; P7 w h
void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
& s/ G+ ?3 J9 g* T; k
void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);, C( X" w0 U" X( j4 j
void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);( W( M. S* P$ m: h( J
void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);9 [' U; N% u0 @5 A- [! Q6 {2 M
void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
7 M* c* }1 @% w$ N
void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
3 W5 I: G4 ^4 D0 `/ t: s
void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
; c% t- [3 B4 s; j6 ~, @
void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
) V# [' Y( u! y) w ]8 A
void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);* x9 r g6 L& r8 H% C0 Y7 z
void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
/ h/ n7 V `+ |* M6 w: d- n( u5 L
void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx);
: U2 o( f( V" Z, I# ^4 a
void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN);
* ~' l5 d9 H0 M1 J5 s- w
; o7 k! }4 @4 a/ j$ k
/* Input Capture management ***************************************************/8 L; y% u" B. t- {3 w7 w
void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);1 Q: l3 M* ]# ], a: n
void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct);
. J# N* J$ ?3 U5 n# S
void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);9 [/ T0 l5 b, _* W. w. m5 R
uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx);
" _2 |: W5 d! ~4 W: S8 e' X+ E9 H
uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx);
, r- {7 L& n; g- v, w& u- }1 e; }
uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx);
( @# b/ }$ Y4 X
uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx);1 S# L& |( S5 e( V
void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);4 p0 f" V; t- ?; ^" R: R
void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
7 |1 o- p/ l0 W1 V
void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
, v# K/ A7 `5 a) [- o- [5 Y' y
void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);7 a; i6 I7 a; |) e3 j h
" ~& M% ?3 f1 N7 k0 s' J$ Y
/* Advanced-control timers (TIM1 and TIM8) specific features ******************/
( f# p' n) Q1 j9 I' ^! H Z
void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct);
2 A: X5 k+ T! s1 j
void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct);% I/ @8 v4 ?* x# i# |( f
void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState);1 Y" O1 ~# Y( e& T' }& O4 q# o& U
void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState);( g( K$ p1 I) H* k- z
void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState);
, d% R* i/ D3 H) R. K6 F
& o* h5 G( `) R, _9 K9 @) M* ?3 m0 _
/* Interrupts, DMA and flags management ***************************************/
8 K: G% n' Q$ @5 b: Z( Y
void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState);
C* G3 L, ?2 @( @2 c) s
void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource); N- M/ s% E' I0 y) ]* c8 ?" C
FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
1 R1 i1 k# M& U! u( E. T( }
void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
! G) `* g, d. b( K5 z
ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT);
- Q" S. S4 ?0 B
void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT);
! _1 H p+ K8 W( F" n! ?
void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength);: i# B6 r+ `. B3 |
void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState);
: Y. u2 g' P1 p: I2 ?7 Y9 t
void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState);- O" N% n7 w5 T% P: G: Y# q" ~
: ^8 _$ F' q$ I0 ^0 b4 l" e! j& I: m
/* Clocks management **********************************************************/ y$ ]3 P. v* g, a
void TIM_InternalClockConfig(TIM_TypeDef* TIMx);. c, L/ E, T {; x- u" l" O
void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);5 t! o/ ]9 F5 c2 C+ _ g! ^
void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,8 m8 E/ H* r a& L% ?9 I
uint16_t TIM_ICPolarity, uint16_t ICFilter);
9 k% ]# I; Q2 s1 ^7 v
void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
! l! r! s( Z" z4 N+ @
uint16_t ExtTRGFilter);- t! Q0 u; \& k3 O; B
void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
1 C$ }8 {! f: a; F" A1 y) i" @
uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
8 g1 _5 \- W: o' \6 w7 g9 d
H; B7 h7 U0 \) C! |
/* Synchronization management *************************************************/, \% M' v, F0 }5 N+ F
void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);# X" j4 M# O: w* A6 R7 k0 x
void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource);
% S; _; D" `, x7 z! `6 E
void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);5 _; D2 J5 {3 a
void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode);
2 _! v8 D! F' _ K4 z/ b
void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
& h+ i$ l( J& q4 \
uint16_t ExtTRGFilter);
/ A( `0 f* f0 Q0 ]8 f3 a6 }; o
% y1 `3 t+ ~8 \( }- p, W
/* Specific interface management **********************************************/ / b% a0 l) j4 h0 X% ~3 W
void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, q- ^2 f! ?6 f5 \; r2 V6 b/ X
uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
) \* K. D, Y& @7 D
void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState);( h+ v9 s& o% l3 h3 g' V
. Q6 L" i3 C4 c8 I2 ^1 J
/* Specific remapping management **********************************************/
) z3 F8 K, V' N4 S4 H
void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap);0 i/ S0 L1 S4 q

复制代码

04. 结构体封装

/** * ^+ X9 g2 w& N2 |' h
* @brief TIM
; \# I1 |5 g9 ~3 c" ^
*/
8 g4 _4 x7 V0 n7 E# v4 Y, P
( X2 }" `5 y3 N' l
typedef struct! O) D( ~/ O+ | h# g
{
9 r# w, I4 L" Q* o2 j6 ]; c
__IO uint16_t CR1; /*!< TIM control register 1, Address offset: 0x00 */3 R! y$ |" a' G' ?8 c
uint16_t RESERVED0; /*!< Reserved, 0x02 *// X* x1 y* h& W0 @/ R/ ?
__IO uint16_t CR2; /*!< TIM control register 2, Address offset: 0x04 */
' J" i6 T: q7 t- ^
uint16_t RESERVED1; /*!< Reserved, 0x06 */
, q7 X$ }; r6 N3 H
__IO uint16_t SMCR; /*!< TIM slave mode control register, Address offset: 0x08 */8 s# s: r7 ]5 s. b( f4 W0 H
uint16_t RESERVED2; /*!< Reserved, 0x0A */; z6 t7 f9 J. N l+ P8 d. w$ z
__IO uint16_t DIER; /*!< TIM DMA/interrupt enable register, Address offset: 0x0C */' e# U/ m2 h$ m. U, f# l
uint16_t RESERVED3; /*!< Reserved, 0x0E *// h1 {( j4 i$ F
__IO uint16_t SR; /*!< TIM status register, Address offset: 0x10 */( p0 B0 L$ Z$ Y i- T2 q. j$ C. ~
uint16_t RESERVED4; /*!< Reserved, 0x12 */4 G) M$ y# R) b& T, n5 y
__IO uint16_t EGR; /*!< TIM event generation register, Address offset: 0x14 */$ p* X/ M ^( L3 L+ A/ Y: R
uint16_t RESERVED5; /*!< Reserved, 0x16 */, a: v5 B: M1 }5 x2 Z7 v, i
__IO uint16_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */
0 f1 N( V+ p3 y9 V
uint16_t RESERVED6; /*!< Reserved, 0x1A */
( P# }( ~- f) H2 C4 b) O1 M1 ~0 }! x
__IO uint16_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */$ }4 W: t7 }* s. L9 ^2 e" f$ p( ~4 H
uint16_t RESERVED7; /*!< Reserved, 0x1E */5 l0 R; [* o; j4 g
__IO uint16_t CCER; /*!< TIM capture/compare enable register, Address offset: 0x20 */& g" i* A' a( ^( ^4 p3 ^
uint16_t RESERVED8; /*!< Reserved, 0x22 */) h1 E2 R) i2 D% t# Q
__IO uint32_t CNT; /*!< TIM counter register, Address offset: 0x24 */, U+ M' B3 C8 {+ k {0 Y
__IO uint16_t PSC; /*!< TIM prescaler, Address offset: 0x28 */# p- I1 d* @6 L& D. o
uint16_t RESERVED9; /*!< Reserved, 0x2A */5 b- r0 L$ T/ d
__IO uint32_t ARR; /*!< TIM auto-reload register, Address offset: 0x2C */
" Y8 x, `3 h4 e- g1 p
__IO uint16_t RCR; /*!< TIM repetition counter register, Address offset: 0x30 */
+ V9 v( J+ x# f: w7 d( K0 N
uint16_t RESERVED10; /*!< Reserved, 0x32 */6 [" d" k4 o" _8 U
__IO uint32_t CCR1; /*!< TIM capture/compare register 1, Address offset: 0x34 */$ [' @1 i* Z" n: e
__IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 *// L: A$ v. E0 c, I; l4 w5 ?& p7 ^
__IO uint32_t CCR3; /*!< TIM capture/compare register 3, Address offset: 0x3C */# |4 F+ M! \9 C' I
__IO uint32_t CCR4; /*!< TIM capture/compare register 4, Address offset: 0x40 */. b3 y8 I4 B/ U3 |+ y; \
__IO uint16_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */- y. i( K9 F' C
uint16_t RESERVED11; /*!< Reserved, 0x46 */
4 f' t _: ~% e- L# A
__IO uint16_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
9 ~5 ^% ?; p- i( Q; c- {
uint16_t RESERVED12; /*!< Reserved, 0x4A */
! S& U, j* t% d9 h* g
__IO uint16_t DMAR; /*!< TIM DMA address for full transfer, Address offset: 0x4C */
: S3 S; W9 p+ S* o5 X3 o2 ~
uint16_t RESERVED13; /*!< Reserved, 0x4E */
, r; ?5 `" s" k& V' o( z
__IO uint16_t OR; /*!< TIM option register, Address offset: 0x50 */
A0 b9 A! E" J1 i7 j* ~
uint16_t RESERVED14; /*!< Reserved, 0x52 */. ?. z7 \4 P9 q- K
} TIM_TypeDef;