01. DAC简介8 J& H2 I1 v- w$ o: P; m/ T# [
STM32F4的DAC模块(数字/模拟转换模块)是12位数字输入,电压输出型的DAC。DAC可以配置为 8 位或 12 位模式,也可以与 DMA 控制器配合使用。DAC 工作在 12 位模式时,数据可以设置成左对齐或右对齐。DAC 模块有 2 个输出通道,每个通道都有单独的转换器。在双 DAC 模式下,2 个通道可以独立地进行转换,也可以同时进行转换并同步地更新 2 个通道的输出。DAC 可以通过引脚输入参考电压 Vref+(通 ADC 共用)以获得更精确的转换结果。! P: i" M$ t% j5 q; e
STM32F4 的 DAC 模块主要特点有:6 `! H2 o y1 S+ ^% S% ?
① 2 个 DAC 转换器:每个转换器对应 1 个输出通道" |% c7 V0 p) {' K) @, O h( S# E- y6 ^
② 8 位或者 12 位单调输出
7 x7 w& b& y9 N7 O+ C! [③ 12 位模式下数据左对齐或者右对齐
4 D+ K1 D* S2 z" t' q$ c' p④ 同步更新功能
& N P, Y! r w2 u⑤ 噪声波形生成# i6 k2 J/ F6 B8 O
⑥ 三角波形生成3 f# l3 Z1 O1 l$ M0 K' T( ]. G3 o, e
⑦ 双 DAC 通道同时或者分别转换- \2 w2 }, Q* w; @9 L0 x: r
⑧ 每个通道都有 DMA 功能
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02. 相关类型3 h8 z A/ T6 p
DAC Init structure2 y7 w- P" G5 V# f
4 @1 q9 ?8 b' Q3 p- /**
& `7 c9 w; t. M& O/ T - * @brief DAC Init structure definition
$ A- C; z8 }& @. j& y' d - */
4 v" _9 g4 Z1 F- r
1 L/ A5 Q* ~1 r, Q" w5 t; H0 W- typedef struct
; G% E [! q8 J$ G- S; n/ k/ \9 j - {3 T; A% }: j* D6 H3 \9 K3 `
- uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
5 [% ?3 s; e' X. k S& \ - This parameter can be a value of @ref DAC_trigger_selection */
1 z. g& A! u5 b0 e- e - # j& o) P% G( s4 E
- uint32_t DAC_WaveGeneration; /*!< Specifies whether DAC channel noise waves or triangle waves. Q/ }0 R, I- n: E, e U
- are generated, or whether no wave is generated.
1 [ B2 I: A: c! A, s( m l - This parameter can be a value of @ref DAC_wave_generation */
0 } g) d. l0 P6 Y& v; V# Y - + T& d Y7 R) k7 p
- uint32_t DAC_LFSRUnmask_TriangleAmplitude; /*!< Specifies the LFSR mask for noise wave generation or3 F7 Q: P' W8 N9 f- Q8 o
- the maximum amplitude triangle generation for the DAC channel.
! V6 {* t# ]! h9 ` - This parameter can be a value of @ref DAC_lfsrunmask_triangleamplitude */
i O" d0 `, g1 _0 i - 0 X! ^$ D* n1 V0 i# a
- uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
/ P# X" R* n/ [* }+ k' l; V - This parameter can be a value of @ref DAC_output_buffer */( U i7 n' S; O* ^3 J% @* `2 L% s
- }DAC_InitTypeDef;
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) Y, Z3 A9 N: h8 pDAC_trigger_selection
8 Q" M* b) `9 ?- {/ @, ]! Y! v6 _: u' L! h a- b8 s# P
- /** @defgroup DAC_trigger_selection
# p5 O9 ?' @+ ?5 V% A% }/ h3 u - * @{
# V+ d$ |, _) E8 o' G- R - */
7 `; {/ l, x+ G - 2 b6 l, d' W8 g" A8 C9 {2 C
- #define DAC_Trigger_None ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
, a) f h! i/ @9 F6 e8 e( w8 f - has been loaded, and not by external trigger */" O+ F9 i' A4 X1 W
- #define DAC_Trigger_T2_TRGO ((uint32_t)0x00000024) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
: b* S7 [* N7 p, G3 w: ]4 F' I. h0 u - #define DAC_Trigger_T4_TRGO ((uint32_t)0x0000002C) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
) N# W/ `! @0 V1 J$ ?. Q, A/ s - #define DAC_Trigger_T5_TRGO ((uint32_t)0x0000001C) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
* e. Z/ {2 D9 \0 T1 r - #define DAC_Trigger_T6_TRGO ((uint32_t)0x00000004) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */% I) }& Q) @4 n) p+ G
- #define DAC_Trigger_T7_TRGO ((uint32_t)0x00000014) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */% N) F. T. j' c( l( l
- #define DAC_Trigger_T8_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 4 P. j+ `. S1 @7 y6 F6 i
D( O; Z9 i6 E; z- #define DAC_Trigger_Ext_IT9 ((uint32_t)0x00000034) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
* Z% u1 U/ c+ F% p" ~ ~# o* g - #define DAC_Trigger_Software ((uint32_t)0x0000003C) /*!< Conversion started by software trigger for DAC channel */6 N5 o& {5 s6 [! b4 }
- . B& w* w# [/ D) I( y" H
- #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_Trigger_None) || \
. X j8 C! u; d0 Y1 P" B% }6 s( P - ((TRIGGER) == DAC_Trigger_T6_TRGO) || \2 T2 o0 b% o' S2 ]( x( Y/ P& a
- ((TRIGGER) == DAC_Trigger_T8_TRGO) || \
1 b, I' i: _! W - ((TRIGGER) == DAC_Trigger_T7_TRGO) || \) H4 H. m) N; k: y) y$ q
- ((TRIGGER) == DAC_Trigger_T5_TRGO) || \* p2 F1 l3 z: W9 t. j9 J
- ((TRIGGER) == DAC_Trigger_T2_TRGO) || \/ s+ K2 z6 S0 [3 D, ]- t
- ((TRIGGER) == DAC_Trigger_T4_TRGO) || \) V: s' o' j# L4 W2 |9 O
- ((TRIGGER) == DAC_Trigger_Ext_IT9) || \% M9 Z8 C8 a$ i$ b" R7 N
- ((TRIGGER) == DAC_Trigger_Software))
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% [# O- e$ W* ^. s6 x7 ZDAC_wave_generation
: } ]) m- D# C/ \, N. @1 G+ K; x; W* b- g1 t& U. ?
- /** @defgroup DAC_wave_generation
7 a, s' x+ ~2 G: ~ - * @{5 i# K2 \" w, Q. ?
- */
8 i1 P/ C C- ? - 4 X' @9 ^0 K6 x# n/ ~
- #define DAC_WaveGeneration_None ((uint32_t)0x00000000)' @( ], B9 {4 R0 Y: G; J
- #define DAC_WaveGeneration_Noise ((uint32_t)0x00000040)
+ j( U/ |9 z) u; d8 X - #define DAC_WaveGeneration_Triangle ((uint32_t)0x00000080)1 `* [% Z2 K; k) @6 ^4 H
- #define IS_DAC_GENERATE_WAVE(WAVE) (((WAVE) == DAC_WaveGeneration_None) || \3 b5 V% Y/ D% Y( I% w: v5 \ Z
- ((WAVE) == DAC_WaveGeneration_Noise) || \2 ^- ~8 V- V' T8 Q# f a! z
- ((WAVE) == DAC_WaveGeneration_Triangle))
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DAC_lfsrunmask_triangleamplitude- Z3 z0 |& x( r. a0 C$ {
' u" e" m# |# Z* w/ Y2 N2 b% d
) h+ }0 L2 f- n3 a- _1 h8 e- /** @defgroup DAC_lfsrunmask_triangleamplitude
5 u1 X3 P( |; y& W - * @{2 k+ o, M8 S! v; e# U
- */2 H& o0 J; f+ f3 f
- F6 _0 o) f+ ?
- #define DAC_LFSRUnmask_Bit0 ((uint32_t)0x00000000) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */6 G% O9 r7 t1 j3 J5 U, V
- #define DAC_LFSRUnmask_Bits1_0 ((uint32_t)0x00000100) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */
5 T- E$ t) z1 x7 c/ f3 [+ V - #define DAC_LFSRUnmask_Bits2_0 ((uint32_t)0x00000200) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */4 M. P. `* q6 y
- #define DAC_LFSRUnmask_Bits3_0 ((uint32_t)0x00000300) /*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */
- m |& z! u- D0 n - #define DAC_LFSRUnmask_Bits4_0 ((uint32_t)0x00000400) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */
+ X6 ^& I. T2 \7 H* m1 N/ E9 q - #define DAC_LFSRUnmask_Bits5_0 ((uint32_t)0x00000500) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */: ?" X' n. p2 |5 P) z% a
- #define DAC_LFSRUnmask_Bits6_0 ((uint32_t)0x00000600) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */
1 N* j5 t. k ~- ^1 k - #define DAC_LFSRUnmask_Bits7_0 ((uint32_t)0x00000700) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */
1 B. N- L0 T4 c. a( E) \ - #define DAC_LFSRUnmask_Bits8_0 ((uint32_t)0x00000800) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */
# \7 V. |, X( r4 A9 t - #define DAC_LFSRUnmask_Bits9_0 ((uint32_t)0x00000900) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */
" F, @; |) F/ n, u& K0 z* P - #define DAC_LFSRUnmask_Bits10_0 ((uint32_t)0x00000A00) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */- B V- e4 T. Y5 \- {
- #define DAC_LFSRUnmask_Bits11_0 ((uint32_t)0x00000B00) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */
* ?7 e7 d+ Y4 I: k0 n1 e5 F - #define DAC_TriangleAmplitude_1 ((uint32_t)0x00000000) /*!< Select max triangle amplitude of 1 */
6 N$ T1 c0 n- }! }1 P - #define DAC_TriangleAmplitude_3 ((uint32_t)0x00000100) /*!< Select max triangle amplitude of 3 */# f# Q9 h4 s6 N
- #define DAC_TriangleAmplitude_7 ((uint32_t)0x00000200) /*!< Select max triangle amplitude of 7 */
0 ?& \" o8 @7 M, M - #define DAC_TriangleAmplitude_15 ((uint32_t)0x00000300) /*!< Select max triangle amplitude of 15 */* W( i( S9 ], @9 Z7 L
- #define DAC_TriangleAmplitude_31 ((uint32_t)0x00000400) /*!< Select max triangle amplitude of 31 */) p( [9 L, P/ ]" h3 d; b5 f, a
- #define DAC_TriangleAmplitude_63 ((uint32_t)0x00000500) /*!< Select max triangle amplitude of 63 */5 [8 d* c6 b) g- C
- #define DAC_TriangleAmplitude_127 ((uint32_t)0x00000600) /*!< Select max triangle amplitude of 127 */
0 Q+ G" |, f8 |: L/ u! i# U# v4 n" | - #define DAC_TriangleAmplitude_255 ((uint32_t)0x00000700) /*!< Select max triangle amplitude of 255 */
) {/ x" N! A) h' Q2 Z. ]2 b - #define DAC_TriangleAmplitude_511 ((uint32_t)0x00000800) /*!< Select max triangle amplitude of 511 */
$ `4 k* E9 U& \) K" y - #define DAC_TriangleAmplitude_1023 ((uint32_t)0x00000900) /*!< Select max triangle amplitude of 1023 */
: O+ J5 s4 |" J$ Q) ] - #define DAC_TriangleAmplitude_2047 ((uint32_t)0x00000A00) /*!< Select max triangle amplitude of 2047 */* B6 u2 L' B7 t8 {+ m
- #define DAC_TriangleAmplitude_4095 ((uint32_t)0x00000B00) /*!< Select max triangle amplitude of 4095 */
. \, U( T0 `1 B/ U* N - 1 V6 M ^- @: ]5 P1 m
- #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUnmask_Bit0) || \3 g( T6 O# b5 g* |; ?
- ((VALUE) == DAC_LFSRUnmask_Bits1_0) || \
: Q' f$ A2 A: \3 M - ((VALUE) == DAC_LFSRUnmask_Bits2_0) || \& u) @# N5 c7 ^1 C s
- ((VALUE) == DAC_LFSRUnmask_Bits3_0) || \: w. N& i2 {% T0 X& y' w7 C/ I
- ((VALUE) == DAC_LFSRUnmask_Bits4_0) || \; S0 h8 N9 a3 a" e/ u
- ((VALUE) == DAC_LFSRUnmask_Bits5_0) || \5 J& N4 }' i$ ?# c" j4 q; M% B& N
- ((VALUE) == DAC_LFSRUnmask_Bits6_0) || \
7 j) A& m5 ~8 p `4 D$ N - ((VALUE) == DAC_LFSRUnmask_Bits7_0) || \
# F/ s/ c) ^' O: [' O# j - ((VALUE) == DAC_LFSRUnmask_Bits8_0) || \
2 B. Q h$ y& T7 n9 v4 v& `0 H$ s - ((VALUE) == DAC_LFSRUnmask_Bits9_0) || \
8 O3 ~, k* \" _$ n+ v! I# w7 g - ((VALUE) == DAC_LFSRUnmask_Bits10_0) || \4 N( N) m; e, R' l9 u6 ~- T
- ((VALUE) == DAC_LFSRUnmask_Bits11_0) || \
' c, R$ I6 ?2 L0 E$ p' I - ((VALUE) == DAC_TriangleAmplitude_1) || \
) e) i) k3 h$ _6 \3 O* n0 h' \ - ((VALUE) == DAC_TriangleAmplitude_3) || \
8 G7 U% j% y+ ]8 T, r, H - ((VALUE) == DAC_TriangleAmplitude_7) || \
; r% a }- d1 H; p; a5 h! H! g - ((VALUE) == DAC_TriangleAmplitude_15) || \: N3 H8 L3 X3 A# G6 P& l, _
- ((VALUE) == DAC_TriangleAmplitude_31) || \; m* X' H6 q# X3 ?* x2 f6 c
- ((VALUE) == DAC_TriangleAmplitude_63) || \, E( B+ l$ ]5 w* |& g
- ((VALUE) == DAC_TriangleAmplitude_127) || \
8 N" V/ a2 q, o; y - ((VALUE) == DAC_TriangleAmplitude_255) || \
8 D3 B% J, G) j: F$ }. K& N/ S m - ((VALUE) == DAC_TriangleAmplitude_511) || \
; v. x- q: z2 o - ((VALUE) == DAC_TriangleAmplitude_1023) || \
; [( h7 B, z) ]: _0 W/ `& a - ((VALUE) == DAC_TriangleAmplitude_2047) || \
. ~) i; Q$ I7 }6 l7 F" G+ I& U - ((VALUE) == DAC_TriangleAmplitude_4095))
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' \5 U) @. Y8 X' Z# {DAC_output_buffer
9 |6 G. N3 U# f4 ?8 c
8 {! O9 {3 M/ l" O+ K- /** @defgroup DAC_output_buffer ( \" R( d z. G t9 x% b: ^
- * @{
: M; C; r N* z+ D7 X- q- E$ v - */
: A' F0 g( | `; h: i$ m - % y" ^. C7 l+ ]' s# ~
- #define DAC_OutputBuffer_Enable ((uint32_t)0x00000000)
! @; K0 I) e- i& M) E - #define DAC_OutputBuffer_Disable ((uint32_t)0x00000002)1 S+ J: ^/ Z0 X+ U3 w% R
- #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OutputBuffer_Enable) || \
5 S/ K" d6 x3 x7 |" ~# o( V( w - ((STATE) == DAC_OutputBuffer_Disable))
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# G( X* w8 |9 M& [8 T7 BDAC_Channel_selection c0 M' _' B% ~9 t' Y
! ?! j+ J2 G8 d' {2 M- /** @defgroup DAC_Channel_selection ' W9 u S+ T9 ?
- * @{
! I5 w$ E, f! B! @, L- R0 q - */
1 N- ]. ~4 r, h Z. P" G0 p - ) @ ?& \/ v8 g! n
- #define DAC_Channel_1 ((uint32_t)0x00000000)
/ K P! t1 K. {" `- U) d# x8 q - #define DAC_Channel_2 ((uint32_t)0x00000010)/ K k* \" }# w4 q- W! c4 b( H. a
- #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_Channel_1) || \
. f& ^+ [5 z- m - ((CHANNEL) == DAC_Channel_2))
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8 p a4 @$ c: L; J9 R- P' TDAC_data_alignement8 o8 C: {/ S5 _( z
3 g1 ?2 e9 f: _1 o
- /** @defgroup DAC_data_alignement 0 u& s8 ]% l$ [, F. L A" A
- * @{: I4 k' @, s# ]
- */- D& S2 m1 g1 C3 b) C5 N. @
/ c6 u0 H$ G1 v( l/ @+ R# C+ {- #define DAC_Align_12b_R ((uint32_t)0x00000000): V1 C2 h+ j/ y! b; v
- #define DAC_Align_12b_L ((uint32_t)0x00000004)
' X* q1 Y3 B6 }# t e. \. K - #define DAC_Align_8b_R ((uint32_t)0x00000008)
# I* Z: |9 w2 K" N9 V - #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_Align_12b_R) || \
& j8 _8 a3 A; Y- A" Q! H& Z9 w - ((ALIGN) == DAC_Align_12b_L) || \
8 K6 @' F5 l% E+ j& Q3 ` - ((ALIGN) == DAC_Align_8b_R))
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1 N: V# p; @+ L2 n9 }. gDAC_wave_generation
5 x$ _1 l( W$ G6 o+ X$ F3 x0 m9 |4 L: h
- /** @defgroup DAC_wave_generation
: X( d# Y: K- ]! H& b - * @{
2 J) r/ T& ? ^4 z/ K; u - */
( H" q& A$ b; W1 `; q7 Y& U
1 z7 Y; P, [* w, i& Z/ i! e1 T: ?- #define DAC_Wave_Noise ((uint32_t)0x00000040)5 i& @: d/ q2 O3 R4 q- f2 H6 ]
- #define DAC_Wave_Triangle ((uint32_t)0x00000080)
& h. a7 W6 f+ @& E( K - #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_Wave_Noise) || \3 Z2 _ b8 w T- @2 M) d
- ((WAVE) == DAC_Wave_Triangle))
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, N- Q( c4 A( t0 j) R, n其它
5 o* P3 T( o" q6 [* L: I
+ I. g a G, P9 t7 _/ H- /** @defgroup DAC_data 6 H# i4 I1 Z: E8 C
- * @{
+ o7 S2 i) R- {, | - */
2 e- O& F1 v" d - ; F3 a5 q2 g! V
- #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) 5 n N# n( ~ X+ N M
- /**
, a( D" a! d8 w/ F. s' W - * @}
, {% C& E, Z% c9 D - */8 i, y# u6 f8 D
# S, r M& c# g. k* F- /** @defgroup DAC_interrupts_definition " v- [; h- M, B, q8 M
- * @{
- r" d* M' p. l1 A- ?5 ] - */
2 w# y5 W: H7 S. V$ L - #define DAC_IT_DMAUDR ((uint32_t)0x00002000)
- ?% j' a! E, e9 {4 l/ ^1 c8 B - #define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR))
L' k' z' E- x* Z$ i; `! i
K7 h0 e1 X. t8 B, Z- /**
( C% V' {4 j9 \( }' {4 w - * @}
$ T$ w- y/ \- N) I7 z - */
+ C, ]8 }! c. @3 a. c( _6 Q
! s4 S- U) O8 t5 m# y- /** @defgroup DAC_flags_definition ' C) |# T+ D/ z8 U/ {6 S6 C; L& q) L! |
- * @{
8 C, E+ a1 {9 @! j5 y( ~ - */
# t, F& o% p% g: n$ H) v
0 M! x X {+ O, x0 g# E4 o- #define DAC_FLAG_DMAUDR ((uint32_t)0x00002000) 7 Z& Q; k$ l: e! L
- #define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR))
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03. 相关函数
& r; R6 a& N# T' _* T4 V- /* Function used to set the DAC configuration to the default reset state *****/
' E: n* y# J! F( s3 i - void DAC_DeInit(void);
% Z: S" u z5 z/ z% {8 m
- q. B7 q8 }/ `/ B- /* DAC channels configuration: trigger, output buffer, data format functions */
) C$ C, h: W/ g0 D+ E4 o - void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct);' V# g' R2 S4 B" i
- void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct);
# y* C( Q& U. d; T# ?( ?4 f$ e - void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState);
. L1 |/ Y* l& I+ A+ C3 S8 h& g0 [8 [ - void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState);; e8 n6 c& i% u2 N2 }' B V/ L2 K, [
- void DAC_DualSoftwareTriggerCmd(FunctionalState NewState);
! i- m8 X, M3 }; {8 U - void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState);
* o, J/ _7 M- O# b l3 [ - void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data);: x6 _) s" d) H+ I/ d6 `" |
- void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data);
, T0 D2 @% N4 a" A! p* b! Q - void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1);: ]" W* s+ {3 t; [
- uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel);
& W; N, G2 h/ ]/ m/ P
6 y( P( f7 ^( a0 _. ? c8 o- /* DMA management functions ***************************************************/
+ z2 [* C; Z0 y. D" c! m - void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState);' n$ [7 y2 c0 y6 Q7 X* a7 l
$ T' ?7 p3 _' F2 A" I- /* Interrupts and flags management functions **********************************/# K0 o6 i, }* G& B$ y" f% j" H
- void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState);
0 x7 t1 W1 u& J% J8 B- h- p - FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG);0 b' D6 |" J- w; W, I |
- void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG);
$ b* E: l4 O! O" M* I: D/ e - ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT);; M; p) J( ?0 k* Y
- void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT);
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04. 结构体封装: i/ i. T) ^1 K, U/ ^
- /** ) ?9 b: u# `: K: ^" K$ @
- * @brief Digital to Analog Converter
8 i3 ?& Z' d- R - */+ [+ }8 w" z. i: p, M, J5 J5 H
- 4 B8 r3 t* M: [ S! b
- typedef struct
1 k1 A8 F, S6 C" A& o: w3 q - {# `$ |7 }' {2 V6 M- y, M
- __IO uint32_t CR; /*!< DAC control register, Address offset: 0x00 */
" R/ E/ ?4 f( s5 v6 D2 X8 l - __IO uint32_t SWTRIGR; /*!< DAC software trigger register, Address offset: 0x04 */
# j' P) f: ]5 g3 J! ` - __IO uint32_t DHR12R1; /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */1 R1 d2 @' n2 N$ t3 `5 E7 N
- __IO uint32_t DHR12L1; /*!< DAC channel1 12-bit left aligned data holding register, Address offset: 0x0C */ R& P4 d: P$ X* L/ U7 R/ c
- __IO uint32_t DHR8R1; /*!< DAC channel1 8-bit right aligned data holding register, Address offset: 0x10 */
. q7 \7 S7 R+ f+ E& X0 J - __IO uint32_t DHR12R2; /*!< DAC channel2 12-bit right aligned data holding register, Address offset: 0x14 */! {$ G2 ]- v' ]: l) d
- __IO uint32_t DHR12L2; /*!< DAC channel2 12-bit left aligned data holding register, Address offset: 0x18 */4 ^8 Z- J/ v, f/ |; K C
- __IO uint32_t DHR8R2; /*!< DAC channel2 8-bit right-aligned data holding register, Address offset: 0x1C */
5 v; w, |" f1 C3 ~' i& \ - __IO uint32_t DHR12RD; /*!< Dual DAC 12-bit right-aligned data holding register, Address offset: 0x20 */
' M# A& A! h' C2 M; s, } z( z8 I6 L - __IO uint32_t DHR12LD; /*!< DUAL DAC 12-bit left aligned data holding register, Address offset: 0x24 */; q+ R. D, o1 Y* {
- __IO uint32_t DHR8RD; /*!< DUAL DAC 8-bit right aligned data holding register, Address offset: 0x28 */6 E7 A+ L1 A+ u; b6 a) B
- __IO uint32_t DOR1; /*!< DAC channel1 data output register, Address offset: 0x2C */7 n+ ?8 O; \7 h+ ?/ a o, O U
- __IO uint32_t DOR2; /*!< DAC channel2 data output register, Address offset: 0x30 */
/ ?2 m/ V8 v6 h" c - __IO uint32_t SR; /*!< DAC status register, Address offset: 0x34 */
4 K* O4 w- H: z c/ a# { - } DAC_TypeDef;
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