- /******************** (C) COPYRIGHT 2012 WildFire Team **************************
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- **********************************************************************************/. j& E& G; f) s% u' x1 o- Z! `5 ^. H* z
- #include "stm32f10x.h"
- u& z. X( E$ I0 D8 _/ |& \ - #include "stm32f10x_conf.h "
+ S4 d3 C5 X7 L' z - #define BufferSize 32
C( R& W( g: l7 b4 S - __IO uint32_t CurrDataCounterBegin = 0;
) Y" Z e0 Z" q! C9 ] - __IO uint32_t CurrDataCounterEnd = 0x01; /* This variable should not be initialized to 0 */
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' t3 [4 o7 |( k& P2 m2 v- void Delay(__IO u32 nCount);- d# z" {0 Q4 N4 k, G, P& z
- void RCC_DMA1_Config(void);
' [% p+ ]( y1 F' A( \) J - void NVIC_Configuration(void);: l9 a# D3 B. U: S; C
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- const uint32_t SRC_Const_Buffer[BufferSize]=
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- 0x01020304,0x05060708,0x090A0B0C,0x0D0E0F10,
2 d4 g6 P, v7 K" D5 {* F% g - 0x11121314,0x15161718,0x191A1B1C,0x1D1E1F20,
8 O9 T6 b2 ^- G$ ]) W* B$ |: ^ - 0x21222324,0x25262728,0x292A2B2C,0x2D2E2F30,
) \0 r% C4 ]% w! j9 I y - 0x31323334,0x35363738,0x393A3B3C,0x3D3E3F40,
. S. k+ ]' r) _5 @ - 0x41424344,0x45464748,0x494A4B4C,0x4D4E4F50,, t. }! w( A5 E/ L! U- C6 i
- 0x51525354,0x55565758,0x595A5B5C,0x5D5E5F60,$ B0 X- x4 Q+ `- G7 z% K
- 0x61626364,0x65666768,0x696A6B6C,0x6D6E6F70,
1 Q+ n/ a8 j, e4 V; a7 U - 0x71727374,0x75767778,0x797A7B7C,0x7D7E7F80
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- uint32_t DST_Buffer[BufferSize];
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- uint16_t COUNT = 0;
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5 Y: n6 r' r' n0 _ - int main(void)
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) k0 p2 u( C& E - NVIC_InitTypeDef NVIC_InitStructure;
: S( R! H. Z" d, M/ M* p0 K - DMA_InitTypeDef DMA_InitStructure;) O: _0 P/ i: ?9 Z9 y {! i
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) M' q# e6 v( G$ N! Z, ^8 d - //RCC_DMA1_Config();9 M% z$ A3 F# D3 n# u& L# O
- //NVIC_Configuration();
: J+ E _/ h2 g- Y - RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);+ x6 v2 {; P/ C# Z
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2 v; k1 y @( h% r8 V( N - /* Enable DMA1 channel6 IRQ Channel */
2 n. I' ?& Q5 L: r; n - NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel6_IRQn;
. u) K5 a& Q% { - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;" X- b9 F* y6 o) w% D' R9 b
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+ i1 k5 W; d' e9 G" d8 t - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;2 R( }3 U- g( P3 d' r; J
- NVIC_Init(&NVIC_InitStructure);
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- /* DMA1 channel6 configuration */! ]: \2 l8 d- R4 P0 l
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- DMA_DeInit(DMA1_Channel6); //DMA channel# l8 p) G) [: j
- DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SRC_Const_Buffer; //source bass address
9 {% v! E: y' l1 s9 O6 o - DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)DST_Buffer; //density bass address
- S- y2 @& t6 \# @ i$ W - DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; //direction: source to density
2 H! o" ~4 B2 W, O) w; _ - DMA_InitStructure.DMA_BufferSize = BufferSize; //size one time6 |1 N- C. Z% `" ~$ G( k6 }& @+ D
- DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable; //source add plus auto
2 O: v% A0 N8 j. @. M5 N - DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //density add plus auto" g6 Y- ]! C+ [% m7 v/ O; V( c
- DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; //unit of source data6 n5 h5 v& T" }: K# f: v; I& x
- DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; //unit of density data
/ \) |4 u6 A" E - DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; //one cycle mode
" d$ Q ` S% N# u& c- r. W1 M: j! } - DMA_InitStructure.DMA_Priority = DMA_Priority_High; //piority : high! R3 {4 f7 x/ Y7 ~! K5 V
- DMA_InitStructure.DMA_M2M = DMA_M2M_Enable; //memory to memory mode6 n- ?+ r6 Y2 c$ b. f) S# a
- DMA_Init(DMA1_Channel6, &DMA_InitStructure);//
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- /* Enable DMA1 Channel6 Transfer Complete interrupt */1 w4 [% o/ f& L0 n q
- DMA_ITConfig(DMA1_Channel6, DMA_IT_TC, ENABLE); //enable interrupt of dma+ b$ ]2 F J% w1 c: {: h
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- /* Get Current Data Counter value before transfer begins */
& B9 i% C5 X- b! Z( |% V - CurrDataCounterBegin = DMA_GetCurrDataCounter(DMA1_Channel6);+ C5 z9 `4 m6 X% S. p
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- /* Enable DMA1 Channel6 transfer */ u' ]% ?3 Q! A$ `
- DMA_Cmd(DMA1_Channel6, ENABLE); //in memory to memory mode , enable is to start transfer
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j' }: v: q$ K+ C. |) @- while (CurrDataCounterEnd != 0)
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- while (1)
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- void Delay(__IO u32 nCount) //简单的延时函数# `3 D8 j% F" V8 H
- {
3 H3 M2 z2 {7 [ - for(; nCount != 0; nCount--);. D3 {5 w; J5 G# u7 _5 t4 s3 ]4 R' u
- }
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" @6 C$ B, t3 y- ?" M- R2 [- void RCC_DMA1_Config(void)
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- /* Enable peripheral clocks ------------------------------------------------*/
4 X% u8 z$ q4 k- }: b - /* Enable DMA1 clock */3 s; y: W( V& y2 u. u2 K& j x& b
- RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);4 ^4 i4 p6 [6 a# q6 ?$ o
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8 c( h9 \$ e$ L- void NVIC_Configuration(void)
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! k) e4 s" N8 Y D8 p$ S( k: i - NVIC_InitTypeDef NVIC_InitStructure;
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! F, p# ^1 k+ p5 P - /* Enable DMA1 channel6 IRQ Channel */) C8 f/ J. [% J1 d* M# p) Y! M' f- R
- NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel6_IRQn;
0 Q7 Z# }" w% N- [# C - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
4 S& b, n# B+ e9 k! c# o# } - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;0 _# M# w6 W; W9 @$ D
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+ M: z. {2 v6 F2 W - NVIC_Init(&NVIC_InitStructure);
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! T" I2 |$ H% e4 i" `4 I) t' q- /******************* (C) COPYRIGHT 2012 WildFire Team *****END OF FILE************/; R' K8 o5 K: i# E# v- p
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- void DMA1_Channel6_IRQHandler(void)* ~+ E [% {, @2 ~; U& D, i" R% D1 W: j
- {
- f2 |) m Z7 ^/ T% Z' o9 p" E# c - /* Test on DMA1 Channel6 Transfer Complete interrupt */
4 {& y% p# b6 l - if(DMA_GetITStatus(DMA1_IT_TC6))5 B T7 }8 V4 B4 B
- {
. x. s4 e% `. J5 b) y3 F - /* Get Current Data Counter value after complete transfer */
5 e7 k) L% T) f8 T - CurrDataCounterEnd = DMA_GetCurrDataCounter(DMA1_Channel6);. [) k' g. N: O
- /* Clear DMA1 Channel6 Half Transfer, Transfer Complete and Global interrupt pending bits */1 L+ j9 \& `7 o8 P
- DMA_ClearITPendingBit(DMA1_IT_GL6);
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