/**这里是STM32比较重要的头文件
- L& H1 u" J$ }( K! A1 y6 } ******************************************************************************" q Z- j# [* S1 e
* @file stm32f10x.h ST 标准的头文件7 d$ S c+ H+ w4 [5 Q
* @author MCD Application Team 微控制器开发小组。
* r) n2 W3 ^3 V) O: ^ * @version V3.5.0 版本% |* s4 t2 I' {/ L- o- m1 E) v" m
* @date 11-March-2011 2011年3月113 x, Z) p( d" [- }2 {! x! z2 w
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File.(CMSIS：Cortex Microcontroller Software Interface Standard) 是 Cortex-M 处理器系列的与供应商无关的硬件抽象层。
! d" p4 u6 U0 b6 g2 ~) D; l0 T * This file contains all the peripheral register’s definitions, bits
: V5 f8 L# R' n& I- i * definitions and memory mapping for STM32F10x Connectivity line, ( q& N! T8 F! O
* High density, High density value line, Medium density, Y2 r, P4 Q9 l) G* l' ^/ k( Z
* Medium density Value line, Low density, Low density Value line
8 _4 T( e5 O, Y3 V( a( v; p d$ ? * and XL-density devices.
6 A" w6 ~8 Q) S- R * 这个文件包含了芯片STM32F10X（接口增强型）内部的寄存器定义，位定义，内存地址变换定义，还有一些相应的高密度，低密度产品线的设备。; I6 u2 U1 M' C2 W+ S" n5 X9 u
( j. L* v |8 F- L% d* j V* r* The file is the unique include file that the application programmer! x$ _& m- D0 T; Z! E& p9 u+ }0 C
* is using in the C source code, usually in main.c. This file contains:& h( H$ i8 }$ o4 ~
* - Configuration section that allows to select:9 o$ i! H t1 j: ]! J
* - The device used in the target application
/ s' _) H- {: F) S: h; V' e% [+ Q * - To use or not the peripherals drivers in application code(i.e. " R4 i' J' Q T3 V' u1 z2 G i
* code will be based on direct access to peripherals registers
' X8 B, F+ o7 X6 } * rather than drivers API), this option is controlled by
7 u8 w, G# Z, ]) B * “#define USE_STDPERIPH_DRIVER”
, z, a I* \- M- [6 e * - To change few application-specific parameters such as the HSE $ D3 |% s! h/ K; O3 L
* crystal frequency1 P. d" P7 B/ X2 Z7 n
* - Data structures and the address mapping for all peripherals4 q; d W4 }) ], ?
* - Peripheral’s registers declarations and bits definition! _6 V7 @3 u- M) Z8 {6 n
* - Macros to access peripheral registers hardware# a# R7 w6 D$ f" y
*这个文件在应用程序中是至关重要的头文件，它是用C代码编写而成。通常包括在MAIN主程序中。它包括：1 设备中使用的目标应用程序。4 o7 |, g3 X7 b; X4 t6 S
2 决定是否使用外部设备的代码（例如使用基于寄存器的代码，而不是我们所熟悉的API应用程序接口代码）。这一设备可以通过设置 ”#define USE_STDPERIPH_DRIVER” 来实现。
' O, F4 j0 f8 J$ s* V) `3 通过这一文件可以改变诸如外部设备的频率参数。
4 q+ f; T7 d7 l0 w8 [4 可以了解程序的数据结构以及外设的地址映射。, |) D9 s6 x! c" @2 A
5 外设的寄存器声明和位定义可以在这个文件里面了解到。3 h$ j+ K0 F6 J. N- J7 ^. s- |
) q0 q: z2 u" p( |; m' l4 | ******************************************************************************4 L5 x( C7 r+ Z6 A
* @attention* `7 V, t4 z4 }1 Q
*
) y: ]0 t' F$ `5 i' { * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
& M$ @0 |' O/ ~" Q! O2 H- g * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
1 y" ?" ~% J6 Q9 Z! N s * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY" Y1 m! u) T$ Q4 L$ Z' q; S; B$ p
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
1 u& ?) U" @% C5 v/ ^# \3 q * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
2 t1 u; u" G0 d * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.2 E+ I) a6 P+ N% N" Y: O
*注意：这一文件代码供应给用户，旨在帮助用户提升效率节约时间。ST将不会提供任何对于用户自己代码的解释和帮助。也不会解决其在代码中的任何BUG。: d) k& ^" z! L2 x
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
2 L; L& b4 u( s5 y9 D; X ******************************************************************************: j4 @$ z- D2 H) Q3 f
*/' F6 ]" }3 m$ ^3 B/ w7 a
8 @4 {$ r& Z, H7 ~/** @addtogroup CMSIS/ i4 T2 S% q- f5 {: z$ e& x
* @{
3 }) }2 O6 w+ W- o* Z0 Z7 k0 F */这个不需要关心，只是说明这个文件的作者，公司产品等等，你贴出来的估计是小小的广而告之，这也是程序员的一点小小的特权嘛6 ~8 v, v8 j/ K! G6 b$ {
S v9 a# |$ E) @
/** @addtogroup stm32f10x
# A: a) I+ x) ` * @{
( U* m/ J+ i( I: u/ q( ` */: Q; X' e8 H9 L3 s$ N( m/ {5 r# p
: ?5 s; `8 l/ y! u+ r8 F
#ifndef __STM32F10x_H//如果没有定义__STM32F10x_H ，则定义__STM32F10x_H
0 ?: y' c" O5 [/ |#define __STM32F10x_H
! T8 t, M3 i- V1 N
6 v% y6 O; P6 _ c- u#ifdef __cplusplus//
9 L) T+ q; P3 A8 m: A' L+ [9 Jextern “C” {
( J, v3 y( C. E: x# t: C#endif 8 S! |2 y8 Q* r q$ q
这里是一种条件编译。extern “C”指令非常有用，因为C和C++的近亲关系。注意：extern “C”指令中的C，表示的一种编译和连接规约，而不是一种语言。C表示符合C语言的编译和连接规约的任何语言，如Fortran、assembler等。- E V( n4 ~2 x( ]
# S! U" Z1 B/ C) x; N: }. B% m还有要说明的是，extern “C”指令仅指定编译和连接规约，但不影响语义。例如在函数声明中，指定了extern “C”，仍然要遵守C++的类型检测、参数转换规则。/** @addtogroup Library_configuration_section. m6 s7 y5 Y0 D3 A7 t
* @{' z% o6 Q. V4 @& B" Q' ^+ G* U
*/
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/* Uncomment the line below according to the target STM32 device used in your* P* J' n' p- \" ~$ @0 B1 j
application , n5 Z0 k/ T3 M( f
*/2 e" i) J% Y' X' i* d! k+ G
* ~3 ~; f) T/ |9 ] g8 R% h [8 J#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL)
# a2 X# R" M' e7 M, e /* #define STM32F10X_LD */ /*!< STM32F10X_LD: STM32 Low density devices */
5 u% h% u+ I+ ^8 Q* r! } /* #define STM32F10X_LD_VL */ /*!< STM32F10X_LD_VL: STM32 Low density Value Line devices */
A( X! s( S. p' F7 e /* #define STM32F10X_MD */ /*!< STM32F10X_MD: STM32 Medium density devices */: T, J9 O& |7 w+ v9 i, ^6 d8 H
/* #define STM32F10X_MD_VL */ /*!< STM32F10X_MD_VL: STM32 Medium density Value Line devices */ / F5 v$ @0 O P# W6 A1 d. y
/* #define STM32F10X_HD */ /*!< STM32F10X_HD: STM32 High density devices */
: ^2 a6 d( Z& U$ N; t5 E /* #define STM32F10X_HD_VL */ /*!< STM32F10X_HD_VL: STM32 High density value line devices */ 1 [9 T. c) \" \& C/ R( T- |$ M0 I
/* #define STM32F10X_XL */ /*!< STM32F10X_XL: STM32 XL-density devices */
. Z. ?* X9 j5 W9 U: o% A /* #define STM32F10X_CL */ /*!< STM32F10X_CL: STM32 Connectivity line devices */
- Q& w( a/ z* g4 ^5 g#endif5 d- ?) x6 C. O u* C3 T
STM32启动文件选择：
7 o* v# Y) H9 t* @& B! J' c' M( l/ x1 |- startup_stm32f10x_ld_vl.s: for STM32 Low density Value line devices - startup_stm32f10x_ld.s: for STM32 Low density devices - startup_stm32f10x_md_vl.s: for STM32 Medium density Value line devices - startup_stm32f10x_md.s: for STM32 Medium density devices - startup_stm32f10x_hd.s: for STM32 High density devices - startup_stm32f10x_xl.s: for STM32 XL density devices - startup_stm32f10x_cl.s: for STM32 Connectivity line devices
9 G1 {5 j( W: [5 h cl：互联型产品，stm32f105/107系列& B6 z, f( X( n# g- I- m' Y/ I
vl：超值型产品，stm32f100系列 ; R/ V+ k) a7 b( a6 ~ K
xl：超高密度产品，stm32f101/103系列
) ^; T5 r6 J9 F5 M1 Tld：低密度产品，FLASH小于64K
4 n" I1 K: s# T6 i2 C6 R. U& hmd：中等密度产品，FLASH=64 or 128
- s' z; f, x; k7 J1 e6 W% @hd：高密度产品，FLASH大于128
- g. K H& a9 v, r' ]; Z/* Tip: To avoid modifying this file each time you need to switch between these5 e# @/ R. b# U4 ^4 [) Y
devices, you can define the device in your toolchain compiler preprocessor.
: u, f! d8 d- O7 ~7 o1 g, y提示：为了避免每次编译都要修改这些文件，意思是可以使用编译器的preprocessor选项来定义芯片型号等,免得反复更新这个文件。…
5 M2 \/ Q# ~/ h2 Z- Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers
4 W: Q4 N0 e+ X1 g/ Z" h where the Flash memory density ranges between 16 and 32 Kbytes.2 ? H" e; S& V2 \- G
- Low-density value line devices are STM32F100xx microcontrollers where the Flash A: g' X! F# A3 q) f1 `9 w
memory density ranges between 16 and 32 Kbytes.) R8 b) z+ ? ]% P7 u4 p, w
- Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers这里定义的是各种产品线的FLASH的大小。! [5 ^! `0 x, U& g
where the Flash memory density ranges between 64 and 128 Kbytes.
" |9 b. T/ w6 K$ L! s1 y+ t& l- Medium-density value line devices are STM32F100xx microcontrollers where the 9 y5 H+ \7 F T2 n
Flash memory density ranges between 64 and 128 Kbytes.
& w( i" r5 m3 a0 O4 H" D6 D- High-density devices are STM32F101xx and STM32F103xx microcontrollers where
3 E, a) d. ?, p' X the Flash memory density ranges between 256 and 512 Kbytes.
& R1 F. u/ e, h2 \' B# ]) K1 r- High-density value line devices are STM32F100xx microcontrollers where the 8 v }/ E" s- ?$ n
Flash memory density ranges between 256 and 512 Kbytes. - O! \: J5 z1 p
- XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
4 ?( N- H5 `7 f# H5 f9 g the Flash memory density ranges between 512 and 1024 Kbytes.( v5 I9 C; X& U4 ?
- Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
5 c, D g; E/ F2 `$ E5 Y) ` */& Q3 e- b! s; i& R% J3 [
% V" u0 ?+ e* h/ M9 M" x. R
#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL)) g0 W u( f: \" P. m
#error “Please select first the target STM32F10x device used in your application (in stm32f10x.h file)” Z8 x. Q' @, n7 W/ G3 Q2 F
#endif 如果设备类型选择不正确，这里会报错的。
3 Q6 \ _/ i# i- W
* b% a' M4 U4 ]* y#if !defined USE_STDPERIPH_DRIVER
]0 W- v/ N& ]2 q$ n& g8 v; N/**
/ L0 k: y2 Z' A" m2 b6 `& [) v* @brief Comment the line below if you will not use the peripherals drivers.& a# M1 G |8 ?4 O, u
In this case, these drivers will not be included and the application code will ! w5 X" B" U9 N
be based on direct access to peripherals registers 4 f: U f, A- x0 ^1 _. ^
*/
- [, |2 @! J# ^! n" F$ [( A* V$ K+ Z /*#define USE_STDPERIPH_DRIVER*/ I" H0 ?4 z$ g2 z& S+ D6 l0 s
#endif6 K' C' H/ x0 p4 n% I
+ U" S$ L0 g/ n# b5 E% Y
/**
! _8 M3 Y# P( o7 W, P* @brief In the following line adjust the value of External High Speed oscillator (HSE)# @$ o; `& v$ f' h" M3 g
used in your application
2 q- Y. \8 m. G; L7 Q1 H4 I: P4 P8 D& `) w1 C, b! j
Tip: To avoid modifying this file each time you need to use different HSE, you+ ^1 z( f: }0 B( n& c* R# x* i
can define the HSE value in your toolchain compiler preprocessor.) v) ]- x2 Z/ M: u
提示：为了避免每次编译都要修改这些文件，意思是可以使用编译器的preprocessor选项来定义芯片型号等,免得反复更新这个文件。… 0 y7 n% X. V9 t5 t. K6 Q) {$ Q
*/ - U7 i( t+ z J- Y7 I- B( {7 Y6 N
#if !defined HSE_VALUE
! B0 d5 {9 S. W a% ~4 d- F#ifdef STM32F10X_CL + f6 k' t4 S9 d) Z( K* H
#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */1 R- t8 m1 F! J
#else & ^( Q0 `0 z' f0 C
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
/ w3 v0 V$ M7 u( O2 g#endif /* STM32F10X_CL */+ Y1 l3 J6 M$ _* _# d; A
#endif /* HSE_VALUE */, {) S* I, u: z; s* W5 h: S( r$ N$ P
+ z3 y. g) N/ _, Q# m C/ l
% V! _5 G y7 g) {' {/**
: }9 b( k$ W8 D+ F, V" s* @brief In the following line adjust the External High Speed oscillator (HSE) Startup
+ w* S& L8 |9 l* J# S Timeout value
9 s( J# q5 U$ i& [ */①、HSI是高速内部时钟，RC振荡器，频率为8MHz。 ②、HSE是高速外部时钟，可接石英/陶瓷谐振器，或者接外部时钟源，频率范围为4MHz~16MHz。, j! M c: H6 ^1 l+ r# I
③、LSI是低速内部时钟，RC振荡器，频率为40kHz。
+ K7 \1 t. f; d5 Z. g7 J ④、LSE是低速外部时钟，接频率为32.768kHz的石英晶体。( F$ @: V" R) h z4 Z- h& E/ m
⑤、PLL为锁相环倍频输出，其时钟输入源可选择为HSI/2、HSE或者HSE/2。倍频可选择为2~16倍，但是其输出频率最大不得超过72MHz。! L( I0 F X( m
#define HSE_STARTUP_TIMEOUT ((uint16_t)0x0500) /*!< Time out for HSE start up */. Z5 A0 u5 r& p% _% w
高速外部时钟启动时间0 I# [- i( F1 M! E7 ^$ Q' S; i
#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/
, y3 S' R7 _! G+ O n5 d, L外部时钟设置的值
. f- K( F7 a# K5 k% X$ b/**( i G! Q2 V; z2 m* n+ w
* @brief STM32F10x Standard Peripheral Library version number
) a9 P/ n9 V6 P0 p- W */
! W8 W% w: F7 l( @) O7 `4 _#define __STM32F10X_STDPERIPH_VERSION_MAIN (0x03) /*!< [31:24] main version */
& D( p! I- U( U" Z! ]% T#define __STM32F10X_STDPERIPH_VERSION_SUB1 (0x05) /*!< [23:16] sub1 version */
' l+ M$ n0 `$ E#define __STM32F10X_STDPERIPH_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */0 o6 p* R/ v' @+ W
#define __STM32F10X_STDPERIPH_VERSION_RC (0x00) /*!< [7:0] release candidate */
! Y5 x/ ^ ^0 Z. f4 y$ r6 }0 y. }: y#define __STM32F10X_STDPERIPH_VERSION ( (__STM32F10X_STDPERIPH_VERSION_MAIN << 24)\
8 F- A$ s8 j: f _& M X4 z |(__STM32F10X_STDPERIPH_VERSION_SUB1 << 16)\
# {* {8 c g6 w/ e/ @ |(__STM32F10X_STDPERIPH_VERSION_SUB2 << 8)\' }- L9 M! h" F5 @# y. v
|(__STM32F10X_STDPERIPH_VERSION_RC))0 f0 J8 j; x( D$ b; M* S' H
* v' ^6 D! [4 @. A/ d3 Y/**
" D4 _, P3 }6 C * @}5 z3 p N% S; d3 | J4 J. p
*/
9 U8 M ^1 |- Q$ M7 i$ v! ]( A" e
( f: Q" Q U+ \5 s/** @addtogroup Configuration_section_for_CMSIS
1 S7 d7 _5 o7 e1 I9 M7 g2 O" Y * @{
7 Z! K/ E. `: f ]# T */5 D. h1 T \3 ]
/ O# W6 k v& N. v6 j3 w! P/**
: z/ r" a( n# q( K* @brief Configuration of the Cortex-M3 Processor and Core Peripherals " Y( g# B' P' P+ Y- g9 o9 G8 @* q
*/6 M& i+ \- \) @0 z+ s1 ]6 }
#ifdef STM32F10X_XL3 X% I. d3 Y; f- j5 |1 T/ n
#define __MPU_PRESENT 1 /*!< STM32 XL-density devices provide an MPU */9 p7 o9 x+ w u+ t- }$ j2 S
#else$ p; N, q( H" d) g* z3 K0 Z- W0 ^$ x
#define __MPU_PRESENT 0 /*!< Other STM32 devices does not provide an MPU */
& m! _* g+ j8 b3 a#endif /* STM32F10X_XL */" g2 ~5 H/ X0 c; X7 L: S( L" Q/ d8 [
#define __NVIC_PRIO_BITS 4 /*!< STM32 uses 4 Bits for the Priority Levels */
/ ?9 y9 `& e' ]+ I* \! j1 b#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */$ ]8 v6 A. w C! u$ E; s% D
" g0 F9 }0 f* ?4 e. p
/**
3 w, N: _/ h" v! V" D( r' j* @brief STM32F10x Interrupt Number Definition, according to the selected device ( O: K+ ~& F" z2 e% B, N
* in @ref Library_configuration_section
! A. A' F8 P. m6 _# x+ {9 b1 v*/
- m1 x9 T: l, D- Gtypedef enum IRQn5 {3 s3 D" R3 ~
{! D3 d' i7 o( f, x( }
/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/
7 g5 _( S, a* r8 |* k3 [ NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
% S. R+ s- ]+ D8 n8 t! m5 E% r MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
) M' S" ^! o6 g BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */5 C' {2 C0 a+ A% q( o B
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
* M4 T1 J- j: @ SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */# A& `( V1 Z% Z( b2 v
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */4 \0 h% d: Z' u- l* p
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
) b. I. p7 ~- E/ N; i. G5 H SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
( q* }# c: g2 }9 R" V————————————————————————————————————————————————————————- ————————————————————————————————————————————————————————- /**这里是STM32比较重要的头文件
1 K S# O9 M$ m4 @ ******************************************************************************* D! l' T, j) }+ k
ST版本库的 stm32f10x.h 文件，包含整个头文件代码。综合以上，可以看出 stm32f10x.h 用于定义了器件、中断线、数据类型、结构体封装的寄存器、寄存器地址映射、寄存器位操作以及防C++编译的条件编译。 * @file stm32f10x.h ST 标准的头文件7 E5 H& Q2 x4 B1 a. |$ n
* @author MCD Application Team 微控制器开发小组。1 a8 y' o, }# I: Y2 G
* @version V3.5.0 版本
' y4 e3 U9 b1 h# x * @date 11-March-2011 2011年3月11
2 L$ d% ^! Q1 J; V6 U * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File.(CMSIS：Cortex Microcontroller Software Interface Standard) 是 Cortex-M 处理器系列的与供应商无关的硬件抽象层。 - Z: q9 D' N* J% Q- [* W# d# g
* This file contains all the peripheral register’s definitions, bits 6 q2 l) Q3 m; Z
* definitions and memory mapping for STM32F10x Connectivity line,
7 q( N* @% P; N) \ * High density, High density value line, Medium density, 3 g0 G$ t1 M0 z
* Medium density Value line, Low density, Low density Value line 4 D% R& [' {; W: |' C0 P4 B0 o# D
* and XL-density devices.$ ^* E# [/ ]- m2 m5 S
* 这个文件包含了芯片STM32F10X（接口增强型）内部的寄存器定义，位定义，内存地址变换定义，还有一些相应的高密度，低密度产品线的设备。
' o9 m$ x0 b4 j1 p2 b* X: f9 a
; k! `2 V+ P) V3 q; ]$ E* The file is the unique include file that the application programmer
* ?) F$ j' k- b1 H * is using in the C source code, usually in main.c. This file contains:% c) ^; V" \, A
* - Configuration section that allows to select:) [# n/ i( s1 e, `. I
* - The device used in the target application$ |2 A- _. N/ U- l5 q
* - To use or not the peripherals drivers in application code(i.e. / c. [# d7 L+ F* [/ W4 q2 d+ \
* code will be based on direct access to peripherals registers
" `4 y n, K8 B: { ]) j * rather than drivers API), this option is controlled by & t& U1 d7 W; |: t0 L
* “#define USE_STDPERIPH_DRIVER”
2 A5 v# c0 d7 w * - To change few application-specific parameters such as the HSE # R" N! B9 h' b/ U8 f0 s
* crystal frequency
9 l6 m- e. M) e% A% t * - Data structures and the address mapping for all peripherals
! Q$ R. D6 f. Q- I+ C * - Peripheral’s registers declarations and bits definition. b) }! R' g7 t7 X4 o4 U9 G
* - Macros to access peripheral registers hardware
% ~# Y3 Q+ }( Z/ ~*这个文件在应用程序中是至关重要的头文件，它是用C代码编写而成。通常包括在MAIN主程序中。它包括：1 设备中使用的目标应用程序。
4 A) D0 C( `; s$ A8 Q% L2 j2 决定是否使用外部设备的代码（例如使用基于寄存器的代码，而不是我们所熟悉的API应用程序接口代码）。这一设备可以通过设置 “#define USE_STDPERIPH_DRIVER” 来实现。
- Q& _3 B. ]4 Y7 i* b7 c- b; `! L ]$ ?3 通过这一文件可以改变诸如外部设备的频率参数。( E2 ?7 i$ U& |7 M$ |2 E3 t2 R: b$ g* t
4 可以了解程序的数据结构以及外设的地址映射。
6 V! P# J, x9 F5 S( K5 外设的寄存器声明和位定义可以在这个文件里面了解到。
% O0 _; F4 T* x7 b5 ^% |
6 A8 X* Z ^) m1 X, g ******************************************************************************
# x( k6 D2 ~; {8 u9 }4 ? * @attention0 `9 f2 n: T9 \: t- r( Z
*0 O( A9 ?8 }9 F( B, ~& M4 h7 u
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS6 G1 k! d+ \* f
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE5 e% _9 \! O) D% [4 y% {/ t2 Z/ e2 _
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY% N! I& j& g A$ _- T" t. n$ J
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
/ I7 L Y, E/ J d& Z! t * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE8 _4 E2 }2 _' \( z0 `: W. l, E
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
7 F& c# j8 S7 v* p *注意：这一文件代码供应给用户，旨在帮助用户提升效率节约时间。ST将不会提供任何对于用户自己代码的解释和帮助。也不会解决其在代码中的任何BUG。$ B: k3 P8 s# x& b* Z
* <h2><center>? COPYRIGHT 2011 STMicroelectronics</center></h2>; P) l, {4 P: B7 ^% z
******************************************************************************' t. t( C. P7 z4 C
*/
2 W M2 m9 \# f9 F/ @8 s) \* J/ s$ U0 G4 X$ G' |! i( Z
/** @addtogroup CMSIS
6 O9 F5 [. s, s* L* c6 q * @{5 L# d6 y3 R) R$ D4 I+ I
*/这个不需要关心，只是说明这个文件的作者，公司产品等等，你贴出来的估计是小小的广而告之，这也是程序员的一点小小的特权嘛1 U; a' V- i- b _; E' }
- [* K! A1 K3 v% ?
/** @addtogroup stm32f10x: F7 F( ~/ v) Q* V: T' R1 k
* @{
7 w0 q6 I) d; ^! z; G) ?6 | */
- `9 \# N- v) c' w5 t$ T F
+ G, S" P1 y3 J- T9 Q6 G#ifndef __STM32F10x_H//如果没有定义__STM32F10x_H ，则定义__STM32F10x_H 2 f. @" L7 g& o
#define __STM32F10x_H4 R- ~# i. U% F" N( R* G5 }
2 }: G j/ d4 X8 X9 h, ~#ifdef __cplusplus//
$ C2 K5 S4 N- ?* X, B9 v' F' `extern “C” {
+ L2 ]& W5 J* ~# o/ }4 n# i6 }* D#endif
5 p; b5 [7 \; j7 K 这里是一种条件编译。extern “C”指令非常有用，因为C和C++的近亲关系。注意：extern “C”指令中的C，表示的一种编译和连接规约，而不是一种语言。C表示符合C语言的编译和连接规约的任何语言，如Fortran、assembler等。- M& s- l7 H+ y# j$ e$ E# H5 X
5 c: y2 I+ e! g0 i: [还有要说明的是，extern “C”指令仅指定编译和连接规约，但不影响语义。例如在函数声明中，指定了extern “C”，仍然要遵守C++的类型检测、参数转换规则。$ O% p* P c ~8 g4 Y. k E
一开始我不解 extern “C” { 这个语句的意思，原来是用来说明后面的定义都是使用C语言写的。这个 __cplusplus 是指C++来的，4、5句的意思就是说如果用C++编译器的话，它里面是定义有__cplusplus 这个的，而通过 extern “C” { 告知编译器，这段代码是用C编写的，要按照C语言编译。这是因为C++里面有函数重载，编译的时候把参数也编译了，而C的话，编译只编译函数名。
, B# V! O% t" p7 h/** @addtogroup Library_configuration_section
1 U) a& s' F, Q7 ]( q * @{
5 e1 y [" O5 ~; F */
8 e0 E" v& l( X" j
' A6 Z* K6 Q* G2 j5 v/* Uncomment the line below according to the target STM32 device used in your2 I7 l) `9 u+ {: D- x! w
application 9 _0 J7 N& R, X/ [& O$ b
*/+ c2 a+ l6 w! U8 u# `" I, B
7 k$ R9 M, S' ?" W6 L7 f! Q#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL) 3 c: |. m8 q- v$ d; I0 _8 X* G- w
/* #define STM32F10X_LD */ /*!< STM32F10X_LD: STM32 Low density devices */
* u0 f4 p* K4 ^. u$ m7 `7 @, V2 m /* #define STM32F10X_LD_VL */ /*!< STM32F10X_LD_VL: STM32 Low density Value Line devices */ 6 @1 v# O: j9 } q
/* #define STM32F10X_MD */ /*!< STM32F10X_MD: STM32 Medium density devices */
4 D8 ?! m m `( m /* #define STM32F10X_MD_VL */ /*!< STM32F10X_MD_VL: STM32 Medium density Value Line devices */
/ L4 Y5 ]7 r4 M /* #define STM32F10X_HD */ /*!< STM32F10X_HD: STM32 High density devices */
# l: `4 d) M8 C /* #define STM32F10X_HD_VL */ /*!< STM32F10X_HD_VL: STM32 High density value line devices */ % I' o3 @* S: U1 Y! J! c1 ^; d( T
/* #define STM32F10X_XL */ /*!< STM32F10X_XL: STM32 XL-density devices */# ]3 N+ m6 x+ b% s2 \! W
/* #define STM32F10X_CL */ /*!< STM32F10X_CL: STM32 Connectivity line devices */
9 M M) q5 v- @# i#endif
* ^* s; |% e y2 F* U, @1 M, MSTM32启动文件选择：7 y) r0 i. W' `( @. Z
- startup_stm32f10x_ld_vl.s: for STM32 Low density Value line devices - startup_stm32f10x_ld.s: for STM32 Low density devices - startup_stm32f10x_md_vl.s: for STM32 Medium density Value line devices - startup_stm32f10x_md.s: for STM32 Medium density devices - startup_stm32f10x_hd.s: for STM32 High density devices - startup_stm32f10x_xl.s: for STM32 XL density devices - startup_stm32f10x_cl.s: for STM32 Connectivity line devices * U- u& k, B/ C& z* I
cl：互联型产品，stm32f105/107系列0 D5 h& i/ N* b: u n
vl：超值型产品，stm32f100系列
" M" h: y" v$ ]; s! i4 E. Kxl：超高密度产品，stm32f101/103系列8 ^4 P( L8 @4 Y8 Y3 a
ld：低密度产品，FLASH小于64K
; ]- A X7 s/ e' Xmd：中等密度产品，FLASH=64 or 128 A) \) x& B/ L P) s- R) T
hd：高密度产品，FLASH大于128
# z6 m# {0 C I* A/* Tip: To avoid modifying this file each time you need to switch between these6 L8 o+ O9 u7 X
devices, you can define the device in your toolchain compiler preprocessor.
, [5 Q3 t4 Y8 ~( W0 Z6 m提示：为了避免每次编译都要修改这些文件，意思是可以使用编译器的preprocessor选项来定义芯片型号等,免得反复更新这个文件。…
s+ T; f* P' ?( K2 p- Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers" [# o- s# P. E7 ^2 I% E+ c1 K
where the Flash memory density ranges between 16 and 32 Kbytes.
# @! N5 W7 U5 O- Low-density value line devices are STM32F100xx microcontrollers where the Flash0 R# N2 a- S, o6 O( N) e- Z
memory density ranges between 16 and 32 Kbytes.: S1 Q. ?( L; @& o# E
- Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers这里定义的是各种产品线的FLASH的大小。
3 {0 M! A/ N1 T5 z: y M! A3 i# g where the Flash memory density ranges between 64 and 128 Kbytes.
% n& p+ s% O# b; c' g% a$ s" E( q- Medium-density value line devices are STM32F100xx microcontrollers where the
+ J9 e5 n0 G! T0 D4 f7 w Flash memory density ranges between 64 and 128 Kbytes. 5 u: K" @% X. U: ^. q: v
- High-density devices are STM32F101xx and STM32F103xx microcontrollers where
$ z o$ Q. W2 A! E the Flash memory density ranges between 256 and 512 Kbytes.
3 x. E' O+ f; r! {# V% a- High-density value line devices are STM32F100xx microcontrollers where the
! R+ m6 v/ K9 h9 _0 s8 Y6 ` Flash memory density ranges between 256 and 512 Kbytes. y/ f4 X& T2 y! }: u
- XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
0 ~0 ]1 |- O: N4 }/ s( o" J the Flash memory density ranges between 512 and 1024 Kbytes./ { i9 {* V& Q; |* p) M2 Q
- Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.) D4 a5 ]1 D3 K) O) ^, K
*/, u: ]: |: _6 K/ z7 w
8 H$ Q$ r1 v/ D* a" O/ X#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL)
6 Z2 H0 y d) l1 ]$ k0 E. Q#error “Please select first the target STM32F10x device used in your application (in stm32f10x.h file)”% O, k% A/ L0 Z) P" g# Z3 L% N
#endif 如果设备类型选择不正确，这里会报错的。
& \4 `% \5 {4 ~ f F4 g. y! V5 k3 r& q. D2 n. v
#if !defined USE_STDPERIPH_DRIVER
2 Q) X1 _) ]* C+ r/ r! v, j9 r/**5 ]- E1 `! N) r) @
* @brief Comment the line below if you will not use the peripherals drivers.
& ]9 ?( m1 X8 C( b; v1 b0 \5 _2 F In this case, these drivers will not be included and the application code will
/ r( ^8 f% |4 K4 t- B+ c' T0 O3 k be based on direct access to peripherals registers
" ]: H- `$ I" m: ?* a$ w3 R1 q& I */
# d8 r( w+ r1 S /*#define USE_STDPERIPH_DRIVER*/) _: @5 Y) \) V0 }, n
#endif
; [3 }+ y) ^7 i4 K" M1 J* H" `8 H. @! g
/**
! `. I' H$ W* `. l8 L6 `7 Z* @brief In the following line adjust the value of External High Speed oscillator (HSE)
- h+ g0 _- \% N2 h: J used in your application
6 F: B/ B* b" j+ @- [% d0 \- E6 X5 o
Tip: To avoid modifying this file each time you need to use different HSE, you2 m/ s) e. F7 j# o5 G9 x
can define the HSE value in your toolchain compiler preprocessor.
. v7 O. @# [ L4 e; e这些提示：为了避免每次编译都要修改文件，意思是可以使用编译器的preprocessor选项来定义芯片型号等,免得反复更新这个文件。… $ i: X0 \, o4 {5 a; C% ?
*/ . K2 Z5 H& q Q
#if !defined HSE_VALUE
- @+ o% }0 E. m. M) ~; N" j#ifdef STM32F10X_CL e& h0 Q- h2 l- Z( P+ C" G( q# T/ p
#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
/ P9 I+ K) Y; B9 P#else
8 r! w5 Y J& c# Y# q$ z" Q #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
2 g/ W9 }/ ^# ]5 Z7 p; d#endif /* STM32F10X_CL */
9 N9 r1 A- p0 P# t# V& n#endif /* HSE_VALUE */
" @5 p& P) o- {5 u3 j8 [5 J6 o0 ?/ H
1 X' L! G3 f& H- h/**
$ u# s6 M% n" t, B; R0 d) V, ` L$ o* @brief In the following line adjust the External High Speed oscillator (HSE) Startup
6 `+ H) y4 b4 \5 ?+ b. B Timeout value ; g7 z' O0 G8 o% s7 r1 Z ^* I
*/①、HSI是高速内部时钟，RC振荡器，频率为8MHz。 ②、HSE是高速外部时钟，可接石英/陶瓷谐振器，或者接外部时钟源，频率范围为4MHz~16MHz。# a# f5 ^6 b; l( m) G
③、LSI是低速内部时钟，RC振荡器，频率为40kHz。; S( C- R( C- O! x% G" S
④、LSE是低速外部时钟，接频率为32.768kHz的石英晶体。5 J* g: [9 J$ Y7 W/ u
⑤、PLL为锁相环倍频输出，其时钟输入源可选择为HSI/2、HSE或者HSE/2。倍频可选择为2~16倍，但是其输出频率最大不得超过72MHz。
! u4 W6 c6 l, G/ `, ^ |
; I0 E' X g& m8 ?- c5 K5 b1 m# N
- j+ u D3 g% ^* ?, G5 w#define HSE_STARTUP_TIMEOUT ((uint16_t)0x0500) /*!< Time out for HSE start up */
2 z4 Q/ b9 [+ i$ A1 S w2 q2 d高速外部时钟启动时间
# p, }) k+ s3 x/ [3 v5 C$ |8 Q#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/, y t; v8 n, s
外部时钟设置的值
6 Q% C$ M! W* \% d/ O/**+ X3 t" U+ T6 t# @
* @brief STM32F10x Standard Peripheral Library version number标准外设库版本号的定义
# S7 k8 Z2 g8 ^% x$ F, m6 b */
6 j& o" X$ x; x" X#define __STM32F10X_STDPERIPH_VERSION_MAIN (0x03) /*!< [31:24] main version */ 3 D H" C0 h0 j. J! b7 |, J
#define __STM32F10X_STDPERIPH_VERSION_SUB1 (0x05) /*!< [23:16] sub1 version */0 T9 H& a4 X' W
#define __STM32F10X_STDPERIPH_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
6 Q9 ~! [. p) [8 [* D/ f- B/ K$ o' Q7 Z#define __STM32F10X_STDPERIPH_VERSION_RC (0x00) /*!< [7:0] release candidate */ 0 w: w, ~4 w2 I0 f& }
#define __STM32F10X_STDPERIPH_VERSION ( (__STM32F10X_STDPERIPH_VERSION_MAIN << 24)\
! | i: q# y5 m. x% t% ~; h! C |(__STM32F10X_STDPERIPH_VERSION_SUB1 << 16)\
8 C+ K$ N5 G4 O |(__STM32F10X_STDPERIPH_VERSION_SUB2 << 8)\- {- d2 B0 f9 }" t1 C
|(__STM32F10X_STDPERIPH_VERSION_RC))0 t8 \9 S; y* m
" t6 J& x' ~7 U5 i7 `8 y$ B; E
/**) v! G9 ], j8 ^5 u
* @}
$ f/ Z$ _. W l( `7 m9 A8 [ */
8 U$ h+ @" u- c. X r+ N
: e8 B4 K1 C, h7 F/** @addtogroup Configuration_section_for_CMSIS! Q: e, r' G, m6 L6 Q: c1 G: C/ O! f: }
* @{
- [7 ], q- h N0 U$ E0 m+ q: M */& _8 T2 J- ^% M5 W& B
. o8 J8 @; q3 c0 i$ C* `% j
/**
: {9 o+ G1 X" n7 i" D$ _$ z* @brief Configuration of the Cortex-M3 Processor and Core Peripherals 配置Cortex-M3处理器和核内外设
2 P( j0 q- o, R; I1 U, y6 d*/
* _! L2 E6 I* X' F; J- h! `#ifdef STM32F10X_XL
+ g& z6 ^/ q; Y$ a! [' T ~) @#define __MPU_PRESENT 1 /*!< STM32 XL-density devices provide an MPU */
$ c, R6 d) O/ g* ]$ E#else) B, P+ n/ k S0 A m$ P
#define __MPU_PRESENT 0 /*!< Other STM32 devices does not provide an MPU */
5 ]. }# R* f; v9 A/ T6 [#endif /* STM32F10X_XL */; Y- z6 Q1 T' p2 \
#define __NVIC_PRIO_BITS 4 /*!< STM32 uses 4 Bits for the Priority Levels */* ~# J- w4 U# k# D3 T
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used *// i+ D7 n- ] Y
0 b0 F1 Z7 `; T/**' n- g# G4 p; {8 D
* @brief STM32F10x Interrupt Number Definition, according to the selected device $ i0 H/ L7 \$ E3 U* d1 ^
* in @ref Library_configuration_section 中断线定义，前部分对于所有STM32F10x都有相同定义，后部分根据不同器件容量采用条件编译定义不同中断线。
" p/ y" l. c0 N4 C9 [*/* y/ b+ t) j# p/ ]6 [- L; E7 P
2 a8 s2 x0 [8 F7 i
————————————————————————————————————————————– ————————————————————————————————————————————– 这里是STM32比较重要的头文件 # ~" r* v$ U+ k$ |* B! B
8 T% t4 b% \" t/ J3 X0 U
typedef enum IRQn typedef enum表示定义了一个枚举型的数据结构，你可以用题目中的 IRQn 去定义变量# w+ J0 j8 z4 J# A6 W* e
{系统异常ID：
7 y' b! Y$ D* s, y1 Z
# m: ?+ n6 \+ f' c/ V标号 | 中断ID | 描述 | NonMaskableInt_IRQn | -14 | 不可屏蔽中断 | MemoryManagement_IRQn | -12 | Cortex-M3内存管理中断 | BusFault_IRQn | -11 | Cortex-M3 总线Fault中断 | UsageFault_IRQn | -10 | Cortex-M3 用法Fault 中断 | SVCall_IRQn | -5 | Cortex-M3 SV Call中断 | DebugMonitor_IRQn | -4 | Cortex-M3 调试监视中断 | PendSV_IRQn | -2 | Cortex-M3 Pend SV中断 | SysTick_IRQn | -1 | Cortex-M3 系统Tick中断 |
) X( Y" p5 _, U+ }, b& U
外设中断ID： | 标号 | 中断ID | 描述 | 标号 | 中断ID | 描述 | | WDT_IRQn | 0 | 看门狗 | EINT3_IRQn | 21 | 外中断3 | | TIMER0_IRQn | 1 | 定时器0 | ADC_IRQn | 22 | AD转换 | | TIMER1_IRQn | 2 | 定时器1 | BOD_IRQn | 23 | 欠压检测 | | TIMER2_IRQn | 3 | 定时器2 | USB_IRQn | 24 | USB | | TIMER3_IRQn | 4 | 定时器3 | CAN_IRQn | 25 | CAN | | UART0_IRQn | 5 | UART0 | DMA_IRQn | 26 | 通用DMA | | UART1_IRQn | 6 | UART1 | I2S_IRQn | 27 | I2S | | UART2_IRQn | 7 | UART2 | ENET_IRQn | 28 | 以太网 | | UART3_IRQn | 8 | UART3 | MCI_IRQn | 29 | SD/MMC卡I/F | | PWM1_IRQn | 9 | PWM1 | MCPWM_IRQn | 30 | 电机控制PWM | | I2C0_IRQn | 10 | I2C0 | QEI_IRQn | 31 | 正交编码接口 | | I2C1_IRQn | 11 | I2C1 | PLL1_IRQn | 32 | PLL1锁存 | | I2C2_IRQn | 12 | I2C2 | USBActivity_IRQn | 33 | USB活动 | | Reserved0_IRQn | 13 | 保留 | CANActivity_IRQn | 34 | CAN活动 | | SSP0_IRQn | 14 | SSP0 | UART4_IRQn | 35 | UART4 | | SSP1_IRQn | 15 | SSP1 | SSP2_IRQn | 36 | SSP2 | | PLL0_IRQn | 16 | PLL0锁存 | LCD_IRQn | 37 | LCD | | RTC_IRQn | 17 | RTC | GPIO_IRQn | 38 | GPIO | | EINT0_IRQn | 18 | 外中断0 | PWM0_IRQn | 39 | PWM0 | | EINT1_IRQn | 19 | 外中断1 | EEPROM_IRQn | 40 | EEPROM | | EINT2_IRQn | 20 | 外中断2 |
( E$ b) I+ T/ n9 h/ q
/** Cortex-M3 Processor Exceptions Numbers$ {2 \' i3 c% O) r' B
*****************************************/CMSIS中的中断定义 1 X- ^, u, q) E3 A5 O
: U4 T/ k) m) `3 m8 E8 S NonMaskableInt_IRQn = -14, /*!<! o' G( F) ~" P4 k5 G, D
2 Non Maskable Interrupt 非屏蔽中断 8 e3 c6 L. k0 V/ @* |$ G
*/$ \' X- s6 [; {4 E* ?
: j( z4 `( P" i" [' ] MemoryManagement_IRQn = -12, /*!<
/ G7 E. ~( I( g& d1 u4 Cortex-M3 Memory Management Interrupt Cortex-M3内存管理中断
6 e( Z! ?. i" g5 L) t+ o */- S6 D8 l: h8 r# n
" `7 @" U# Z/ U; i9 c6 ] BusFault_IRQn = -11, /*!<1 H) K5 l/ k. ]+ G! U; O
5 Cortex-M3 Bus Fault Interrupt */
( q( ?% N) o4 l3 V* x" v
) t" P; F3 Y8 B5 l UsageFault_IRQn = -10, /*!<
5 V, v+ w! k% M; \. K& v5 y6 Cortex-M3 Usage Fault Interrupt */
3 X$ [7 }, j+ i- B$ P' V/ Z7 S1 }0 z6 Q) l+ u
SVCall_IRQn = -5, /*!<
+ @+ x2 {. b c5 C* h& M5 [11 Cortex-M3 SV Call Interrupt */; _$ H5 k# k- W
+ I8 x1 X3 m) C, V DebugMonitor_IRQn = -4, /*!<
( l! m: k6 X+ e! g( Z' p! j6 ]12 Cortex-M3 Debug Monitor Interrupt */
t2 R n. C9 E) s6 P, D# e, P9 N. C* N$ [
PendSV_IRQn = -2, /*!<
. A+ I/ L. i! X) x+ d( I14 Cortex-M3 Pend SV Interrupt */
7 g! E; R4 _; {! {( r/ K/ R; D& T J) @/ c
SysTick_IRQn = -1, /*!<
; I1 j, K M; a8 D1 z( h; E15 Cortex-M3 System Tick Interrupt */9 {. G7 x; d5 x' c
4 \3 u: B$ X2 A! I5 m
8 O# e F" ^( ^& D) ?$ B* b) X* q4 v7 [
/* STM32 specific Interrupt Numbers ************************************************/' l+ i1 f* a8 |* ^9 C- _
* h1 r6 V8 g1 y) s3 I3 n; V) ?
WWDG_IRQn = 0, /*!<
& r6 z" M& D$ ~( l- vWindow WatchDog Interrupt */
& R( B% ]* d j* o4 y
7 K9 l8 ]) U5 s! x PVD_IRQn = 1, /*!<$ o, H5 A/ I T1 n% u5 p7 ]* W' r
PVD through EXTI Line detection Interrupt */
3 ~- p% _. u" X6 M+ f4 n+ q$ G; Q* d, p$ k% |! p
TAMPER_IRQn = 2, /*!<0 F+ z4 m* |% t5 w
Tamper Interrupt */
- h& b0 f0 e7 y( P' n% R$ J
& p1 c6 ?* L7 ?0 `( k- V/ { RTC_IRQn = 3, /*!<
4 p; B+ i$ o) K3 d% WRTC global Interrupt */' k8 G. R6 g/ [8 E8 O& k
: x1 [; w( j- K- u3 t/ j+ z' _
FLASH_IRQn = 4, /*!<
1 ?% h/ X& {' N. y. O7 jFLASH global Interrupt */
8 I: \# Z& Y" O2 r' B- [3 s; I/ E, a) D+ d. N. S
RCC_IRQn = 5, /*!<
' E) q* c, n" T: @3 x0 ARCC global Interrupt */
* @ o z1 |2 O" n. Z- w2 [; ~# `% \2 S: }% v% D% l+ K; t
EXTI0_IRQn = 6, /*!<
0 T" z( d. N0 y9 y" @% S. aEXTI Line0 Interrupt */
/ G. f2 ^4 [# c0 O) \4 Y( I5 i* I" Z4 G
EXTI1_IRQn = 7, /*!<) F. O) x( D, K9 @, }$ T: t
EXTI Line1 Interrupt */
7 R7 h9 {9 n6 G) H9 S0 j' t3 @% C
EXTI2_IRQn = 8, /*!<" d$ J/ m" [" F. k; C5 `" e" X
EXTI Line2 Interrupt */6 n3 ^/ O' t' `! V0 x K
! G2 s/ c2 V r0 ]3 h" d* t EXTI3_IRQn = 9, /*!<; |7 P+ b) Z1 r" J9 ^; T8 ]% Z) {
EXTI Line3 Interrupt */& ^$ a; P( _/ f# {; W& C
7 G3 @/ [& u! \, |& ]3 U EXTI4_IRQn = 10, /*!<
3 y1 t/ P7 V- T1 y/ {EXTI Line4 Interrupt */: X! B/ j0 A' U- ?
/ N% f! n& g$ Q, U) |# C/ Z DMA1_Channel1_IRQn = 11, /*!<
5 e9 L" Y+ n1 K. {DMA1 Channel 1 global Interrupt */( b8 u5 h: [/ N
6 W2 J$ G0 V7 N. V( q& N1 w: P { DMA1_Channel2_IRQn = 12, /*!<) e, Y8 t' n' ]- U( K' ~0 Q5 c7 z
DMA1 Channel 2 global Interrupt */- D1 J# y: d. S/ M: O3 f
5 u) Y4 ?: \7 B2 @1 _4 e/ a# N DMA1_Channel3_IRQn = 13, /*!<+ d' |8 h" Y1 q3 s, J! i( x& n" t/ T) O
DMA1 Channel 3 global Interrupt */
! H" j1 b3 j) A1 @) s9 X7 p$ b0 r, O- k2 Q+ O/ o9 s% }
DMA1_Channel4_IRQn = 14, /*!<
$ j: t7 K/ R. z# c& LDMA1 Channel 4 global Interrupt */
! G" ~# Q: c6 r9 z3 r. o: I
7 @/ {' V2 J1 p DMA1_Channel5_IRQn = 15, /*!<9 O) F' ], J# @# j
DMA1 Channel 5 global Interrupt */5 |1 ?3 t1 i) {5 A
- W2 t. ?, u0 e2 P" b# |
DMA1_Channel6_IRQn = 16, /*!<" q& a3 j! L% l2 \; O
DMA1 Channel 6 global Interrupt */
) b7 q$ }5 t, }" L9 g
( [* } d# E3 k0 x$ y& C/ v DMA1_Channel7_IRQn = 17, /*!<7 s) S7 R- @& z' `0 c3 q) [6 c
DMA1 Channel 7 global Interrupt */9 G3 w9 @6 i! w o6 y: J8 k6 u i
* U. j0 K5 [# S2 b$ u( E
0 H1 K7 K5 U; M& h) ^
4 Z: ~5 Z; t. l#ifdef STM32F10X_LD
+ Z2 B7 u8 V2 k: h3 Z# ^8 n% [+ c; P! V* g% a
ADC1_2_IRQn = 18, /*!<
$ h; I) f/ j6 h7 d! i" sADC1 and ADC2 global Interrupt */" F: t) h1 ^9 N7 b1 G; b6 C- |$ |
3 Y. U5 A' j9 y& ^
USB_HP_CAN1_TX_IRQn = 19, /*!<1 `0 Q8 x; k4 X9 j" `; w
USB Device High Priority or CAN1 TX Interrupts */
$ c9 H' r" d* g0 Q4 `" W: R. W W0 K' u8 v) {* ]! R2 ~
USB_LP_CAN1_RX0_IRQn = 20, /*!<' C" J) V4 S* K) U0 Q6 n
USB Device Low Priority or CAN1 RX0 Interrupts */
9 s+ I3 c% \: |* C# B4 C7 j! D9 \/ L6 ]& l
CAN1_RX1_IRQn = 21, /*!<; L) L9 r8 h; r8 \
CAN1 RX1 Interrupt */% E' h+ q9 C2 q. D; d7 G
% g5 _8 C; o% |2 Y. k2 j8 e) K CAN1_SCE_IRQn = 22, /*!<
; J% p# @& Q3 H" e0 CCAN1 SCE Interrupt */
( `9 _1 @; G5 r
' ?& @& o3 s0 r6 W$ c$ u% n EXTI9_5_IRQn = 23, /*!<- r& Q7 ^4 z5 U
External Line[9:5] Interrupts */
$ t% S3 O. U7 g4 q2 V) h, B( Q. V0 K5 ^9 J5 _6 N4 o) i& H9 O0 O. O
TIM1_BRK_IRQn = 24, /*!<% `, \% x0 M$ c* w6 P% O/ k
TIM1 Break Interrupt */3 w% ?3 n. b) H1 p3 n) d
3 [8 C: b Z1 w2 k TIM1_UP_IRQn = 25, /*!<
8 Z& x* y8 L4 j' d3 `2 d0 qTIM1 Update Interrupt */) i, P0 y2 ]% p% V) O9 l J2 ?1 z
: a8 i) f( n$ [1 i$ q& S: W" U
TIM1_TRG_COM_IRQn = 26, /*!<
3 k) z& L7 b5 p6 N* K. T/ CTIM1 Trigger and Commutation Interrupt */2 N, u: c$ v6 F+ a1 x% @
1 g8 f1 S$ I$ Y8 N5 B
TIM1_CC_IRQn = 27, /*!<
5 z. ]3 }; j3 x1 b0 jTIM1 Capture Compare Interrupt */
% G* p8 N- ]! k+ y9 t! Z6 J5 f5 K3 C
TIM2_IRQn = 28, /*!<" Z2 R8 `4 z. D# c% P: Q
TIM2 global Interrupt */; `3 }0 W% u" `( |- O# x3 t
1 Q* v8 C1 K O0 i9 s
TIM3_IRQn = 29, /*!<6 p+ N* O W2 e% v
TIM3 global Interrupt */0 e) |$ L! m" C |! r* N
: N3 l- K" @5 ?/ u2 O6 U: P$ n; n I2C1_EV_IRQn = 31, /*!<
6 K* \ m" e2 l: `% @I2C1 Event Interrupt */
0 B8 T% H4 t) w0 o3 y, s/ d: R& U4 s& k& |5 H/ U
I2C1_ER_IRQn = 32, /*!< o6 @; z w# j4 h& A8 E. a
I2C1 Error Interrupt */3 s% Z* a- L* y3 i* w
: _6 D4 Y& i9 C: p
SPI1_IRQn = 35, /*!<5 h! a9 d. _2 \! o
SPI1 global Interrupt */
% W. Q5 f' W' l. J- V. n3 M; c7 Y) [$ \8 w8 ^; c: g
USART1_IRQn = 37, /*!<
. P( P* q* ~6 W5 g4 yUSART1 global Interrupt */
# I9 r) ?, c P* v
" x' _) ^: s% D) ~. C0 A" u USART2_IRQn = 38, /*!<6 h" v0 i: [5 H [$ Q" I) N# S+ ?6 d% B
USART2 global Interrupt */
$ A( Z' _" p8 m# Z4 x# ]
1 ~/ j0 s+ k; M' `6 n$ x EXTI15_10_IRQn = 40, /*!<
3 e5 m' W. q4 M* E3 ~1 M" q& _External Line[15:10] Interrupts */
1 R" d; [9 x7 [. K& l, j1 S. Y* P- a
* K9 e) g4 H2 Z* k RTCAlarm_IRQn = 41, /*!<2 \- y0 @$ \( B \! }$ p
RTC Alarm through EXTI Line Interrupt */2 K) j- _% {. R" W* o6 l; B
$ Q3 D6 t. b) p* V, r USBWakeUp_IRQn = 42 /*!<+ l* W w8 y- ?, ^
USB Device WakeUp from suspend through EXTI Line Interrupt */ 2 T& S0 K! V- L6 B' p1 H) m
6 a% D% Z: a4 ?+ r4 X7 I
#endif /* STM32F10X_LD */
! t3 I; B. P, r6 h' I! n @ ?4 U. I6 ^5 f8 v3 H6 o
1 c! F2 F' N" }8 b7 p+ {" F# W/ \$ t( h( G3 F: I! H' q+ i
#ifdef STM32F10X_LD_VL
3 B2 J: S& \& u1 a
$ ~/ ?8 b" j" | ADC1_IRQn = 18, /*!<
; j2 _2 X% t+ G7 T5 ZADC1 global Interrupt */1 N8 O( Q# E4 D3 R' Y) R
; T7 A6 T& {6 U- g' D
EXTI9_5_IRQn = 23, /*!<, d. {& }5 ~) b7 H) B; E' r( h
External Line[9:5] Interrupts */
* x% e( U0 E E1 t" `& i$ x5 f& q, ^5 ^
TIM1_BRK_TIM15_IRQn = 24, /*!<
' [/ V+ |" A- G/ pTIM1 Break and TIM15 Interrupts */
" S- D( z) d8 m( b
0 t# ]! f5 L6 K1 F$ o- r TIM1_UP_TIM16_IRQn = 25, /*!<
( ~+ p4 j, R0 v& eTIM1 Update and TIM16 Interrupts */8 O, [% z; }& [2 V
; }& B& b& h9 ^! [, y+ A+ D
TIM1_TRG_COM_TIM17_IRQn = 26, /*!<
$ m. m& n% G6 O: W ~TIM1 Trigger and Commutation and TIM17 Interrupt */1 E3 m9 L* n; N7 G8 Y
- ]$ E' B# {% N0 P3 A+ D TIM1_CC_IRQn = 27, /*!<
- A5 B% m3 K; ?+ UTIM1 Capture Compare Interrupt */
1 } ~$ a B- c- v- C: _" f( A1 e4 T+ ?# l1 b7 Q
TIM2_IRQn = 28, /*!<# v9 x6 ~: N8 N
TIM2 global Interrupt */) [- U8 }8 ~$ p
# T, t" E' R c6 V& a+ H TIM3_IRQn = 29, /*!<! e3 I7 M0 B4 u7 n ?& H
TIM3 global Interrupt */
* z7 C* _/ T6 K/ S% |( R2 C, d$ Q& W, K0 i- c
I2C1_EV_IRQn = 31, /*!<0 }" v3 [' |) ~* p8 D1 `
I2C1 Event Interrupt */1 z. S, f9 Y/ [' O
/ J) K7 l5 e; [6 \* l
I2C1_ER_IRQn = 32, /*!<6 | |8 m6 H7 b
I2C1 Error Interrupt */. F$ X" [ L! L7 @. Y. q" e( f3 h: h
, @4 S6 _/ r; n8 b% a/ U* t
SPI1_IRQn = 35, /*!<9 N* \2 _8 x0 R
SPI1 global Interrupt */
, P' y) x2 q9 e4 I' S) u1 ~: b! N8 W5 ^6 g% k S
USART1_IRQn = 37, /*!<! V1 k! j2 y) a9 p
USART1 global Interrupt */
]+ n( d' ~6 i6 W/ s _5 m7 X9 e, @$ Z5 ?7 G! E# l
USART2_IRQn = 38, /*!<
Y7 Q& p* S* W6 TUSART2 global Interrupt */
) M" z$ F+ s9 I9 K- p. {6 Z+ u' x/ Q7 P3 A4 b
EXTI15_10_IRQn = 40, /*!<
0 o( x+ J& B9 t w! XExternal Line[15:10] Interrupts */( \" @0 Q J/ v+ O& K2 O4 K% s4 j: r" ^
2 c: d. q4 m1 Z) V3 r5 L3 g$ n7 N
RTCAlarm_IRQn = 41, /*!<. N, {! h2 r% d3 X; r& ]8 i, {' y1 E
RTC Alarm through EXTI Line Interrupt */4 i: L5 K( p* E. z; t' ?0 y
7 v, I' P1 h o
CEC_IRQn = 42, /*!</ n, w. v: ?8 \+ Y' g; ]4 Q0 [& l
HDMI-CEC Interrupt */! d: `; W- v- [1 r! `5 E1 l# Q8 f( Y
% z4 J" c2 g {( u% v V6 M TIM6_DAC_IRQn = 54, /*!<) Q$ T7 E0 _& |, U' F
TIM6 and DAC underrun Interrupt */0 V! o; L2 \" _8 o1 T/ ?
: b2 {$ f2 I9 S( V: B+ @5 k' E TIM7_IRQn = 55 /*!<
; i" l' X9 D; M; ?" N7 aTIM7 Interrupt */ 7 i/ g9 A, D! i
, W6 L2 o# z# W( W# u9 f7 k5 p2 Y#endif /* STM32F10X_LD_VL */0 @- q7 Z$ l9 V, e
" @3 N0 N* p, y: p" J; n* }8 ?4 Q, ^5 e2 O- ?6 h
" q8 y! n& u# E8 A, t——————————————————————————————————————————-
+ Z" F0 t$ f! ^/ y8 d8 X——————————————————————————————————————————- 这里是STM32比较重要的头文件
8 \# }) I% h" `0 i# V7 W 系统异常ID：
2 T) ?# d" t# x0 l6 D3 R / D- V: |9 `& C, n6 }/ r) n
^' G1 n6 P3 D4 ^& Y! v标号 | 中断ID | 描述 | NonMaskableInt_IRQn | -14 | 不可屏蔽中断 | MemoryManagement_IRQn | -12 | Cortex-M3内存管理中断 | BusFault_IRQn | -11 | Cortex-M3 总线Fault中断 | UsageFault_IRQn | -10 | Cortex-M3 用法Fault 中断 | SVCall_IRQn | -5 | Cortex-M3 SV Call中断 | DebugMonitor_IRQn | -4 | Cortex-M3 调试监视中断 | PendSV_IRQn | -2 | Cortex-M3 Pend SV中断 | SysTick_IRQn | -1 | Cortex-M3 系统Tick中断 |
0 L% t) h" q e) B
外设中断ID： | 标号 | 中断ID | 描述 | 标号 | 中断ID | 描述 | | WDT_IRQn | 0 | 看门狗 | EINT3_IRQn | 21 | 外中断3 | | TIMER0_IRQn | 1 | 定时器0 | ADC_IRQn | 22 | AD转换 | | TIMER1_IRQn | 2 | 定时器1 | BOD_IRQn | 23 | 欠压检测 | | TIMER2_IRQn | 3 | 定时器2 | USB_IRQn | 24 | USB | | TIMER3_IRQn | 4 | 定时器3 | CAN_IRQn | 25 | CAN | | UART0_IRQn | 5 | UART0 | DMA_IRQn | 26 | 通用DMA | | UART1_IRQn | 6 | UART1 | I2S_IRQn | 27 | I2S | | UART2_IRQn | 7 | UART2 | ENET_IRQn | 28 | 以太网 | | UART3_IRQn | 8 | UART3 | MCI_IRQn | 29 | SD/MMC卡I/F | | PWM1_IRQn | 9 | PWM1 | MCPWM_IRQn | 30 | 电机控制PWM | | I2C0_IRQn | 10 | I2C0 | QEI_IRQn | 31 | 正交编码接口 | | I2C1_IRQn | 11 | I2C1 | PLL1_IRQn | 32 | PLL1锁存 | | I2C2_IRQn | 12 | I2C2 | USBActivity_IRQn | 33 | USB活动 | | Reserved0_IRQn | 13 | 保留 | CANActivity_IRQn | 34 | CAN活动 | | SSP0_IRQn | 14 | SSP0 | UART4_IRQn | 35 | UART4 | | SSP1_IRQn | 15 | SSP1 | SSP2_IRQn | 36 | SSP2 | | PLL0_IRQn | 16 | PLL0锁存 | LCD_IRQn | 37 | LCD | | RTC_IRQn | 17 | RTC | GPIO_IRQn | 38 | GPIO | | EINT0_IRQn | 18 | 外中断0 | PWM0_IRQn | 39 | PWM0 | | EINT1_IRQn | 19 | 外中断1 | EEPROM_IRQn | 40 | EEPROM | | EINT2_IRQn | 20 | 外中断2 |
: x2 R" ]; ]9 u. @
#ifdef STM32F10X_MD這是我們前面講過的不同的芯片型號，對應
1 y. F3 F$ g$ x# h1 i# @著不同的中斷級別。請大家自行研究！
' w) ^0 Z8 H6 x5 M# S \7 S$ z0 g' v) y
ADC1_2_IRQn = 18, /*!<* y: f" B! a0 b) F" o/ h7 ]1 J
ADC1 and ADC2 global Interrupt */
. x, W- K/ d; \& B2 }9 N, _
7 V1 L# w% P* f, L USB_HP_CAN1_TX_IRQn = 19, /*!<3 N( c) T7 |* o! X1 l4 g4 F' g
USB Device High Priority or CAN1 TX Interrupts */9 S9 ?. a4 R+ T0 |
. r. g# _8 F: s: H- L& C2 O
USB_LP_CAN1_RX0_IRQn = 20, /*!</ ?: L U9 T2 l/ H) c
USB Device Low Priority or CAN1 RX0 Interrupts */
+ o0 y K* z0 d* n9 A- Z; L/ Y2 d. {3 } U/ w
CAN1_RX1_IRQn = 21, /*!<
. F! s7 f$ x8 E, S) A. l1 I5 qCAN1 RX1 Interrupt */
2 ?2 v: }2 x$ v& Z
# n, f e8 Q6 J, v CAN1_SCE_IRQn = 22, /*!<$ g0 E6 F* K- P X7 [, E; L
CAN1 SCE Interrupt */1 V7 y) |' A1 F5 \. U7 s
* o2 h8 ^5 Q: c; x& S) k9 ] N EXTI9_5_IRQn = 23, /*!<
5 a- N5 e, a- X9 ]1 qExternal Line[9:5] Interrupts */
6 l+ A( F3 t0 v, F- M ]9 a/ F8 [0 S% d3 r5 h+ | i8 q
TIM1_BRK_IRQn = 24, /*!<0 U+ X5 ]( x u5 t: }( K3 H
TIM1 Break Interrupt */3 W$ A0 m N3 G5 {* B9 ]1 a
6 H& [$ w5 H6 H- J, \- W- m# ]9 ~ TIM1_UP_IRQn = 25, /*!<
" @* v* I# s/ O9 B+ E, JTIM1 Update Interrupt */
" t) H/ P- C6 X) H8 r9 d) b% C" o8 R! Z% D
TIM1_TRG_COM_IRQn = 26, /*!<& P# y2 D9 V. f; |, [& t( \* q% N
TIM1 Trigger and Commutation Interrupt */
) i% P6 z8 p0 U! Y7 c7 r$ x) i9 w! ]
4 u, l' T0 X- l) e/ }5 K TIM1_CC_IRQn = 27, /*!<1 s1 e6 D7 Y; U8 {4 _
TIM1 Capture Compare Interrupt */
0 k; Y- T, |, ~' b4 D2 R: L; F( V6 |' s* r4 X! S; B. s- R2 [
TIM2_IRQn = 28, /*!<
; w- `/ F V6 s) X) l" YTIM2 global Interrupt */
, L+ r9 A6 Z, P$ t2 l! e5 V0 y' d U' b- I1 n. R. _9 S- I
TIM3_IRQn = 29, /*!<2 |/ C7 e7 ~% }% U- B
TIM3 global Interrupt */, H$ o, r$ Y o
- d. u$ q7 z7 n' P8 F8 N TIM4_IRQn = 30, /*!<
+ m; U& T' k) F. KTIM4 global Interrupt */
! I/ W# ~: w1 Q1 K# ^3 X$ \. c# L5 i5 a
I2C1_EV_IRQn = 31, /*!<
% Y% b! k1 _+ HI2C1 Event Interrupt */6 V" A5 o B+ @/ y+ X. v y+ |& o
* L8 i& W3 i. A# B, d6 D9 I0 v3 V
I2C1_ER_IRQn = 32, /*!<# H$ ^, e/ H9 v1 p
I2C1 Error Interrupt */
: i4 U+ B' W2 i" Q' W' A! X$ H* @7 O$ g4 P# m8 g5 Q+ {
I2C2_EV_IRQn = 33, /*!<
7 E- @- a# D1 u* n: N/ {( q- NI2C2 Event Interrupt */
7 V6 O2 t4 |2 ^
$ @2 z: Q5 ^# `* G/ a I2C2_ER_IRQn = 34, /*!<
% b2 ?9 u' n9 |I2C2 Error Interrupt */7 `% M. l# q) U
0 _3 f* l/ ^5 [( U" y3 i SPI1_IRQn = 35, /*!<
- x% C+ t$ e A% fSPI1 global Interrupt */
! ?. M- Q. v& s- c( r# ~. m, p/ x$ {5 B3 Q6 f0 R) s( p; T* B; r* \7 S O
SPI2_IRQn = 36, /*!<
0 O4 M4 i3 Y5 |' q0 k5 i; VSPI2 global Interrupt */
% ?% @1 q+ I6 n% ^
! |8 |* ~1 q6 P, ] USART1_IRQn = 37, /*!<2 r! [9 B1 v, ]8 C, m/ f) O
USART1 global Interrupt */
$ ^- c# T/ |$ D# }9 Y+ W& r$ ]7 S+ ]0 R3 N; Y: b& b
USART2_IRQn = 38, /*!<( y" s! S1 D: k
USART2 global Interrupt */8 c* x: ?/ c+ v8 F
. ^$ j' B, X5 ~+ B& o& A% c USART3_IRQn = 39, /*!<
7 ?4 |# o! p* Z* M2 p' _- |0 X: u+ gUSART3 global Interrupt */
$ Y' n0 |$ [4 N6 b( U5 v
6 h* A6 u! Z! } EXTI15_10_IRQn = 40, /*!<
# R9 n( R3 B0 B6 a' B4 nExternal Line[15:10] Interrupts */+ a5 ] ^! D4 C- O' C0 W: A8 w
6 @# e9 P, N3 c# e4 V RTCAlarm_IRQn = 41, /*!<
! o ?& |3 f7 \$ |5 i5 \; a! ?RTC Alarm through EXTI Line Interrupt */
4 ]% J# \0 ?4 r0 I
( ~: K' Y. g# n3 y( p/ ]* j& M3 s USBWakeUp_IRQn = 42 /*!<
# T' I9 s1 o/ B6 C" i6 T1 dUSB Device WakeUp from suspend through EXTI Line Interrupt */ * W* @( w* c5 J l
. T- Y: K/ q/ D3 U
#endif /* STM32F10X_MD */ O3 t1 u* \5 t6 g7 V4 e- R
: K5 v4 J7 |; p( R5 j4 o: V' i
9 z y$ a) L) t( U% X* H
5 Z2 v8 n4 ]1 \# E5 Q#ifdef STM32F10X_MD_VL這是我們前面講過的不同的芯片型號，對應" r4 d. U Z/ @" G
著不同的中斷級別。請大家自行研究！
1 x+ o& t# \0 e/ H
+ V; {& w# ?5 F' k ADC1_IRQn = 18, /*!<. S, ~. } z3 p# M# v5 R
ADC1 global Interrupt */
/ l6 A1 ] |1 N" ]4 O& h
+ E1 G/ M( q- R EXTI9_5_IRQn = 23, /*!<
( @: k% H* z* P9 XExternal Line[9:5] Interrupts */
$ k( \" a5 u8 ~
# a8 r9 r: z1 ^( r; n7 i8 G) X TIM1_BRK_TIM15_IRQn = 24, /*!<- w" R) P1 J8 H
TIM1 Break and TIM15 Interrupts */
& X1 P2 C5 Y1 ]0 t' P6 S) T1 i
) C: ]+ U" ?: k2 x& N TIM1_UP_TIM16_IRQn = 25, /*!<$ f2 W Z' M+ U' A7 c, z
TIM1 Update and TIM16 Interrupts */
8 N) O# n# ]5 t$ u, S! {: m% b, Z. O0 p9 s% w" _
TIM1_TRG_COM_TIM17_IRQn = 26, /*!<$ f0 z/ k) D2 P) X/ j# U, Z
TIM1 Trigger and Commutation and TIM17 Interrupt */2 D2 I! N, r1 o* y/ j
$ H8 I4 u/ h8 ~1 R: v TIM1_CC_IRQn = 27, /*!<, t8 O3 a0 v; ~
TIM1 Capture Compare Interrupt */1 P7 q9 s* y e$ n4 Q# o
7 i$ ^6 v! M! m F$ ]) N/ j/ O& {( z TIM2_IRQn = 28, /*!<
8 v: J }4 B! P" T- _/ [TIM2 global Interrupt */- X! ~# {) p. Z8 k
' w* Z0 O' @2 P( D$ J
TIM3_IRQn = 29, /*!<
# X2 k7 M+ ?$ A/ M# LTIM3 global Interrupt */
" o8 n& R5 O L; d* u( n% P6 v- d0 `& m5 u: R. u& n r
TIM4_IRQn = 30, /*!<
) W3 V8 z0 w7 L& \TIM4 global Interrupt */& P7 G; \: ?9 V" l% T8 Z& n
; `( C1 Y' e5 ~3 v/ H
I2C1_EV_IRQn = 31, /*!<
5 h1 G& N$ e# j$ n' kI2C1 Event Interrupt */3 n+ O2 x! T& k/ a# T9 ]
1 Z! y* }: x: L) \$ {
I2C1_ER_IRQn = 32, /*!<
" C% z0 J- _9 \, q% GI2C1 Error Interrupt */% N' x5 v5 D# u Q" E
9 H) w. R; o X1 w1 F; I I2C2_EV_IRQn = 33, /*!<
; ]- O+ n* b8 U0 _5 z5 D" Y7 t0 F1 \I2C2 Event Interrupt */; K7 o G) g; M
" y/ K/ g2 }$ ~. e, D5 \' y: `3 ^2 K I2C2_ER_IRQn = 34, /*!<
! L1 q( J* t2 ]- V6 qI2C2 Error Interrupt */) j! Y4 \: f9 l1 C
# G5 x* @3 K7 V# G- d) r SPI1_IRQn = 35, /*!<
; z5 X" J, I2 ~, z2 A- GSPI1 global Interrupt */
: e" W) V9 U) [& @% |7 w: I0 p" K. G9 v
SPI2_IRQn = 36, /*!<
2 f3 S. {7 [2 x9 M* uSPI2 global Interrupt */
$ m9 E- m" M8 s+ m8 d) u4 N) c
USART1_IRQn = 37, /*!<( b( P' s5 x. l) _; p+ Z9 L
USART1 global Interrupt */; f0 O% j% f; |, K% b
+ U9 M V% { n! h2 S8 R( x1 m USART2_IRQn = 38, /*!<
9 l% _1 n4 X, j$ m: Y8 R* ]" X8 YUSART2 global Interrupt */
' _' ^$ H1 |9 c# G+ S" ?% W3 z. c! @. h" a1 @
USART3_IRQn = 39, /*!<
7 ?: x; P8 i+ v* \& ^. s* HUSART3 global Interrupt */# }% k: \5 A' p, c
& g3 L: ~4 k; l
EXTI15_10_IRQn = 40, /*!<
, R0 E' U5 K/ a& A# u) w' uExternal Line[15:10] Interrupts */& J& o$ _$ W. l
$ ^$ o1 v$ ?: D' Q; b RTCAlarm_IRQn = 41, /*!<
+ m9 \- F' s0 l: y5 m( D+ g1 x' n1 L) yRTC Alarm through EXTI Line Interrupt */ a- @( ^3 h. n8 P2 I
6 o r4 E' E4 U& [% L
CEC_IRQn = 42, /*!<
5 ~( t" H7 J" q* O: S4 X8 YHDMI-CEC Interrupt */
0 B- }7 T' s& Z8 x5 h% K, M- h3 {6 x$ B
TIM6_DAC_IRQn = 54, /*!< y' C' m5 l# B
TIM6 and DAC underrun Interrupt */& s( C/ b" J5 s. n5 n
9 w; @7 G# G6 I) u. W1 ~2 I
TIM7_IRQn = 55 /*!<* q3 V* E; l* _9 b6 z" X1 W! [
TIM7 Interrupt */
+ l( n* f9 l! \" t, k: V. i9 q! b. V& H. c- N& d2 i) l: I Z8 ?
#endif /* STM32F10X_MD_VL */* K; n! w/ D0 W" _+ k" W5 h; ?0 H
# ]8 W; k3 B. r8 P' V
! s; a7 a3 B9 t2 G* P' v$ [
7 v6 b/ p8 y$ t( e$ N+ z
我們通過這個枚舉類型，可以知道系統所有的中斷都在里面，而且可以了解它們的ID，這就代表了它們的中斷級別。
$ z2 i% e' e: P2 o: X+ N6 L/ C/ Y* x. |( F
8 ~/ Q* N; j" f' G+ s; p7 C& g. n
; p9 d7 N# J0 \# r———————————————————————————– ———————————————————————————– #include “core_cm3.h”STM32的内核是ARM CORTEX-M3，这个core_cm3.h包含的是一些内核相关的函数和宏定义，例如核内寄存器定义、部分核内外设的地址等等，其对应的是core_cm3.c文件。初学可以不管他，只要把它包含进工程里就行了，这里都是非常底层的函数，上层的一些函数直接调用它们了。如果对CORTEX-M3内核有兴趣或者基础较高，想深入了解这些函数，可以仔细研读一下,我们在后续的开讲中会仔细讲解这一个文件的内容。
7 L" k$ X4 x, L9 }- ?#include “system_stm32f10x.h”这个文件就是我们现在所讲的文件了。
. I' \7 C! f8 k2 y: |) d3 j#include <stdint.h><stdint.h> 定义了 int16_t 、 uint32_t 、 int64_t 等整型，在需要确定大小的整型时可以使用它们代替 short 、 unsigned long long 等，在 C 整型中，只使用 int 。. E, y# m6 N0 Z6 x9 Y u
( [$ v j7 R% q. U6 v* @8 }! n
/** @addtogroup Exported_types
6 J V# n- V2 Y+ E% D+ A * @{
~& w" a5 L% m9 d */
9 Y0 g3 b5 U, A2 V" X; y5 U
& a5 Z1 P; l$ v* a X/*!< STM32F10x Standard Peripheral Library old types (maintained for legacy purpose) */由于新的文件与老的文件会有不兼容问题，所以要转换变量类型。
# L9 U: ?# [9 y1 R) H2 Y9 S! z: }typedef int32_t s32; typedef 在计算机编程语言中用来为复杂的声明定义简单的别名，与宏定义有些差异。它本身是一种存储类的关键字，与auto、extern、mutable、static、register等关键字不能出现在同一个表达式中。
3 f; r, T1 y4 d5 O2 q《变量类型》，3.0以后的版本中使用了CMSIS数据类型，变量的定义有所不同，但是出于兼容旧版本的目的，以上的数据类型仍然兼容。3 \3 ]1 W4 R4 O9 d9 B/ r
CMSIS IO类型限定词 IO类限定词; v! `/ Y0 x& y
| #define' m, f% I4 R3 L; b
| 描述
, f; u# p( V9 O% [3 _- c | _I* g( g8 W# z/ H
| volatile const
" [5 R/ d" Y8 W" j3 j0 _ | 只读访问3 d/ ?2 n- K2 @$ Q
| _O' U( q* z, d$ V2 e! e+ G3 s
| volatile
! T. t, x! h9 U; U+ A! r' U+ W | 只写访问) h" Q* E- z5 {, i* F7 X j) W
| _IO
( h$ C, ?9 D' U | volatile' q- E& H6 ^* ]% Y4 a
| 读和写访问7 ? k b" u* F& `" y# y' D$ P
|
# _, [. f3 } q$ W! q' G- ]' j$ t
件库与CMSIS数据类型对比固件库类型6 @2 U, H! O% ^
| CMSIS类型
% S \- C6 L# \ | 描述
7 g( s4 q2 G X/ S2 A | s32
6 p- |. e) G+ z( \/ M) |6 G | int32_t
" @! E$ X( Z2 r, b' i3 y | 易挥发只读有符号32位数据
' V1 K: ~2 |% D% _, W | s16# l R6 a$ O* D7 i0 O6 k8 v; u; N
| int16_t
$ z5 V, Y9 [+ |; X! j | 易挥发只读有符号16位数据- P) ?0 A9 N1 o$ o t- ]& b! S
| s8* X0 {1 G9 G$ L0 M1 K: Z
| int8_t
: S3 S0 \* M+ D$ J6 ~; f | 易挥发只读有符号8位数据
$ G5 j; Y8 V4 q! X' W0 p' w | sc32
# H# K2 F) P& Z. v | const int32_t$ }$ |6 S# j+ C& Y4 O
| 只读有符号32位数据
& L4 ]6 T0 k% \- H; L$ p+ M1 N | sc16* X+ l* B' ~1 \8 z4 X
| const int16_t
" Y4 l4 K$ X3 @ | 只读有符号16位数据
5 ]/ l. a7 R( } | sc8" L4 i7 @" }/ [% X6 g# B2 X
| const int8_t/ y8 `- i8 Z) H
| 只读有符号8位数据0 d6 t- y' Q- s4 }' I3 o
| vs32
- L% ]& C; D& l! O0 N& O3 R- `- ? | _IO int32_t1 x1 T; A; c+ y9 q+ h( q# g
| 易挥发读写访问有符号32位数据
& {6 F- o3 {9 c2 W | vs163 i1 {" ]! R1 N5 ^# F0 o
| _IO int16_t6 s; X, A6 T# f' h! l% X
| 易挥发读写访问有符号16位数据
1 Z2 a5 v1 o) n$ _& b | vs8
. ~& b1 ]* P8 i, v. F& G. M | _IO int8_t4 d3 W) V2 e8 Y: w
| 易挥发读写访问有符号8位数据
3 E, v! `6 k3 n. h: Y8 T2 w | vsc32
8 k2 S* m' {' u/ A: ` | _I int32_t
: {/ A; Q4 D& |% i0 A | 易挥发只读有符号32位数据! R% _/ K+ p, B4 V" ?
| vsc163 v3 z3 [/ n' T$ j! X5 _1 P" ~3 e) l
| _I int16_t" U. V1 T3 m4 S
| 易挥发只读有符号16位数据
! C o9 e: S9 E# G) }' b. i' s | vsc89 ~' t% f; T# d# M5 _1 t
| _I int8_t* ]! n) U: E4 H3 l1 k
| 易挥发只读有符号8位数据
3 T9 `& d. [; c c7 m | u32
; k& y& S3 g. f3 l7 \ | uint32_t
: ^, [+ M' n/ b. \: T5 d | 无符号32位数据
+ ]# G2 s, X9 j: E5 k6 V9 X | u16- k& s! n: [' t _6 \
| uint16_t
( p) ]% T" U6 h) E* T0 }! X3 K6 i | 无符号16位数据
( O3 G: _; k( w: }1 a1 K" O+ k | u8
/ Z2 V4 [( \- z/ q' l# E+ M2 R | uint8_t7 V# F- f' t8 y, a9 J' G* d$ L; r
| 无符号8位数据
o, b! R# H$ |" T! D/ T' g | uc327 v Q( S3 H% @9 h
| const uint32_t5 @; h3 i# q: n8 y
| 只读无符号32位数据
9 u+ h8 R P( _ | uc16
. y/ Y5 u; M8 b) z K | const uint16_t* E) {5 }1 Y; |
| 只读无符号16位数据
9 b7 ^6 u! f6 s, |7 d | uc8
0 H% s: v% F; s5 ~+ g- c | const uint8_t
) d+ y. l! v8 ~1 r | 只读无符号8位数据- J) C0 s o* b& H' S) z' V
| vu32" K8 y( _: [. Q; u' ]- [2 q
| _IO uint32_t
$ v5 Z& D' E( Z# n( X* H! ? | 易挥发读写访问无符号32位数据
8 M( K( z- d2 y: ^6 s6 O6 M3 d | vu16
6 n# e: k% ]6 [+ `2 I9 p8 w | _IO uint16_t
# U. A; u7 H: T/ d) p- o | 易挥发读写访问无符号16位数据
3 H* a$ i) j, h* X, V | vu8
/ Z. l) r/ O w2 v | _IO uint8_t' _+ Z5 m5 e( |1 u- v
| 易挥发读写访问无符号8位数据( @" s% Q8 ?! T' y# }
| vuc32
4 Y2 s& N2 {/ ?3 q/ r6 e+ i2 ^ | _I uint32_t0 P* B1 t( }) z2 Y' j; F
| 易挥发只读无符号32位数据
1 E/ I1 Z" W6 k* F! k y | vuc16
0 `2 C9 z7 p% ?$ B# u5 g | _I uint16_t
2 }# V7 o) ^# Y' O- a/ R | 易挥发只读无符号16位数据% O: o2 a' K# y/ V
| vuc8
! y: w, V" e) n9 M- X | _I uint8_t
+ W) K, L; K2 m$ H | 易挥发只读无符号8位数据
) P% Z+ Q( Q( c+ z4 ? |
$ E' y% t) l" ]3 M' Q9 B% K. g# W1 [. z, Q
1 r9 P- x. N; K( u+ {
stm32f10x.h文件中还包含了常用的布尔形变量定义，如：; W- R* o5 H5 F6 m! t9 j6 f# x
1 typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
5 R# Q# S9 g* F9 \0 J2 4 ~5 N9 \5 J- `0 s4 q9 c; U
3 typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;- `! `9 U9 a3 c/ [3 s* H$ f
4
7 ]5 ^. Y# \* _; O+ s5 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
9 c: j; ]. r! j" T [; t4 y6 ( V9 r7 F& m1 W) \: |4 k
7 typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; ~) o) F8 i; e7 x! [; y" Q! t4 h
不同版本的标准外设库的变量定义略有不同，如3.4版本中就没有之前版本的TRUE和FALSE的定义，用户也可以根据自己的需求按照上面的格式定义自己的布尔形变量。在使用标准外设库进行开发遇到相关的定义问题时应首先找到对应的头文件定义 。7 e+ r& a1 Z9 l5 z
- {! d! |! Q6 y7 n
, w h/ Q; a& k) y% h' K' I
typedef int16_t s16;
) G; t C4 m3 e( y: D( u) w( ytypedef int8_t s8;
- U+ ~8 n" b# R& Ktypedef const int32_t sc32; /*!< Read Only */, [2 J7 U/ j" x
const是一个C语言的关键字，它限定一个变量不允许被改变。使用const在一定程度上可以提高程序的安全性和可靠性。另外，在观看别人代码的时候，清晰理解const所起的作用，对理解对方的程序也有一些帮助。另外CONST在其他编程语言中也有出现，如C++、PHP5、C#.net、HC08 C。 . j2 S, R- u$ ^/ a, A9 x
typedef const int16_t sc16; /*!< Read Only */6 Y# u9 k7 I/ ?; y- }! i& J
typedef const int8_t sc8; /*!< Read Only */
5 | D' d. _6 J7 A" H# g% b, |
; @: J& Q- [! Qtypedef __IO int32_t vs32;
( ~! u% i" p, R( A! ^typedef __IO int16_t vs16;
5 X0 e9 a4 g6 b2 C5 e/ Ktypedef __IO int8_t vs8;8 E- T# }; \+ I9 Z# A% c
- V0 L; a/ f& ~. k6 d: X* Z
typedef __I int32_t vsc32; /*!< Read Only */* w0 g+ _; U5 _; q. t, n, s: [( p$ R
typedef __I int16_t vsc16; /*!< Read Only */* d' \" }" }. f" X5 @; j* [; @
typedef __I int8_t vsc8; /*!< Read Only */
# ]; [# s! m5 d4 [* G1 ?2 B5 V$ P; Q& @( X% S) ~
typedef uint32_t u32;
. L7 y0 \9 M, l% I& G. ktypedef uint16_t u16;- j1 W+ l: ]6 t4 p M# S
typedef uint8_t u8;8 V& ?4 X, }+ ^9 N! M" W, H1 G L; B
, M7 `+ d, X8 G! ~% @
typedef const uint32_t uc32; /*!< Read Only */( X4 [" _2 T4 H# c P9 B
typedef const uint16_t uc16; /*!< Read Only */8 d; e' v* E' d* {) z( z( Y
typedef const uint8_t uc8; /*!< Read Only */
1 h3 _+ ~1 |( F D4 O% `8 W; P0 b- ~8 C n2 e9 N3 @8 ^
typedef __IO uint32_t vu32;
0 }2 n) g4 o( M$ Q2 {typedef __IO uint16_t vu16;
* h, y! G7 K9 q: Y. V7 o# `& utypedef __IO uint8_t vu8;
* X7 s/ t+ ^6 _. u$ S4 O7 h6 q0 U; H" i( c' J8 \' \
typedef __I uint32_t vuc32; /*!< Read Only */
# Y/ Y) t+ `( O9 Ctypedef __I uint16_t vuc16; /*!< Read Only */
6 A4 h7 W6 ~+ b/ _8 E* A# y7 f' K/ Ftypedef __I uint8_t vuc8; /*!< Read Only */. j1 z; l4 P) e, k2 c
" q$ O y) c4 Q/ i/ @/ e, _+ M" O
typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
- [9 [0 N' M1 ?
/ H: |# f6 b4 ?typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;5 B l$ r( x9 I
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
3 J) r0 S5 k. ]1 i: ?# g7 R& j1 G9 ]! p" X
typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;
: P4 m$ ]( o/ \: E2 q1 P% x' M' G& t* i& y
/*!< STM32F10x Standard Peripheral Library old definitions (maintained for legacy purpose) */( `5 B; V, p" Z( J
由于新的文件与老的文件会有不兼容问题，所以要转换变量类型。 ) ~/ S# y% j% t. N
#define HSEStartUp_TimeOut HSE_STARTUP_TIMEOUT 请大家注意这里的定义，高速外设时钟的启动时间。
" @$ b9 \4 o+ C% W- |#define HSE_Value HSE_VALUE+ c: r' ?* G1 q
#define HSI_Value HSI_VALUE
9 {/ W9 Q8 F7 s; W3 U1 v* m, z/**
: J/ Z( ~( i+ z! {+ C7 M) R2 W * @}
1 M" J `7 B/ p! U/ l2 j' C */9 D& s3 L1 \, r, N" X% P. E
9 I! E4 N' ~* J; X. {) I- m
/** @addtogroup Peripheral_registers_structures
& \7 F |1 |0 ]: m * @{* V6 h! }# D# O( w: L
*/ 4 c8 L, _% a; U/ n; [& F1 I8 V9 r4 \
* d# J0 Z h! e* F/**
' e2 N0 d! e) D# r5 G * @brief Analog to Digital Converter
: H! i1 W/ w6 `8 b5 U */
. W+ v/ |1 e; s# g# L1 l( ~
r. Z" c6 y4 |1 |1 Ktypedef struct ADC_TypeDef结构体的声名，看看它内部都有哪些内容。请读者注意。
( W/ x0 y; d1 Y; i x ADC_TypeDef，看起来是一个结构类型，是对ADC寄存器各地址的一个定义。& b3 S) y# O* B# s2 b
{ __IO就是volatile uint32_t就是32位无符号整形数。
( R h0 h, w" ?/ X# Q这都是ARM公司无聊滴在CMSIS库里面定义的。STM32库1.x 2.x都没有这玩意，到了3.0以后引入了CMSIS就有了。 __IO uint32_t SR;
( R) F0 V+ Z! P0 @4 k! D. _) @ __IO uint32_t CR1;
7 d2 B+ [' C/ f7 T! L% B __IO uint32_t CR2;
7 x8 Q# I6 L6 q __IO uint32_t SMPR1;3 y& J- G3 k5 J, i3 p0 f( V: J
__IO uint32_t SMPR2;
1 S# B* o" p$ ?3 r: ?4 o __IO uint32_t JOFR1;3 M. |5 p# I- @* y6 P
__IO uint32_t JOFR2;: V' z) l. f6 b+ c. ?. E: w% e7 S r
__IO uint32_t JOFR3;
% i" j5 v5 U) t" d" L __IO uint32_t JOFR4;
& u4 k3 s; Y8 y( n: i2 R __IO uint32_t HTR;
, g9 S! G) f4 ?7 Q( A" M9 t8 T9 U9 S __IO uint32_t LTR;
6 X5 G% e \# J$ ] __IO uint32_t SQR1;
7 M9 Z, q" u M6 @. x4 `1 t9 @ __IO uint32_t SQR2;
4 u. r s& r) _/ Y9 i __IO uint32_t SQR3;
+ ]/ d9 X, r1 f( I; I, m1 P __IO uint32_t JSQR;
2 n: a+ P N! p) ~6 s4 {, ^" B$ a __IO uint32_t JDR1;1 B( P* a/ ^0 s( n) r
__IO uint32_t JDR2;
; ?* [! k# j5 m: K/ a __IO uint32_t JDR3;
. {# l6 e! t3 P5 j/ d __IO uint32_t JDR4;0 M) {- R. n4 C: C4 y
__IO uint32_t DR;/ ]* G0 F) D0 [
} ADC_TypeDef;* |! n! w4 ^0 G2 \' @
: _, {$ ` q$ ?$ r: S
/**
( v5 \$ b; P0 A3 a * @brief Backup Registers
4 E) s W4 B- M; \9 Q, k2 a */+ i: x9 [" d, C9 A% y& y+ r9 ~ |
$ w$ ^/ ^3 b- e9 k, S3 Vtypedef struct 这个结构体声明的是数据备份寄存器，它们是16位的。它可以管理防范入侵，可以存储RTC检验值，可以做数据备份。
! e' s' O0 i% M4 D% `, m{% n: Y$ I2 m; i j- T; T
uint32_t RESERVED0;8 c9 j' N2 O! r2 }- K0 X
__IO uint16_t DR1; DR代表数据备份1—454 m$ }, J2 v3 K' [7 ]3 L
uint16_t RESERVED1;0 I8 s3 X S8 d8 z
__IO uint16_t DR2; p2 p& ?) N/ D1 ~
uint16_t RESERVED2;
& o' r! K5 R K __IO uint16_t DR3;5 D6 q* b, c) z, t6 g* o# l
uint16_t RESERVED3;
- E- S( W' C+ r' B7 s" N9 k2 W$ S __IO uint16_t DR4;
% \& I+ N; L* D7 `, h9 p uint16_t RESERVED4;4 ]3 v, |9 m" K7 H7 K
__IO uint16_t DR5;- W6 c i" a% n; ^/ c
uint16_t RESERVED5;
# t$ D( V- P$ m6 {7 B __IO uint16_t DR6;
1 W8 y, t4 m8 `8 o+ `# c uint16_t RESERVED6;5 `: A. ?" U8 i' \& V
__IO uint16_t DR7;
% Q, [7 ~+ i$ ~! k2 [% T( v uint16_t RESERVED7;
6 c6 Y4 w! F0 \2 Z0 b1 r __IO uint16_t DR8;9 t% o( q" X/ D8 [( |3 M' N4 X
uint16_t RESERVED8;
, X: ]/ p. o. D) y$ O1 N1 |+ _ __IO uint16_t DR9;: }3 ?5 Q5 _; Y' p* T+ V
uint16_t RESERVED9;
' }: \. ~ D# p" S7 O __IO uint16_t DR10;
: p7 Y, W0 _0 v2 @5 K% K5 q9 w uint16_t RESERVED10;
1 r2 P; R1 o" U" o3 w7 w2 K f __IO uint16_t RTCCR; RTC时钟校准寄存器8 L4 A7 k- M3 a4 n" e
uint16_t RESERVED11;
' l0 I9 W4 h" v __IO uint16_t CR; CR备份控制寄存器( O% j' Y. @! H$ A0 i4 {
uint16_t RESERVED12;% a: Z- D% E$ F
__IO uint16_t CSR; CSR 备份控制状态寄存器 8 ?( E/ C8 K' X* t! F' I6 ]* z
uint16_t RESERVED13[5];, y2 c$ `/ y9 h+ G$ }4 g( s
__IO uint16_t DR11;" t1 j/ w: l" t p1 t6 ~. s
uint16_t RESERVED14;
$ B: _- g; P l4 R X# c __IO uint16_t DR12;8 q1 `, G9 \! W; E
uint16_t RESERVED15;/ J! L+ \: T# o6 T3 l: a- C- L
__IO uint16_t DR13;
& _3 I; C& M3 b uint16_t RESERVED16;
% g* ?7 } d, D, j. B1 X/ G/ d __IO uint16_t DR14;
4 f' V% ?1 {9 @ uint16_t RESERVED17;, M6 D8 h: [# u! N7 v" j
__IO uint16_t DR15;( \; P& ^6 j8 k3 W' V6 C) d
uint16_t RESERVED18;2 e, m# Q: [8 |
__IO uint16_t DR16;
5 J( B) k% B. B" ~. F A uint16_t RESERVED19;
2 H) h0 I1 R. N4 X# F( ]- ? __IO uint16_t DR17;3 L/ e G% i0 M8 @
uint16_t RESERVED20;
0 A+ G0 m* A" ?. L __IO uint16_t DR18;
% P3 L [/ l6 U5 i8 Z uint16_t RESERVED21;
$ [7 ^' y# u, Q __IO uint16_t DR19;+ u b1 M* F ~: J
uint16_t RESERVED22;" b1 Q$ h) F. {: g/ ^
__IO uint16_t DR20;( G$ e q3 F) X v' @. `7 `
uint16_t RESERVED23;. H1 J/ d, T7 V1 l: w, ]# I% w
__IO uint16_t DR21;* D/ e/ J" ]. l4 d6 R
uint16_t RESERVED24;4 j9 l+ x, Y9 _2 c2 j
__IO uint16_t DR22;* I# {/ t) [# I
uint16_t RESERVED25;& v; Y2 M; q2 p
__IO uint16_t DR23;' [" T0 n) d) p0 T( h
uint16_t RESERVED26;
" L' U) f7 {. Q: b __IO uint16_t DR24;( k6 o9 U9 d; g9 x |
uint16_t RESERVED27;
( r; f, I3 R& W/ \: `9 P9 t6 T __IO uint16_t DR25;4 R& ?* g2 G& g6 ~
uint16_t RESERVED28;
3 x3 G* P% b3 [- G3 U8 I( @ __IO uint16_t DR26;5 n$ p( [, G# x u# a
uint16_t RESERVED29;
9 `/ X/ I, r8 w0 _5 I7 C __IO uint16_t DR27;9 {" k& {: L+ r8 `
uint16_t RESERVED30;
) @4 O) ?( \8 W7 }/ N9 | __IO uint16_t DR28;
$ \) G5 w! D: k6 ^6 o# D% b0 a uint16_t RESERVED31;# S9 W9 `3 `% h5 ]3 e' Z9 `
__IO uint16_t DR29;* H7 S6 I2 d: h, q& o' d( S# P8 S
uint16_t RESERVED32;& L' I' W2 |/ J& k0 e
__IO uint16_t DR30;/ f" W9 |! l( C
uint16_t RESERVED33;
4 l- Y4 q- X( t% i9 q3 j __IO uint16_t DR31;
/ A+ G0 H8 I, Z2 ? uint16_t RESERVED34;) B( o2 Z0 i+ F- N1 B1 |
__IO uint16_t DR32;- a9 T7 }% }6 u6 D3 c
uint16_t RESERVED35;
# \0 W' A3 U8 O( b. e5 \, i __IO uint16_t DR33;9 X4 g$ [* n$ e6 L! b% Z
uint16_t RESERVED36;
" t: k7 p! `( V; J. m: O& Y __IO uint16_t DR34;
9 @5 n8 g0 \: @9 Q8 b( H8 { uint16_t RESERVED37;
4 r2 O' k; { j Q __IO uint16_t DR35;
. v# p/ X0 c7 v, ~/ D, f uint16_t RESERVED38;
5 f% C; k6 [" ]- I8 o$ ?8 a1 k) N3 e __IO uint16_t DR36;& {8 d- ?& h2 l, k% Q7 s
uint16_t RESERVED39;& H) t4 x% M# Z' Q, H# Y( v
__IO uint16_t DR37;
" ?6 l: f- {, c) V: `) F9 w+ p uint16_t RESERVED40;7 o2 F6 k% a8 ~" L4 _/ A
__IO uint16_t DR38; e$ M* B' M9 Y: V' w9 ?% o: C
uint16_t RESERVED41;( r5 y! q) r) u6 X
__IO uint16_t DR39;
" B4 e7 @3 I% b M& Z$ i! x uint16_t RESERVED42; [. G( A. ]+ [% R. L* k
__IO uint16_t DR40; E! c) A; y; F$ e; O1 D9 d
uint16_t RESERVED43;
3 n w. j: t9 W+ z __IO uint16_t DR41;6 t% F. f6 v$ ~" l# `
uint16_t RESERVED44;4 {9 T- ]5 `$ C; q8 M
__IO uint16_t DR42;
/ d1 J' g3 q( |9 k! L uint16_t RESERVED45; , q4 U3 x3 O3 ?3 m! z
} BKP_TypeDef;( r) \) R+ l$ K: r3 L6 f
r& m" Y$ M3 B& z R/ _
/**
% H# _7 O+ [' k" \# j* g; \# h * @brief Controller Area Network TxMailBox # Z- M9 D2 b; {
*/
% K( C) R6 Z6 m3 ~) G
- |7 i/ C$ ^+ q I5 u$ gtypedef struct
1 A6 E6 h3 ]7 |' [{: ^) h2 [' ^* I7 [
__IO uint32_t TIR;3 w9 _ t$ H7 g" `' v1 z# `# I0 n$ {
__IO uint32_t TDTR;
' c* O5 B+ E: y$ b9 ~ __IO uint32_t TDLR;
& d6 F- L% v9 O5 \. D5 z __IO uint32_t TDHR;
; S7 C2 q- t8 E3 R} CAN_TxMailBox_TypeDef; CAN的发送邮箱寄存器的结构体定义。
% x |) W& H u6 P# ?7 s
u( m2 _. [! ?9 p' e/**
& R8 {3 Y/ K6 h6 `8 R * @brief Controller Area Network FIFOMailBox
8 ]2 g$ t( R6 ? */+ M K) X* ]- A3 m3 X
4 |; D$ O/ H, B, B( y; _typedef struct
5 m) u& z0 W u{
4 j# N+ f) b4 y. P3 x8 g' p% | __IO uint32_t RIR;
; O3 P: x7 y9 G b, X __IO uint32_t RDTR;4 F( G; ]2 h: W& ~
__IO uint32_t RDLR;; w% b$ ^& ~; B, Z W/ f2 y
__IO uint32_t RDHR;
6 R* H6 }& X$ H d& J( d} CAN_FIFOMailBox_TypeDef; 先进先出(FIFO)缓冲器，是一种寄存器。在这个头文件里定义了它的结构体类型。
# {5 J1 K2 v- u6 m$ |
% l' ?! F. H4 A4 i: ?; b/**
s1 J5 S! L0 ]' G# p3 B b * @brief Controller Area Network FilterRegister # }; j) g9 B4 G: h
*/
3 T( m& `; z% W3 e: Y& a% ], S1 X# ?- H6 \
typedef struct
- F* @! j1 N) L$ B{0 M9 P4 T4 m: U& D8 s4 F
__IO uint32_t FR1;6 i* P9 O3 o4 r" Q. J4 W
__IO uint32_t FR2;
) v& W& @. m* {- T5 s$ M: G( |& p}CAN_Filter Register_TypeDef; CAN硬件过滤器工作模式、访问码和访问码掩码。通过设置CAN过滤器，可以使CAN端口只接收符合规定的的CAN数据包，这样就能将CAN总线划分成若干网段用于支持不同应用。
+ ? h# m" p4 p9 V' ~' S/** ! y3 |4 U: ~) h; O ~) _4 g6 y
* @brief Controller Area Network
0 ?+ z, T$ }+ |. k% b- s */1 e, }9 ?7 U4 g+ @# y$ |
& Z5 z' _9 c7 V G+ t9 N9 k/ |
typedef struct
) Z/ m* O, x8 N- R$ {4 f! b8 z{" F$ L. T- L0 u/ X1 I4 A" S# ]- t
__IO uint32_t MCR;
6 [$ l% | W2 ]- b) r7 x- F __IO uint32_t MSR;
5 A' }& ?0 N& x/ k9 s __IO uint32_t TSR;
' ], e, G, A. b- |% S* q __IO uint32_t RF0R;0 g- ^( l6 r: ^1 `9 m
__IO uint32_t RF1R;
8 l0 H& S- J* ` __IO uint32_t IER;
) |/ N! j) U% p __IO uint32_t ESR;. a2 L" u$ n4 {# K, E/ Z7 _/ _
__IO uint32_t BTR;6 P U. u' C1 B. h6 O8 B8 g
uint32_t RESERVED0[88];/ R' L; d. }6 |# C7 }8 w
CAN_TxMailBox_TypeDef sTxMailBox[3];) k9 D, `/ H* i2 \( R
CAN_FIFOMailBox_TypeDef sFIFOMailBox[2];
3 N9 T" C8 O k6 M4 Q uint32_t RESERVED1[12];) N& I4 r1 H' g" k- {" A) C' s) V
__IO uint32_t FMR;# Q. W! l* M' {: G3 T+ N$ n, T! c
__IO uint32_t FM1R;3 p* ~4 ~& s3 R- [
uint32_t RESERVED2;0 W# P$ D) r0 m5 v2 ^' q
__IO uint32_t FS1R;
0 j: a: k7 ^# @ uint32_t RESERVED3;
! g# H$ n4 _" u# q5 I __IO uint32_t FFA1R;$ N0 `! } @( |4 h$ I
uint32_t RESERVED4;
, a/ X+ |/ t. e9 y- k5 c) ? __IO uint32_t FA1R;% I$ R1 G. B/ R6 r$ u" U& I; p( b
uint32_t RESERVED5[8];
4 {: ~0 _; k1 k6 v#ifndef STM32F10X_CL( Z9 T" q. @/ s8 D
CAN_FilterRegister_TypeDef sFilterRegister[14];
; V8 D5 z1 ?9 V#else: R! s1 m# M; v( Z
CAN_FilterRegister_TypeDef sFilterRegister[28];
4 k# S# h& y! `# X, X4 A4 L j/ W#endif /* STM32F10X_CL */
; n& i/ ] u' i/ H! {9 ?. ]- }$ S} CAN_TypeDef;1 O& z8 g3 W) H
( P* S+ `, p& a9 S& a9 x4 U/** 4 `( s2 y/ Z( {# J$ g4 d+ g+ R
* @brief Consumer Electronics Control (CEC)+ f1 | s( w- C
*/
( k$ Z( p# V+ B5 O5 wtypedef struct
: v6 C. W! k l4 O{
! U; ^- D Q4 h4 e! X" L5 x1 A __IO uint32_t CFGR;, I0 ^7 y; n1 N2 b. S6 m& h6 a
__IO uint32_t OAR;
7 z( v, h( o% _ __IO uint32_t PRES;
* }7 V' h) c, D, c' p __IO uint32_t ESR;
, m7 B/ i2 P% U/ n __IO uint32_t CSR;
' I* ^% }( y, f __IO uint32_t TXD;8 q' x8 G1 `4 W, g& D- K
__IO uint32_t RXD;
/ [1 e) B0 M' ?% n* }4 J; Y8 ~8 J6 q} CEC_TypeDef; CEC用于记录CAN总线发送数据错误的计数器
( ^0 G2 @: J- l( a
# q9 I5 l! W' c8 N, O/**
" Z& {+ u# `' Q4 T/ g: T" ^ * @brief CRC calculation unit 3 S& v! M. x- a: G% C# n* N. B
*/! X" O7 X# u' C: O4 Y. ]. ?
5 j+ Z% S' p$ C* M+ h1 `typedef struct" O1 G* N9 h1 t+ C% @6 d0 c' N
{
' v# H3 _3 c6 G Q- ? __IO uint32_t DR;( E' g1 P. n! r) q, S) S; o
__IO uint8_t IDR;
' [. D+ a, I: A# G uint8_t RESERVED0;! W" p3 e" j' k% C5 `
uint16_t RESERVED1;
" W/ X6 a2 `9 }. }$ j& j' { __IO uint32_t CR;
; v# [& c# T1 @2 T9 J- m: Z9 f} CRC_TypeDe CRC校验
+ U* c3 P! Y6 G# v9 ~* g
! [2 `" S+ s ]- v/**
& o: t. [+ b, A8 r/ t * @brief Digital to Analog Converter 数模转换相应的结构体，DAC相关寄存器啊( x( A+ y5 f5 S% f! I3 P: c
*/
/ g9 z7 d# i/ {' g Q- U6 y1 e
i8 \* T0 j# m' D2 j, ]typedef struct
9 i* p d+ }1 {! ~1 h{
6 M6 L9 j& i! _6 a8 r/ |8 p __IO uint32_t CR;
; N, ~) x `* I' t' g3 l __IO uint32_t SWTRIGR; SWTRIGR 这个DAC软件触发寄存器
/ C( H9 q% D) C6 R __IO uint32_t DHR12R1; DAC 通道 1 的 12 位右对 齐数据保持寄存器：DAC_DHR12R1。这个我只讲一个，这里面全部是关于DAC转换的相关寄存器。请大家自行对照硬件手册查找。
" H, s" g$ k- ^; z% A2 I __IO uint32_t DHR12L1;
2 x" t" L. N5 J0 G7 s; T __IO uint32_t DHR8R1;
; Q, o% p8 x2 o" d& _ __IO uint32_t DHR12R2;1 m! d7 @" V2 p: ~/ n, m* E
__IO uint32_t DHR12L2;7 e2 @$ }+ G* M! _' }# e7 Q7 I
__IO uint32_t DHR8R2;
' G: k5 {0 I* ~) W __IO uint32_t DHR12RD;! G: v% U2 f& R) I: n
__IO uint32_t DHR12LD;% H3 {! N' \3 i* J% ]. H
__IO uint32_t DHR8RD;/ ?$ l7 b2 f5 {. b8 A: {
__IO uint32_t DOR1;
% J) D8 b) h: H% I! X% o) Y$ n __IO uint32_t DOR2;* J4 ?7 A8 U% ~2 f
#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
+ K) r# y6 j+ I __IO uint32_t SR;! e% c' i- ^6 ~; d* W) F4 x
#endif2 ~$ _# |2 p, u
} DAC_TypeDef;5 X( ?* j# d: u# x* f \9 O
- i; D1 ] O5 E! F; A) |# G
a4 }3 {8 u/ r————————————————————————————- ————————————————————————————-
6 C: M1 l# e. p$ F- f/** ! ^9 R) X. p/ B% r5 e4 W
* @brief DMA Controller DMA 传输将数据从一个地址空间复制到另外一个地址空间。当CPU 初始化这个传输动作，传输动作本身是由 DMA 控制器来实行和完成。典型的例子就是移动一个外部内存的区块到芯片内部更快的内存区。像是这样的操作并没有让 处理器工作拖延，反而可以被重新排程去处理其他的工作。DMA 传输对于高效能 嵌入式系统算法和网络是很重要的。
) i1 w- L( L* o% Y9 Z* p& |( vDMA 在实现DMA传输时，是由DMA控制器直接掌管总线，因此，存在着一个总线控制权转移问题。即DMA传输前，CPU要把总线控制权交给DMA控制器，而在结束DMA传输后，DMA控制器应立即把总线控制权再交回给CPU。一个完整的DMA传输过程必须经过DMA请求、DMA响应、DMA传输、DMA结束4个步骤。 */
+ h4 b! p! s" w" l# N
9 c2 \) U9 K8 g$ Xtypedef struct 这里就是直接内存寻址寄存器相关定义，我想DMA大家应该不是太陌生。 * e- X K5 ^+ q! D( m: Y" G! B
{ # B5 P# M9 A- G5 }4 v F9 f- `
__IO uint32_t CCR; - ~3 }. n. j7 l U) P
__IO uint32_t CNDTR; " Q2 J+ w" f; q( a; J2 X2 z- C5 `
__IO uint32_t CPAR;
2 H+ F" s/ N' C. h' b8 R4 ^6 p9 U __IO uint32_t CMAR; + _1 r% i# P; _
} DMA_Channel_TypeDef;
' z* y; t8 e# M1 _; r
8 [/ F9 I" D+ v$ I$ t" ~/ x2 d8 ]typedef struct ! p9 Q5 N" H: M+ n) K V
{ % i! R2 {: H2 n' s" b' Y. s
__IO uint32_t ISR;
& v2 _6 o: G, ]9 L9 h3 v& [ __IO uint32_t IFCR; 8 `# V" o0 X9 V+ w! i
} DMA_TypeDef; % J1 D# v: P# f6 j
2 W" t8 M, a# p% s7 z3 h/** ! m* d" f3 ]: c' x: h# f" I
* @brief Ethernet MAC
& j, `' ]- H4 T* e' o2 w */ MAC(Medium Access Control)模块，实现符合 IEEE 802.3 标准的 MAC 逻辑。 这个结构体是网络模块的相关定义。 ( e: }+ n" \) F. s9 N
% f) x# ?/ r( t
typedef struct , M; O! R) n( O3 U0 x3 Q
{
; t: ~! X3 X& M2 \% P9 I! T- R __IO uint32_t MACCR; ( T, c! d. Z' } h9 j8 w4 g
__IO uint32_t MACFFR; ! S' }2 ]% ]# \( v) H; I# A
__IO uint32_t MACHTHR; " M' K1 {0 _' c0 \% V2 \" j
__IO uint32_t MACHTLR; 5 G- x" `- H" ]; d$ B
__IO uint32_t MACMIIAR; # F! v/ ~0 i/ P, `" q5 M
__IO uint32_t MACMIIDR;
5 t7 E% r( v0 I8 v __IO uint32_t MACFCR; ' Q- V, G3 E' K
__IO uint32_t MACVLANTR; /* 8 */ 7 j; L8 b" @' [+ j c0 w
uint32_t RESERVED0[2]; ( [4 K5 S' f8 A% `3 n
__IO uint32_t MACRWUFFR; /* 11 */
) q& D+ Y9 Q$ Z __IO uint32_t MACPMTCSR; ( m: U% H$ t' e7 T8 M% }/ v
uint32_t RESERVED1[2]; " F M- \9 R. S7 z( V4 M/ Z |
__IO uint32_t MACSR; /* 15 */ 3 K I; j: ~% g& e8 N
__IO uint32_t MACIMR;
% _& Z& x u6 Z6 E0 P2 g __IO uint32_t MACA0HR;
! y# v0 q* n3 o9 R __IO uint32_t MACA0LR; " x4 k: F$ t9 }+ h! }! V
__IO uint32_t MACA1HR;
) l, h5 P4 G! j, h% Y" {' I __IO uint32_t MACA1LR;
# Q0 K: n; w4 ^6 _, `, M __IO uint32_t MACA2HR; ' `) K! q1 k7 Z
__IO uint32_t MACA2LR;
2 x8 m( j1 N# L( r. R, r+ L% B( S __IO uint32_t MACA3HR; ; J) p3 H+ Q- V
__IO uint32_t MACA3LR; /* 24 */
/ Z- U% h4 D* f0 B. r0 t uint32_t RESERVED2[40]; + i" H& @* `! ]7 X$ t
__IO uint32_t MMCCR; /* 65 */
/ t0 M8 _: @8 D! ?1 t5 h __IO uint32_t MMCRIR;
3 }; L8 H2 @' T& a7 Y3 |( @+ k- X __IO uint32_t MMCTIR; 6 n/ E: O3 d/ a2 m5 E( x [ B, K
__IO uint32_t MMCRIMR; / Y8 K1 ?3 d9 k7 i" X" w
__IO uint32_t MMCTIMR; /* 69 */
2 ]1 Z2 @- u! ?3 M" L' V uint32_t RESERVED3[14]; 2 e, K1 U* _8 ?2 r4 c, C$ a9 g H
__IO uint32_t MMCTGFSCCR; /* 84 */ 2 ^1 E1 z5 D! l# O
__IO uint32_t MMCTGFMSCCR; 5 C4 ]! R, F4 d9 L W
uint32_t RESERVED4[5];
) l- `$ F! w" T. `- i __IO uint32_t MMCTGFCR;
. {& x3 v" g# G/ U* s uint32_t RESERVED5[10]; & X) E, ?6 }4 I+ J+ o8 T
__IO uint32_t MMCRFCECR;
' p4 b3 ~5 D3 e3 y9 b3 D __IO uint32_t MMCRFAECR; ( {& u1 U$ Y+ h {: ?0 U1 U q
uint32_t RESERVED6[10];
& G0 Y& p7 U: g* R __IO uint32_t MMCRGUFCR; 8 b/ `( `) P% b' z& |$ {
uint32_t RESERVED7[334];
! w( |5 x) L3 q/ w* y5 ?6 g __IO uint32_t PTPTSCR; 1 |5 a0 T6 x) ~$ F
__IO uint32_t PTPSSIR;
; O7 m5 @, ^ \7 R* p2 r __IO uint32_t PTPTSHR; 5 _' p+ N6 P1 g3 J3 V& b7 A
__IO uint32_t PTPTSLR; ) }" j! h: {: ?7 A8 h
__IO uint32_t PTPTSHUR;
0 M u1 w" g& R1 { __IO uint32_t PTPTSLUR; ) Y/ f# ~+ u5 m4 p: G
__IO uint32_t PTPTSAR; " J; _9 Q0 u6 g/ r% c2 Y" C6 O
__IO uint32_t PTPTTHR; / E0 A4 h: E$ q7 s$ \
__IO uint32_t PTPTTLR;
$ u" `1 B/ j. o( P% |6 i uint32_t RESERVED8[567];
% q1 I5 u y% X) G# Z2 g __IO uint32_t DMABMR;
9 X' G5 p X5 E __IO uint32_t DMATPDR;
r5 q) a& H$ U1 k% m __IO uint32_t DMARPDR;
5 [6 J# M( F/ S0 `6 \! L __IO uint32_t DMARDLAR; 7 [# p( j! q+ d; ?
__IO uint32_t DMATDLAR;
. b+ p+ {) m# t$ i __IO uint32_t DMASR;
& m4 s$ H* y, Q: c' G __IO uint32_t DMAOMR; & C o1 Q/ _9 P0 x% Y
__IO uint32_t DMAIER;
9 o: z P. x1 E __IO uint32_t DMAMFBOCR; 8 `) n$ Y& |- Y3 H5 u; d
uint32_t RESERVED9[9];
: p& u2 [: t: ` __IO uint32_t DMACHTDR;
) u0 ]; p9 y2 C" J* ^3 F M o5 s __IO uint32_t DMACHRDR;
2 H; V- `, X, f __IO uint32_t DMACHTBAR;
7 L; _: p# v9 L" U; V __IO uint32_t DMACHRBAR; 7 r5 k/ g: R1 D$ s( u5 s# p4 i
} ETH_TypeDef;
3 j. P* j7 w6 v2 U$ F- O( M/ \' }! E: n6 B2 i
/** ! O! j6 O/ f3 s5 M$ e- W% d( [5 j
* @brief External Interrupt/Event Controller
8 d' L3 A; f! {9 W5 I& n3 S */ EXTI寄存器结构 : W; G t1 E) a. m8 H1 Q
EXTI 寄存器结构，EXTI_TypeDef，在文件stm2f10x_map.h中定义如下： typedef struct { vu32 IMR; vu32 EMR; vu32 RTSR; vu32 FTSR; vu32 SWIER; vu32 PR; }EXTI_TypeDef; Table 128. 例举了EXTI 所有寄存器 Table 128. EXTI寄存器 寄存器 描述 IMR 中断屏蔽寄存器 EMR 事件屏蔽寄存器 RTSR 上升沿触发选择寄存器 FTSR 下降沿触发选择寄存器 SWIR 软件中断事件寄存器 PR 挂起寄存器
. X, Y6 o9 ]* s0 A0 N& a! Ztypedef struct
" ]( b8 ?- S) I g5 Z' W) b{ + y" J* m0 G: i% s, E+ j# Z" ^
__IO uint32_t IMR;
2 p. c2 |+ i' v3 k __IO uint32_t EMR;
! Y! |7 N% \; X- e0 i __IO uint32_t RTSR;9 a' ]& |1 Q( m0 C- ]
__IO uint32_t FTSR;
, A+ ]" i$ Z, Y; Y __IO uint32_t SWIER;
$ D% k a! `- @+ v. r __IO uint32_t PR;
H1 P5 }9 g/ t- G h a) C0 X} EXTI_TypeDef;. R4 p4 a. \; m- }. T% P% n' G9 U
; X- S( Q2 @# u: T6 V2 u" m/** & Z" ^8 I* P2 I `/ C; M: \
* @brief FLASH Registers7 e1 S8 F# [ Y9 A% i
*/ FLASH寄存器 寄存器 描述 ACR FLASH访问控制寄存器 KEYR FPEC密钥寄存器 OPTKEYR 选择字节密钥寄存器 SR FLASH状态寄存器 CR FLASH控制寄存器 AR FLASH地址寄存器 OBR 选择字节和状态寄存器 WRPR 选择字节写保护寄存器 typedef struct
! \, r3 @6 e7 {$ r) [+ h{) R4 H7 Y: S+ x. o! }
__IO uint32_t ACR;3 D& S) B4 z+ ^6 E9 B
__IO uint32_t KEYR;
. [. T. E7 z, q# _. {8 O7 S" ]( p __IO uint32_t OPTKEYR;; ?$ c: C/ K9 t. e( i/ D
__IO uint32_t SR;2 F- t' L( _: o& F: R/ @% i
__IO uint32_t CR;
) I2 `0 C7 f* N) ?# t# @ __IO uint32_t AR;
6 W0 {8 B& f, \( ]6 ~$ i \: F# o: g __IO uint32_t RESERVED;
7 x' _ n) l: ^/ i3 ?8 L! h __IO uint32_t OBR;1 s, X$ _) z* t" C, h
__IO uint32_t WRPR;* k$ I+ Y% |( C4 }, ^ u
#ifdef STM32F10X_XL2 `5 Q8 L, i5 f. e8 n) u" u: Z
uint32_t RESERVED1[8]; ' g4 D% a6 N \" O
__IO uint32_t KEYR2;6 q1 x& p& i: T
uint32_t RESERVED2; 9 |& S6 w5 J# u8 K
__IO uint32_t SR2;
& u' d6 t. G* T; V2 T. L __IO uint32_t CR2;
" X+ q2 N( s9 y" ?3 | F __IO uint32_t AR2; 7 l0 ~- u$ ]" h- A" n2 `8 G5 j. O
#endif /* STM32F10X_XL */
$ {. M- `, Y0 V} FLASH_TypeDef;
X% x1 n( `% K6 |1 A+ h1 A$ v1 C& e5 ~- Q3 k3 q/ X
————————————————————————————
9 V- B2 I# t3 c+ _; H———————————————————————————— //本程序只供学习使用，如果用于工程应用，请仔细检查
- N! N: k/ `/ \7 c//主要对于ST公司的库存文件stm32f10x.h进行解析+ B* S. a2 Z Z1 h9 l
//修改日期:2014/61 I+ R$ ^ x" @, \/ {
//Copyright(C) 2014-2025
! s1 s. d7 D6 Q% H( m& X//All rights reserved
* |7 P+ o/ h, ~3 p$ D//******************************************************************************** */
4 Q6 d. G4 H8 G+ k5 B; f/ p9 v f5 q# L/ @" F
/**
: d! `3 ]. H& O* m+ W R- y/ R/ p * @brief Option Bytes Registers* Z" Y1 J; \7 Y/ f- J4 s
*/选项字节寄存器$ @" T" v- H, m. D% j; m1 U' {
& N% O& t! n* D) h5 w5 p4 d' y3 Z: ltypedef struct
8 w% G V) X+ k, P6 a* M7 _, T{
& P+ w+ e& D4 a$ J( f __IO uint16_t RDP;RDP 为 读出选项字节 ,USER 为 用户选项字节 , Data0 为 数据 0 选项字节,Data1 为 数据 1 选项字节,WRP0 为 写保护 0的先项字节。依此类推: o Y- [' L% Y. J7 [' z" o, I
__IO uint16_t USER;1 i$ P7 g; s n% H, o& k
__IO uint16_t Data0;
. A# y: ^# R7 ?3 o __IO uint16_t Data1;
% K( @+ Q% w+ q4 o. P __IO uint16_t WRP0;6 _/ f7 e3 g: L3 h# U
__IO uint16_t WRP1;* h; N. M: b( e, E# I4 L
__IO uint16_t WRP2;
/ Y# C4 `( J/ S5 b7 E __IO uint16_t WRP3;! @3 n0 a6 H0 `2 P
} OB_TypeDef;
0 D { U+ P' e! U3 B. v; t* T& r
1 T8 M7 T, z3 K/** 4 Y3 p2 u$ t k/ v
* @brief Flexible Static Memory Controller1 `, w6 L3 k) d7 d: E
*/灵活的静态存储器控制器' `) p% _7 m) ?
FSMC(Flexible Static Memory Controller，可变静态存储控制器)是STM32系列采用一种新型的存储器扩展技术。在外部存储器扩展方面具有独特的优势，可根据系统的应用需要，方便地进行不同类型大容量静态存储器的扩展。
( F8 U2 B2 M* K
( d" ~3 V6 P7 B" y6 c' @$ m! AFSMC技术优势①支持多种静态存储器类型。STM32通过FSMC可以与SRAM、ROM、PSRAM、NOR Flash和NANDFlash存储器的引脚直接相连。; v4 T( t1 C" ~( m7 A% k
②支持丰富的存储操作方法。FSMC不仅支持多种数据宽度的异步读/写操作，而且支持对NOR/PSRAM/NAND存储器的同步突发访问方式。
7 j* K; s+ n* {; x, @) E③支持同时扩展多种存储器。FSMC的映射地址空间中，不同的BANK是独立的，可用于扩展不同类型的存储器。当系统中扩展和使用多个外部存储器时，FSMC会通过总线悬空延迟时间参数的设置，防止各存储器对总线的访问冲突。
9 C' D6 Y; f8 P④支持更为广泛的存储器型号。通过对FSMC的时间参数设置，扩大了系统中可用存储器的速度范围，为用户提供了灵活的存储芯片选择空间。
8 _7 o' \; o" X9 b9 s, l# g) t5 t⑤支持代码从FSMC扩展的外部存储器中直接运行，而不需要首先调入内部SRAM。
7 w, L/ d& q. x
( `( c! s' u+ m5 A
R* m7 C, D! t0 Q' Q" e1 _, w1 ~, Z
typedef struct, L! v) g" @( G$ f
{" d4 @7 L2 g+ l. ^0 n- K% `
__IO uint32_t BTCR[8];
3 B- s; C. p# U9 @} FSMC_Bank1_TypeDef; Y4 J5 G1 `4 R" ^
( s4 D/ l; p3 z3 L& p0 Q
/** 0 a. i: G: B, E) R
* @brief Flexible Static Memory Controller Bank1E8 P! k( `; N4 m1 `! X" W* k
*/
: n. R9 R% _ ?0 RFSMC映射地址空间FSMC管理1 GB的映射地址空间。该空间划分为4个大小为256 MB的BANK，每个BANK又划分为4个64 MB的子BANK，如表1所列。FSMC的2个控制器管理的映射地址空间不同。NOR Flash控制器管理第1个BANK，NAND/PC Card控制器管理第2～4个BANK。由于两个控制器管理的存储器类型不同，扩展时应根据选用的存储设备类型确定其映射位置。其中，BANK1的4个子BANK拥有独立的片选线和控制寄存器，可分别扩展一个独立的存储设备，而BANK2～BANK4只有一组控制寄存器。+ W! A* t) t* p! ?, }5 ?
typedef struct7 A5 }; v- L$ k* w$ c# x
{/ Z' y6 ~: Z- s& j& o4 ]
__IO uint32_t BWTR[7];. p5 K( m0 S$ M" G6 l
} FSMC_Bank1E_TypeDef;那么这里就是FSMC的BANK1的结构体定义
( D4 x) M5 M* Y8 F2 c' Y. v% G2 \: T! B. |2 n- B* G
/** 1 `5 p" N$ n- X
* @brief Flexible Static Memory Controller Bank2
5 ~8 L* T: g$ [% p7 X* B9 Z, \ */
. A1 C, w" A% w2 N8 A7 M
" O% O3 B4 `* `4 R. S) h) C5 Atypedef struct! J/ \+ g! V# v* i0 ?9 Z- k
{8 L, z" f; |- L0 i
__IO uint32_t PCR2;4 S; L. z$ s% a/ K) R
__IO uint32_t SR2;* e( w- g U4 M7 i; g; n0 R
__IO uint32_t PMEM2;, c" K( _" _. o3 d+ P. [
__IO uint32_t PATT2;; ?$ ~& ^ f3 M0 L1 M
uint32_t RESERVED0; ! T& }, b' Q! l: F+ ?& c7 a
__IO uint32_t ECCR2;
: a: ]) s+ n$ F6 y2 u} FSMC_Bank2_TypeDef; 6 W: b! M8 C) h
0 @$ p+ Y8 e) y7 X, L* m$ _/ b
/**
& F: k" r; ?& W7 F" E * @brief Flexible Static Memory Controller Bank35 m0 C# k" I# e( @% k, N; J
*/
7 r7 p* [* V$ b, `. n' ~& T; k1 e2 ]) o7 L% ?4 v5 e
typedef struct
+ E' }3 ~$ Z: d1 B Q{
) @: U/ [3 |# g/ ~ __IO uint32_t PCR3;
8 }8 ^% c) E" B3 y1 F6 w __IO uint32_t SR3;4 F9 b/ y- `( z) R' Z, W
__IO uint32_t PMEM3;5 J% u1 R, u3 {0 y
__IO uint32_t PATT3;
3 E% Z* U# W& N* l uint32_t RESERVED0;
* M) L2 O4 i! \' R' Q __IO uint32_t ECCR3;
% B: Z7 @; L0 H8 l4 Q4 w7 O9 c} FSMC_Bank3_TypeDef;
! t" t7 ~2 D ^7 Y# t% Y
% W5 @8 H# i9 \2 i4 b/** ! W, X* i" |3 V! A6 p
* @brief Flexible Static Memory Controller Bank4
6 t; q1 f# f) i */4 M3 Y7 q4 S% |4 s
! V' [& ?2 E! _: i9 W {9 b
' l/ D7 B) Q" B5 K- _& |: f7 a ————————————————————————————————————————————————————— —————————————————————————————————————————————————————- 2 H y% T+ n9 [: \; z4 Z4 E+ i, V
typedef struct
+ I0 A+ q% }( \2 w( v{
4 X6 S, |% c- P' x __IO uint32_t PCR4; " f* |0 k% Q( M8 {0 Z2 ?+ R
__IO uint32_t SR4;
- @. w7 `: Q( n o: _ f __IO uint32_t PMEM4; # l d5 q" o. W( O {2 K
__IO uint32_t PATT4; 7 a, n" Z6 W y/ @1 ]4 G
__IO uint32_t PIO4;
( v# r) }7 g* [} FSMC_Bank4_TypeDef; 5 g& j( J- d; g- t! Q, t4 e4 F
I$ A" Q( ~& [0 i
/** : J s7 H* E3 m; {/ v# e* o9 K0 |
* @brief General Purpose I/O 0 [6 ~+ q% d/ I1 l
*/
. g6 q# h1 ?; A7 C% S% E, F
( K9 \6 ]7 R1 _5 Y2 G0 k) \( stypedef struct
) i7 m. y! m' v{
/ K6 H- [$ V, k+ v6 a( x4 Q" A __IO uint32_t CRL;
( X! e( u! \& K2 i8 {7 I __IO uint32_t CRH; & J7 z$ \, `- }# A$ \. {
__IO uint32_t IDR;
# V2 X6 a( v$ |; [3 M __IO uint32_t ODR;
, D- G8 I; R+ z1 ?$ N) H9 k __IO uint32_t BSRR;
5 v' h& I J1 Z. ]5 m/ i __IO uint32_t BRR; . N- y; V i( B. x# e0 L
__IO uint32_t LCKR;
. l% c1 J1 v% }" ]} GPIO_TypeDef; CRL、 CRH、IDR、ODR等都是一个端口中的 寄存器，对寄存器的读写操作实现你需要的功能。STM32 的每个 IO 端口都有 7 个寄存器来控制。他们分别是：配置模式的 2 个 32 位的端口 配置寄存器 CRL 和 CRH；2 个 32 位的数据寄存器 IDR 和 ODR；1 个 32 位的置位/复位寄存器 BSRR；一个 16 位的复位寄存器 BRR； 1 个 32 位的锁存寄存器 LCKR
8 m8 U7 U6 \/ s% k/ T TGPIO_Pin 该参数选择待设置的GPIO管脚，使用操作符“|”可以一次选中多个管脚。可以使用下表中的任意组合。 GPIO_Pin_None：无管脚被选中 GPIO_Pin_x：选中管脚x（0–15） GPIO_Pin_All：选中全部管脚
6 a! ^ i4 ]$ V, y) {! z1 JGPIO_Speed GPIO_Speed：用以设置选中管脚的速率。 GPIO_Speed_10MHz：最高输出速率10MHz GPIO_Speed_2MHz：最高输出速率2MHz GPIO_Speed_50MHz：最高输出速率50MHz + H/ d6 e# N, D
GPIO_Mode GPIO_Mode：用以设置选中管脚的工作状态。 GPIO_Mode_AIN：模拟输入 GPIO_Mode_IN_FLOATING：浮空输入 GPIO_Mode_IPD：下拉输入 GPIO_Mode_IPU：上拉输入 GPIO_Mode_Out_OD：开漏输出 GPIO_Mode_Out_PP：推挽输出 GPIO_Mode_AF_OD：复用开漏输出 GPIO_Mode_AF_PP：复用推挽输出
5 p% w; p" d' \, V) i& \函数GPIO_StructInit 功能描述：把GPIO_InitStruct中的每一个参数按缺省值填入 例： GPIO_InitTypeDef GPIO_InitStructure; GPIO_StructInit(&GPIO_InitStructure); GPIO_InitStruct： GPIO_Pin：GPIO_Pin_All GPIO_Speed：GPIO_Speed_2MHz GPIO_Mode：GPIO_Mode_IN_FLOATING ( I- Y" n4 N+ R1 l! I' o1 Q$ K% U+ q
函数GPIO_ReadInputDataBit 功能描述：读取指定端口管脚的输入 例： u8 ReadValue; ReadValue = GPIO_ReadInputDataBit(GPIOB, GPIO_Pin_7);
/ Q* ? v; p/ }6 X% g$ `函数GPIO_ReadInputData 功能描述：读取指定的GPIO端口输入 例： u16 ReadValue; ReadValue = GPIO_ReadInputData(GPIOC); ( {3 L ]; H# A0 d0 A
3 D, k4 B) a, l" C6 ~7 ?! Q R' ~
函数GPIO_ReadOutputDataBit 功能描述：读取指定端口管脚的输出 例： u8 ReadValue; ReadValue = GPIO_ReadOutputDataBit(GPIOB, GPIO_Pin_7); 4 W: ^7 i% ?$ ]1 |) a
2 G/ W0 X- s# o$ b# K. Q A
函数GPIO_ReadOutputData 功能描述：读取指定的GPIO端口输出 例： u16 ReadValue; ReadValue = GPIO_ReadOutputData(GPIOC); " H2 Z {+ t3 n }. J' E, V
函数GPIO_SetBits 功能描述：置位指定的数据端口位 例： GPIO_SetBits(GPIOA, GPIO_Pin_10 | GPIO_Pin_15);
* x2 w* K9 h# ^4 R
K5 f- ^2 z e' J) A函数GPIO_ResetBits 功能描述：清除指定的数据端口位 例： GPIO_ResetBits(GPIOA, GPIO_Pin_10 | GPIO_Pin_15); & U; z1 B: Q( J
4 n7 {6 d5 w9 Y函数GPIO_WriteBit 功能描述：设置或者清除指定的数据端口位 例： GPIO_WriteBit(GPIOA, GPIO_Pin_15, Bit_SET); ( G1 `) o0 G7 _+ x+ g
8 k! h3 z* t& ]: d4 Q1 h/ ~
6 o" }2 \: \/ m! h函数GPIO_Write 功能描述：向指定GPIO数据端口写入数据 例： GPIO_Write(GPIOA, 0x1101);
1 d4 [$ I. B: J: }3 A
7 Y, t% r$ @2 \函数GPIO_PinLockConfig 功能描述：锁定GPIO管脚设置寄存器 例： GPIO_PinLockConfig(GPIOA, GPIO_Pin_0 | GPIO_Pin_1); 9 ]4 G! w1 |# |3 G7 ^) J
# r( ^; H( F0 y7 \$ S函数GPIO_EventOutputConfig 功能描述：选择GPIO管脚用作事件输出 例： GPIO_EventOutputConfig(GPIO_PortSourceGPIOE, GPIO_PinSource5); 1 l U- p4 t4 Q& M9 C: Q
GPIO_PortSource GPIO_PortSource用以选择用作事件输出的GPIO端口。 / |# `* `* U* N" ]* V
GPIO_PinSource GPIO_PinSource用以选择用作事件输出的GPIO管脚。 . y; t8 w0 q5 |* W. y& x
" Z4 ^7 M" s4 L6 t6 N: I( Y& ^9 g2 \
函数GPIO_EventOutputCmd 功能描述：使能或者失能事件输出
* `, U. X- F! i7 O. S$ t4 i, c例： GPIO_EventOutputConfig(GPIO_PortSourceGPIOC, GPIO_PinSource6); GPIO_EventOutputCmd(ENABLE); 9 C ^" a5 B& b, P, h/ k
* Y2 Y+ g4 @( d% n7 V) B. d函数GPIO_PinRemapConfig 功能描述：改变指定管脚的映射 例： GPIO_PinRemapConfig(GPIO_Remap_I2C1, ENABLE); " F) `3 ^ i/ q" Y& x5 O: A R
+ d# S$ Z) ?! v5 k. t* m% E' E7 ]! DGPIO_Remap GPIO_Remap用以选择用作事件输出的GPIO端口。 GPIO_Remap_SPI1：SPI1复用功能映射 GPIO_Remap_I2C1：I2C1复用功能映射 GPIO_Remap_USART1：USART1复用功能映射 GPIO_PartialRemap_USART3：USART2复用功能映射 GPIO_FullRemap_USART3：USART3复用功能完全映射 GPIO_PartialRemap_TIM1：USART3复用功能部分映射 GPIO_FullRemap_TIM1：TIM1复用功能完全映射 GPIO_PartialRemap1_TIM2：TIM2复用功能部分映射1 GPIO_PartialRemap2_TIM2：TIM2复用功能部分映射2 GPIO_FullRemap_TIM2：TIM2复用功能完全映射 GPIO_PartialRemap_TIM3：TIM3复用功能部分映射 GPIO_FullRemap_TIM3：TIM3复用功能完全映射 GPIO_Remap_TIM4：TIM4复用功能映射 GPIO_Remap1_CAN：CAN复用功能映射1 GPIO_Remap2_CAN：CAN复用功能映射2 GPIO_Remap_PD01：PD01复用功能映射 GPIO_Remap_SWJ_NoJTRST：除JTRST外SWJ完全使能（JTAG+SW-DP） GPIO_Remap_SWJ_JTAGDisable：JTAG-DP失能 + SW-DP使能 GPIO_Remap_SWJ_Disable：SWJ完全失能（JTAG+SW-DP） - F8 c- }0 n3 v) M7 _
5 f# T" v* |* p F' l7 o函数GPIO_EXTILineConfig 功能描述：选择GPIO管脚用作外部中断线路 例： GPIO_EXTILineConfig(GPIO_PortSource_GPIOB, GPIO_PinSource8); /**
. y2 S: Z5 D% g4 P * @brief Alternate Function I/O
& L' A* E1 e1 _; r/ j7 i* C */ # k# y# m1 D! g6 V M8 l, v
0 T, H% E5 w8 }# u+ o! etypedef struct & z! [9 i7 t7 Z% n
{
6 {! o+ v6 `: u0 B7 R4 G4 T __IO uint32_t EVCR; " x. w* c! `5 x+ ]& m9 o; f- ?
__IO uint32_t MAPR;
2 l" j. U1 N# z$ p( x. Z7 Y __IO uint32_t EXTICR[4]; $ { V' H/ M+ S ~
uint32_t RESERVED0;
9 q# g: i3 n7 \- U __IO uint32_t MAPR2; - ?. f' ~! }% X
} AFIO_TypeDef; 复用功能寄存器结构，也就是说这里可以把IO做复用。
3 O- B0 [( T3 n* \+ ]2 o/**
; o* f8 ?! F% v/ h * @brief Inter Integrated Circuit Interface ( }5 {& w% {' f3 p/ {8 _! `
*/ # k" l9 P8 C0 S7 s! z' m4 s# i
z: o* C2 R9 h! L
typedef struct I2C 结构体类型，这里面的全部是数据寄存器。
( }- v/ e/ A- F0 j' P& e9 {{
, X- S9 g# b3 ^7 x __IO uint16_t CR1;
$ E. H2 k1 F7 H- W5 n2 f uint16_t RESERVED0;
5 S/ \3 c% E9 i1 v0 ? __IO uint16_t CR2; $ f$ i$ o: |+ D% }4 q
uint16_t RESERVED 1; ( [3 F3 ]; s/ D( c- }4 s
__IO uint16_t OAR1;
9 m0 b1 f+ s$ ^5 j* o uint16_t RESERVED2;
- x+ a2 i3 ^0 _ I& k2 q! ]- N0 c7 ? __IO uint16_t OAR2; $ k, V& C7 @/ T8 R) z9 S
uint16_t RESERVED3; + ?: J% u" W# m' h( J
__IO uint16_t DR; : }1 c- f$ N! D" a: f0 G- V
uint16_t RESERVED4; # Z- u& M* F- b5 {! x
__IO uint16_t SR1;
2 H7 h' q' @4 Z" \0 R; M3 Z+ [" i4 C uint16_t RESERVED5;
* _# }+ E4 b3 g' z# r __IO uint16_t SR2;
. I- E: \! V. \) c uint16_t RESERVED6;
4 D1 a. s0 N( t0 ?- G- n, {9 z7 L+ g __IO uint16_t CCR; ; O& O8 X P. V* w: O) z$ c
uint16_t RESERVED7; $ L, c2 n$ Z2 F ?! \ [! [5 _3 v
__IO uint16_t TRISE;
: ]: H, h$ f/ `- i! k8 d$ @ uint16_t RESERVED8;
; D4 d2 `+ }( x) l7 p$ x. i7 y5 D0 G} I2C_TypeDef;
# [7 M' E/ H0 `. E% L6 ^& k6 D+ B) _, P2 r7 ^$ g: r( @/ }
/**
7 X1 ], f* s" P * @brief Independent WATCHDOG
_( M: |3 a# ^7 [ */
1 O2 B( Z( P6 u0 v% i在键值寄存器(IWDG_KR)中写入 0xCCCC，开始启用独立看门狗；此时计数器开始从其复 位值 0xFFF 递减计数。当计数器计数到末尾 0x000 时，会产生一个复位信号(IWDG_RESET)。 无论何时，只要键寄存器 IWDG_KR 中被写入 0xAAAA， IWDG_RLR 中的值就会被重新加载 到计数器中从而避免产生看门狗复位 。 IWDG_PR 和 IWDG_RLR 寄存器具有写保护功能。要修改这两个寄存器的值，必须先向 IWDG_KR 寄存器中写入 0x5555。将其他值写入这个寄存器将会打乱操作顺序，寄存器将重新 被保护。重装载操作(即写入 0xAAAA)也会启动写保护功能。 还有两个寄存器，一个预分频寄存器（IWDG_PR），该寄存器用来设置看门狗时钟的分频 系数。另一个重装载寄存器。该寄存器用来保存重装载到计数器中的值。该寄存器也是一个 32 位寄存器，但是只有低 12 位是有效的。 只要对以上三个寄存器进行相应的设置，我们就可以启动 STM32 的独立看门狗。 那么这个就是看门狗定义的 结构体类型。 typedef struct 6 v! `3 o* w ~
{
/ B7 K0 \& \$ R* J$ _8 l* ` __IO uint32_t KR;
4 Y, {1 k1 z6 W __IO uint32_t PR;( q- U8 l1 w3 Y
__IO uint32_t RLR;
% H' O7 d7 t8 A' s& {' t# ] __IO uint32_t SR;2 ?1 T! I5 a4 S' V
} IWDG_TypeDef;. ~; j1 o! O+ ~1 l8 Q' Z: P6 n" e
/ x; P& v- [% C. t/**
! c, w5 X7 Y9 D6 g! E' Q* d: Q * @brief Power Control* C9 r* P1 K: z2 Q. e( F7 _ D
*/( W& C0 T: G9 j( f# o
, K: z; {! h/ Z, a5 l
typedef struct! P j4 w5 Y; g) m1 A
{
2 k- r4 p% x2 p+ s: i' |+ ] __IO uint32_t CR;
7 J3 Z3 Z+ F9 g, b: t4 m) ~ __IO uint32_t CSR;: R. x8 G7 r6 `
} PWR_TypeDef; CR; //电源控制寄存器 vu32 CSR; //电源控制状态寄存器8 t7 d0 Q) j6 Y+ M' T$ r) R
0 M9 r# k, k% q( x: l+ q
/** $ d8 l8 I, D4 Z* h! F
* @brief Reset and Clock Control
& M1 [9 Y/ I% n$ {+ ]1 ] */
, J |. |7 j3 F& o* l
8 F) v, B+ m: M# R8 J* ^4 F ctypedef struct
2 j* C: E V f9 G5 l5 f{
: Z" o7 Y' W ?" c __IO uint32_t CR;
2 n7 M3 [( W+ R0 o# `6 a2 I __IO uint32_t CFGR;7 t1 j x7 \; r% E9 ?6 w
__IO uint32_t CIR;" M8 a; \+ l2 b( m
__IO uint32_t APB2RSTR;% Z* t1 l! y: S7 U- M' g4 g8 N
__IO uint32_t APB1RSTR;* m" E- b. b) W' S9 a1 [( C
__IO uint32_t AHBENR;
( V6 G7 S1 n3 C6 T, z __IO uint32_t APB2ENR;
- n. y( t7 x* M0 G" r- X __IO uint32_t APB1ENR;
* s3 v: o |& ]. {( Y8 j# \ __IO uint32_t BDCR;
! L. `0 {/ [& m6 ~ __IO uint32_t CSR;6 ]' T3 l- ~! q& U
j* L4 @& \- e) E6 o# C9 T
#ifdef STM32F10X_CL 7 e% _8 S& @$ p3 Z/ W5 ^6 h+ A
__IO uint32_t AHBRSTR;8 ~& z( s; t- ~
__IO uint32_t CFGR2;5 _( ~& i4 X6 x9 h
#endif /* STM32F10X_CL */
4 O4 o& V- R8 v. m7 i
( r8 @: L" \8 ?2 d6 [#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) . B( M; _) U' Y! `
uint32_t RESERVED0;# t6 p9 }2 O7 [" X3 P3 h: |
__IO uint32_t CFGR2;: J/ w! M# k6 e; R' {) C' r
#endif /* STM32F10X_LD_VL || STM32F10X_MD_VL || STM32F10X_HD_VL */
; \% d; p! y. D' Y} RCC_TypeDef; . 这个宏定义是把RCC宏定义到stm32RCC寄存器的分配的存储器单元的首地址上，其中RCC_TypeDef是stm32f10x_map.h中定义的结构体，用来表述RCC所有寄存器构成的 ' {: R! }9 W4 r: t
7 [" Q! U4 O; g' T h/ L
———————————————————————————————————————————————————
+ _, A: Q+ x0 u; x0 V/ b7 Q; M* J ——————————————————————————————————————————————————— //本程序只供学习使用，如果用于工程应用，请仔细检查: `6 c- C$ M9 v
//主要对于ST公司的库存文件stm32f10x.h进行解析
7 W" n! w. J" m! U//修改日期:2014/6
/ q( h, {, c( k0 [2 A//Copyright(C) 2014-2025
/ k( O) q) L# | p) d# ~0 }//All rights reserved z2 X3 o$ F; n
//******************************************************************************** */+ C! C2 r$ B% m( S$ t
/** ! }$ J& h# s4 Z F/ X
* @brief Real-Time Clock5 A1 {& N2 N( `0 x, o2 c7 F
*/
) \' C( O% n4 E) P2 qRTC预分频器余数寄存器高位(RTC_DIVH)
& |4 R' g1 ]3 v& H, `RTC预分频器余数寄存器低位(RTC_DIVL)9 e+ J( N. E M5 h' f5 i; z
RTC控制寄存器高位(RTC_CRH)
* G3 m" @" T2 F+ M1 x0 ARTC控制寄存器低位(RTC_CRL)
: H" L/ k! |: r7 F jRTC预分频装载寄存器高位(RTC_PRLH)
8 s+ ~# F# Q# O3 r/ d; i$ F; }RTC预分频装载寄存器低位(RTC_PRLL)
( F! D5 g) u1 `! b3 RRTC计数器寄存器高位(RTC_CNTH)
! F: S/ g C2 f g1 O6 M) kRTC计数器寄存器低位(RTC_CNTL) 1 s1 W! ^/ e' B% X& w6 ]
RTC闹钟寄存器高位(RTC_ALRH) , L5 ~4 @7 E8 H4 \
RTC闹钟寄存器低位(RTC_ALRL)
1 N, k/ [6 Z$ d, W/ T
' E) J' O# q& |typedef struct
( Y$ a# G4 ]0 p0 o) Y. ^2 R: C; m{
3 n, t6 T9 t2 Q$ h* m: r4 X __IO uint16_t CRH;& _. \8 l( i0 y# N& A& L
uint16_t RESERVED0; RTC寄存器是16位可寻址寄存器，这是定义它的数据类型为16位的。0 }4 p0 |- q5 L0 B* e9 M( P
__IO uint16_t CRL;
0 a& H' H7 L5 S3 P5 L" K* q uint16_t RESERVED1;
% w ]9 l$ _9 o0 ?6 i" o9 ^3 S __IO uint16_t PRLH;
# }1 [( k7 l- c) L uint16_t RESERVED2;
; G+ t4 |: ~7 o __IO uint16_t PRLL;
+ k8 B0 t: ~- E# q7 U/ \) J uint16_t RESERVED3;
/ `2 ^4 Y- ?: o- W" w+ ^; U __IO uint16_t DIVH;8 n( W. M) Z B7 ^/ Q5 z3 z
uint16_t RESERVED4;
6 f* f# V) r* ?) J" e; Q __IO uint16_t DIVL;
. f" \& v# m- M3 p uint16_t RESERVED5;; k: T7 B9 i) W) U9 g! L
__IO uint16_t CNTH;3 l" V1 e; U' |
uint16_t RESERVED6;; [$ r5 u3 X, _$ _" A& T+ A( p, ^
__IO uint16_t CNTL;
! n) |+ b6 ^6 K( o' L uint16_t RESERVED7;
) v$ w; f: J7 U/ d& n- D __IO uint16_t ALRH;1 u C3 a6 M/ w! g. G3 |
uint16_t RESERVED8;
( z7 I! Q- d) z __IO uint16_t ALRL;
7 Z6 C" H# G3 N' Y3 t. y6 o uint16_t RESERVED9;7 F! Z8 p& Z' F0 s1 l; H1 [
} # F' Q6 O0 Z9 ~' w9 P
RTC_TypeDef; ~3 q/ @8 ]3 z' g5 l
/**
! Z. c0 n0 k, E * @brief SD host Interface SD卡接口( t% V% s; @+ J% N2 {2 }& _4 R
*/1 G$ K. E% P1 ]9 E: D+ ]! j
SDIO电源控制寄存器(SDIO_POWER) 1 [/ I9 O/ S" p$ @. v
SDIO时钟控制寄存器(SDIO_CLKCR) 5 O2 U& Z7 q8 R! R( n$ M
SDIO参数寄存器(SDIO_ARG)
9 F& e, I- ~$ g7 C. u YSDIO命令寄存器(SDIO_CMD) " j e0 b( R( P$ D( P: |
SDIO命令响应寄存器(SDIO_RESPCMD)6 g1 v% n; f3 r7 x$ C
SDIO响应1..4寄存器(SDIO_RESPx) , t- Z$ G* h8 S8 F7 }: o/ `5 P, ] P7 `
SDIO数据定时器寄存器(SDIO_DTIMER) & Y/ z" X0 g- i, B
SDIO数据长度寄存器(SDIO_DLEN)2 Z# R( Q% O& F4 c6 B1 d
SDIO数据控制寄存器(SDIO_DCTRL)
1 h X( L j# J6 _9 s6 ]SDIO数据计数器寄存器(SDIO_DCOUNT)
6 q. m& ^* F$ z" w L% zSDIO状态寄存器(SDIO_STA) ' E3 g9 v; j; y
SDIO清除中断寄存器(SDIO_ICR)
; d+ W% \9 z# ?$ M8 p1 s: Y0 FSDIO中断屏蔽寄存器(SDIO_MASK)
1 m- o/ _3 A4 f0 }. ^5 M- z/ Y/ ^8 sSDIO FIFO计数器寄存器(SDIO_FIFOCNT)
- m( C: E. \- C) LSDIO数据FIFO寄存器(SDIO_FIFO)
; q: _9 H& Y5 d+ z9 V7 ntypedef struct
1 x4 p7 O! w; ]2 D7 k{$ [6 B2 n' b) G) t+ ?( ^
__IO uint32_t POWER;
# w: x& y/ [2 v# L0 Q __IO uint32_t CLKCR;
8 F% W) ^9 P4 o" K- ]" H+ e __IO uint32_t ARG;
U- U- Z! _! i& [( L7 R, Y __IO uint32_t CMD;
9 Q3 J' F6 \0 s6 b __I uint32_t RESPCMD;
* S5 | \2 @: \7 a" `, }9 [ __I uint32_t RESP1;
& w# B' I; ~# ]1 x0 r% j( g __I uint32_t RESP2;
8 l6 o0 L% y, ?; U6 f% H __I uint32_t RESP3;
+ B# Q7 `* a; t% { __I uint32_t RESP4;
" I- M- b7 n1 G) a( G __IO uint32_t DTIMER;! M& V, ?4 e9 j* F0 W$ D- H
__IO uint32_t DLEN;# R# g* o6 x6 s3 V" r
__IO uint32_t DCTRL;
7 r/ l/ I+ F$ J. A' K+ M! K. x4 Y" t __I uint32_t DCOUNT;+ X k5 J; x8 |
__I uint32_t STA;+ J0 r3 x* ] |7 _/ o
__IO uint32_t ICR;
% h z0 z3 R. I2 H __IO uint32_t MASK;6 z( L8 r7 h1 T" b8 h0 p
uint32_t RESERVED0[2];
' g9 w( @1 p9 }- L) b" A __I uint32_t FIFOCNT;: e8 [/ H7 F+ h; O4 a( v, q
uint32_t RESERVED1[13];, `2 R& c9 q2 _; K
__IO uint32_t FIFO;
5 [+ [0 I. `. |- Q# }3 H} SDIO_TypeDef;
* O6 D' U& [8 p& T% v4 \5 o( u" d3 w k& o! v+ T5 l: k
/** * L0 c5 {* S# B X
* @brief Serial Peripheral Interface————-SPI串行总线
4 w, y& r% e" p6 F, M& @8 b/ Q */) G- a" s5 z: r: d6 T4 z1 A( F5 V
SPI控制寄存器1(SPI_CR1)
; D- {. s/ m ^3 eSPI控制寄存器2(SPI_CR2) / H2 k' G/ M6 K
SPI 状态寄存器(SPI_SR) ! h9 `' C/ Q+ E+ H) d i
SPI 数据寄存器(SPI_DR), k6 G9 D- W t5 D+ l9 ]* ]
SPI CRC多项式寄存器(SPI_CRCPR)
" G1 V+ d8 ^, b$ e: R0 w& lSPI Rx CRC寄存器(SPI_RXCRCR)) }1 c6 a0 @# a. P6 j. L" _- _* L& W
SPI Tx CRC寄存器(SPI_TXCRCR)
; ]- q& S5 O9 {, Y* nSPI_I2S配置寄存器(SPI_I2S_CFGR)
8 @" U3 r. c( d4 H1 `% OSPI_I2S预分频寄存器(SPI_I2SPR)
( C2 a5 ?8 p; R7 a
% O3 h$ ^! }+ _( B- S6 [
. U/ `1 [; d6 L7 j, F3 X+ @typedef struct3 y ]" ~4 r5 c+ W
{: u8 @7 \$ {2 j3 j2 _* e$ {: `$ M- B
__IO uint16_t CR1;) _+ ], C. U; n" M, i! T: |, Z1 U
uint16_t RESERVED0;5 ~8 K8 w' m% u9 e' h( M
__IO uint16_t CR2;
. ?3 R8 r+ h1 O8 } uint16_t RESERVED1;, q9 o4 f' r9 s. j) m& o1 c
__IO uint16_t SR;* n, _( G0 R( ]5 ^1 J; A! }
uint16_t RESERVED2;
5 c# ^/ X3 T; i* j __IO uint16_t DR;
0 p; a! q. L0 c& Q$ R uint16_t RESERVED3;' E l+ V- m( x0 v/ z
__IO uint16_t CRCPR;& S& q; B5 W+ X1 h- A5 @1 J8 C
uint16_t RESERVED4;% ]& F$ E3 c* Q
__IO uint16_t RXCRCR;
8 i- b9 f# }8 ~ uint16_t RESERVED5;
; Z' R" A7 ?, H% t& A7 f4 D# m __IO uint16_t TXCRCR;
, u/ }, T6 D$ w2 f- e uint16_t RESERVED6;- X0 e$ b: m8 G& a3 D
__IO uint16_t I2SCFGR;4 B5 Q C+ x7 @3 W
uint16_t RESERVED7;1 i3 J5 q- H, z$ w/ R" p
__IO uint16_t I2SPR;
3 k7 Y3 p! a6 E* X5 d1 j uint16_t RESERVED8; 9 H2 Y: G6 {& v, g/ K$ v' M! N9 N# P
} SPI_TypeDef;
. l* {1 t' M* t/ f% M2 s7 P. i) A: V9 S+ R$ Q/ {( W
/** ; [( K q( p( ?$ m7 z7 R+ U/ l3 [' J
* @brief TIM$ ]8 E& Z; D, ?3 ~8 x
高级控制定时器(TIM1和TIM8)由一个16位的自动装载计数器组成，它由一个可编程的预分频器驱动。 o$ J" c1 Y4 h4 w1 y8 B6 L6 ]
它适合多种用途，包含测量输入信号的脉冲宽度(输入捕获)，或者产生输出波形(输出比较、. G9 b) F: B/ u! k2 ~
PWM、嵌入死区时间的互补PWM等)。, a V' `0 x: N4 E9 S) {
使用定时器预分频器和RCC时钟控制预分频器，可以实现脉冲宽度和波形周期从几个微秒到几
5 F" s/ I1 {! W% Q2 Y! h8 p个毫秒的调节。
I; U* f/ B! O" s% S, u高级控制定时器(TIM1和TIM8)和通用定时器(TIMx)是完全独立的，它们不共享任何资源。它们- s& x6 ? v! h! t z
可以同步操作.0 ]: ^# ?8 v2 U
5 @7 a% p L0 x3 m7 X$ d1 B& p
控制寄存器1(TIMx_CR1)
) t; ?4 c5 l7 m控制寄存器2(TIMx_CR2)
- u5 p' {7 Z7 Y% t; E从模式控制寄存器(TIMx_SMCR)
+ B& M& ?4 z' G( V sDMA/中断使能寄存器(TIMx_DIER)
' H6 c* d- `% p+ A状态寄存器(TIMx_SR)3 ]% G+ V. w& ` i' n- ~
事件产生寄存器(TIMx_EGR)
_8 N; x$ m- M8 N4 M捕获/比较模式寄存器1(TIMx_CCMR1)
1 M" K' U9 d- O& u捕获/比较模式寄存器2(TIMx_CCMR2) : q$ e2 R# j$ h/ k
捕获/比较使能寄存器(TIMx_CCER) 7 _' s+ |) m! j1 i- _
计数器(TIMx_CNT)% i! h1 g9 q- b
预分频器(TIMx_PSC)( B/ p; t. M& [' S2 t
自动重装载寄存器(TIMx_ARR) 5 V/ D' D$ r8 a9 T
重复计数寄存器(TIMx_RCR)
5 x8 x& P1 f4 s( F3 _捕获/比较寄存器1(TIMx_CCR1)
. w8 s5 T* h. k# H- O0 d4 E捕获/比较寄存器2(TIMx_CCR2)
5 V% t3 v- [+ c( A捕获/比较寄存器3(TIMx_CCR3)
/ J9 f* Z. H$ P+ k. g( K; t7 O捕获/比较寄存器(TIMx_CCR4)
+ o* T6 W' }: d/ w/ Y刹车和死区寄存器(TIMx_BDTR)
7 ]+ S6 A# b" E7 S5 ^8 T2 r4 LDMA控制寄存器(TIMx_DCR) R0 s. {" z9 @& M3 e1 y
连续模式的DMA地址(TIMx_DMAR)
0 k8 l- ?8 }# K8 b- o; B8 C+ e6 b% t9 G9 m
这个结构体就是以上这些寄存器的类型定义。
/ [ D1 ~, B) }0 J% N. J' Q; [' ^5 t f* z! X$ E0 u0 ^. A
*/
l+ m0 `3 G3 y+ b2 q4 f
4 B/ [2 e! q7 r% etypedef struct
. w, m. q% c# I* o{ K$ {( n) n( x3 G4 O4 k1 K
__IO uint16_t CR1;. L% {* @4 D" o
uint16_t RESERVED0;: u; `8 x9 d \' ]+ d
__IO uint16_t CR2;6 d' g" @9 R1 X9 U$ O/ Q" L
uint16_t RESERVED1;
( d" H5 W5 ?3 E! F5 w8 v% V) ] __IO uint16_t SMCR;
$ G7 c* C: {! Z: d( n0 s9 B9 l: v uint16_t RESERVED2;; z& b9 e5 M0 h9 U6 ]+ X
__IO uint16_t DIER;! n G' i @' Z1 ~3 L% Z- [" @
uint16_t RESERVED3;& ]; m# v0 r0 R( q) N% n5 u
__IO uint16_t SR;
2 J7 h+ N6 f! | uint16_t RESERVED4;
$ i/ y) M: C/ f __IO uint16_t EGR;
7 V8 v" Q( O9 T9 v% j8 ` uint16_t RESERVED5;
- ~7 B: _( s1 u! }# t7 r6 R0 | __IO uint16_t CCMR1;" u8 L- j" ]* h' V( T& \* J0 O0 W
uint16_t RESERVED6;
5 R4 W% N) S. a __IO uint16_t CCMR2;
$ d$ B# ^4 O. g. t/ }6 ] s" |$ E uint16_t RESERVED7;; l, v2 O s7 `& q; x6 O
__IO uint16_t CCER;3 W1 L% Q! {4 m6 f0 `. x8 s
uint16_t RESERVED8;
. m7 ^% M! q& A3 A1 A' a+ p6 y! ?% I __IO uint16_t CNT;
0 R1 p, t2 N1 c4 X* V uint16_t RESERVED9;2 _: H4 a: @ c
__IO uint16_t PSC;
" {* x+ ~3 P0 l6 H( R8 F uint16_t RESERVED10;* X/ P+ W* j# \# O& q5 r% c" {2 t
__IO uint16_t ARR;
0 F7 V% D9 E* @+ X7 d( [( P6 y" z, f S" i uint16_t RESERVED11;
* s+ P: e. R5 C __IO uint16_t RCR;
+ L+ F( L$ G# I uint16_t RESERVED12;( K2 s) m$ I4 C% h. i# ]
__IO uint16_t CCR1;
/ L/ X9 k G' s/ K# [: G' U# V7 t uint16_t RESERVED13; f8 f: c* o: q2 r$ @# ^
__IO uint16_t CCR2;. x6 [% n* f4 d% `) ^. g
uint16_t RESERVED14;# E+ j* u- m: y- l! A I5 M
__IO uint16_t CCR3;
, m1 H$ V7 a' d2 O0 W uint16_t RESERVED15;
1 [1 `3 L6 U; o( h% a __IO uint16_t CCR4;& M7 J+ y+ i5 T1 U
uint16_t RESERVED16;+ i4 ^8 O7 A# S
__IO uint16_t BDTR;
& I6 w4 m0 h3 ]# b6 O3 G: I uint16_t RESERVED17;' a0 k* g0 n2 ~& t6 j8 [
__IO uint16_t DCR;
4 V8 a! V8 m/ B uint16_t RESERVED18;. h0 H- r) P$ t' }
__IO uint16_t DMAR;9 X2 Q, Y0 D m7 y, M2 Y
uint16_t RESERVED19;% q n. r8 i F
} TIM_TypeDef;
+ F# Y K8 e3 N% u) a2 h2 V4 `5 ?- X$ y2 O! H! t0 _; e2 ~+ L
/** - b' @: n* Y" T T& Q
* @brief Universal Synchronous Asynchronous Receiver Transmitter; i2 [& { N+ f6 N9 p9 D
*/在UART上追加同步方式的序列信号变换电路的产品，被称为USART(Universal Synchronous Asynchronous Receiver Transmitter)。9 N/ d/ m3 _2 E: z9 O
状态寄存器(USART_SR)
2 m% \6 ?4 B T: X数据寄存器(USART_DR)
; k: x D/ j. e5 U+ `波特比率寄存器(USART_BRR)
2 z$ s4 Y. {! a& y3 `) x) }控制寄存器1(USART_CR1)3 o3 w d) o& j1 ^5 G6 Q
控制寄存器2(USART_CR2)
: T" x: Z. w6 E; `! @6 z) F控制寄存器3(USART_CR3)
; |8 N0 O/ C' `2 U* \# b; E保护时间和预分频寄存器(USART_GTPR) ( ~- y& E5 x, P4 l2 |
1 ^3 W# B7 D0 u) V2 v
typedef struct
" u# h5 n! O3 {4 n{1 c/ ^3 b/ E2 M
__IO uint16_t SR;* x, u& }" o) `$ m3 I& ?
uint16_t RESERVED0;7 h; H. o% G8 ~$ x
__IO uint16_t DR;3 e/ g/ m# b+ l0 v6 C
uint16_t RESERVED1;
, _" P* x n T6 ^# S) p; Y __IO uint16_t BRR;1 w6 X# n( v+ x/ G: m6 F% G
uint16_t RESERVED2;4 @& M. d G+ h' A
__IO uint16_t CR1;# ^: @8 Q3 @6 I% r3 s
uint16_t RESERVED3;
: o6 Z- H# h& o. t% A __IO uint16_t CR2;" _* t+ r* k9 K- `0 x/ \
uint16_t RESERVED4;
, E- C' C; l; }( L2 ^ __IO uint16_t CR3;
' L' J* g+ A I W8 L2 ~ g uint16_t RESERVED5;
5 H8 x6 Y, ]8 }5 X4 Y: P __IO uint16_t GTPR;- `) k, T( I" R/ G
uint16_t RESERVED6;- W) D% d1 e; E8 }" f% n# ~
} USART_TypeDef;. J3 s" R v7 g- |' y- p$ p
" J( T& H& P( h' Z/**
" L! I7 F5 x4 m * @brief Window WATCHDOG5 V3 ~( v+ @3 J9 V1 j6 @
*/
( e, x/ Z: q, ~' j* I6 E
' T. U( F! @5 ]/ [9 \typedef struct! v/ q1 |- U2 t) D" n
{2 ]7 X) S& \1 b7 R/ n+ C4 u- d4 x% O
__IO uint32_t CR;
! A1 G: P" w$ O. g __IO uint32_t CFR;" X! O# ~0 [; P& _& n5 e5 C
__IO uint32_t SR;
- c$ \) P2 @5 z* K; h} WWDG_TypeDef;+ F" m4 i1 h3 _" A0 n: l
+ W$ ?; k* H t ^9 K1 q3 A" T/**6 p/ Z3 {$ ^% V4 `7 y$ V
* @}: Q$ J1 @# ]7 x- ?* y
*/
& q8 q1 Q3 J& r* |' Z: a
s' ]+ ~2 G- k, j5 ?) l$ E$ t8 B/** @addtogroup Peripheral_memory_map( R" D: P( Y- a" V1 h. `- v; n
* @{
% K# C5 c$ S2 T, |+ v */" U( d6 E9 L+ p, P( \
9 p* d( z. _/ R3 v$ _- \7 }/ I
/ q4 m: D- N) N. T2 n
#define FLASH_BASE ((uint32_t)0x08000000) /*!< FLASH base address in the alias region 9 ~. F* x& `: a5 Z& ?
在Alias地区Flash基址*/
e" G7 E& i; W#define SRAM_BASE ((uint32_t)0x20000000) /*!< SRAM base address in the alias region */& w1 p; H2 w2 t0 q3 s
#define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripheral base address in the alias region */0 \' I- S5 f" _/ N& E( P2 a- V
; V9 }- \* g2 i+ @6 S2 I% x5 c#define SRAM_BB_BASE ((uint32_t)0x22000000) /*!< SRAM base address in the bit-band region */1 t" e0 Y2 Z8 F% R! {& _
#define PERIPH_BB_BASE ((uint32_t)0x42000000) /*!< Peripheral base address in the bit-band region */
' |$ t" `7 C' [ B
- n) b% H6 a% X/ X#define FSMC_R_BASE ((uint32_t)0xA0000000) /*!< FSMC registers base address */
( o+ C V% b; T; W8 R2 g! j! T Q8 s3 p" {- V) t; A j" }8 m
/*!< Peripheral memory map */: |& C, a+ I' B. h3 Y7 \- K
#define APB1PERIPH_BASE PERIPH_BASE5 l% K/ B- K8 m! q- V+ N
#define APB2PERIPH_BASE (PERIPH_BASE + 0x10000)
$ y B6 t, L- D/ c/ [: ?#define AHBPERIPH_BASE (PERIPH_BASE + 0x20000)- g7 h& Z# Z$ |4 }1 j
. ?6 F! e# z! I ` m9 E; J) ?. y8 _
#define TIM2_BASE (APB1PERIPH_BASE + 0x0000); ?: U/ S0 x' j' K+ s0 a
#define TIM3_BASE (APB1PERIPH_BASE + 0x0400)
% J+ K7 I& r; K( {) i% y! j#define TIM4_BASE (APB1PERIPH_BASE + 0x0800)
' \! S) ]0 R: S/ X& |/ d9 b J#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00)
* R( o/ i& o' W#define TIM6_BASE (APB1PERIPH_BASE + 0x1000)
! a2 P7 R2 b4 U) r#define TIM7_BASE (APB1PERIPH_BASE + 0x1400)
2 ~$ C( C) d( l& D7 D; [# Z2 E0 t! z#define TIM12_BASE (APB1PERIPH_BASE + 0x1800)' Q; g3 ~& D$ E
#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00)& R) f p6 Z+ }) V! p
#define TIM14_BASE (APB1PERIPH_BASE + 0x2000)
2 }1 W# N7 k- v1 x( {9 x1 s#define RTC_BASE (APB1PERIPH_BASE + 0x2800)5 Q' \- b& z+ z, k+ s
#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00)
2 i: @5 `) _; |6 X+ h4 G#define IWDG_BASE (APB1PERIPH_BASE + 0x3000)
' i: J7 V. Q Z; s#define SPI2_BASE (APB1PERIPH_BASE + 0x3800)
3 y3 R4 w( W2 Y3 L+ a, z) J#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00)+ X: r7 h$ x/ I5 E9 \
#define USART2_BASE (APB1PERIPH_BASE + 0x4400)8 D: s7 E3 O& W, q, Z
#define USART3_BASE (APB1PERIPH_BASE + 0x4800)% e; {" P% M' X9 r) y4 h) {1 h
#define UART4_BASE (APB1PERIPH_BASE + 0x4C00)
* b/ D( i3 j% O& q: t* a! K#define UART5_BASE (APB1PERIPH_BASE + 0x5000)- B3 n. J( B1 z4 f
#define I2C1_BASE (APB1PERIPH_BASE + 0x5400)
2 K1 {# X' W5 o" n" i/ ?#define I2C2_BASE (APB1PERIPH_BASE + 0x5800)! {0 {: C* W5 Z- @6 l" r0 g0 _/ ?- G
#define CAN1_BASE (APB1PERIPH_BASE + 0x6400)
2 E* s* w6 i8 s/ y#define CAN2_BASE (APB1PERIPH_BASE + 0x6800)
. g4 d! g& D5 Z, h: \! J4 q3 ~0 r#define BKP_BASE (APB1PERIPH_BASE + 0x6C00), |3 B6 N9 m- C! \- A
#define PWR_BASE (APB1PERIPH_BASE + 0x7000)' Y5 u8 v7 [* T1 H+ _; u) k
#define DAC_BASE (APB1PERIPH_BASE + 0x7400)
& m0 n, e- A/ K& m/ L#define CEC_BASE (APB1PERIPH_BASE + 0x7800)
: L) c: |& A4 {7 g8 W% x7 v/ k, V5 ^# L# D, {" B
#define AFIO_BASE (APB2PERIPH_BASE + 0x0000)
" P& m4 f. d: a. @4 n- K/ s2 ~6 c#define EXTI_BASE (APB2PERIPH_BASE + 0x0400)" q# n" e1 b7 k9 e4 y+ K6 _
#define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
: w5 G5 p! S% ]- @( @9 Q4 A* M#define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)7 g& `1 e6 \6 k
#define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
Q8 W, a' q6 j& g#define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
3 t; y3 `' V6 ^! b8 ]$ g; k#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
4 P4 O2 r! L- y6 v#define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00)) d5 D* {3 ^8 f6 L, u
#define GPIOG_BASE (APB2PERIPH_BASE + 0x2000)
. ^. p, d$ K# V5 C% n6 e#define ADC1_BASE (APB2PERIPH_BASE + 0x2400)& D: m0 E/ I; B( k
#define ADC2_BASE (APB2PERIPH_BASE + 0x2800)* k- c# J$ F3 F. Q
#define TIM1_BASE (APB2PERIPH_BASE + 0x2C00)
% T+ r* [1 f% C#define SPI1_BASE (APB2PERIPH_BASE + 0x3000)
$ s. J3 Y8 C# C. b9 S& I: D7 m; Z#define TIM8_BASE (APB2PERIPH_BASE + 0x3400); J! y" B3 o) ?- g5 X
#define USART1_BASE (APB2PERIPH_BASE + 0x3800)
( u, f( q" u$ }8 c8 T#define ADC3_BASE (APB2PERIPH_BASE + 0x3C00)+ _$ J7 H, d# s' P3 q( R
#define TIM15_BASE (APB2PERIPH_BASE + 0x4000)/ o. m- v+ x- J% Q. k# W4 @8 r
#define TIM16_BASE (APB2PERIPH_BASE + 0x4400)7 M$ x+ N0 k- q0 X1 y
#define TIM17_BASE (APB2PERIPH_BASE + 0x4800)
+ _* h# c4 _% Z, C3 R5 h6 f#define TIM9_BASE (APB2PERIPH_BASE + 0x4C00)+ C- c9 b% p6 I
#define TIM10_BASE (APB2PERIPH_BASE + 0x5000)2 r0 _. ]. g8 v& K, Y
#define TIM11_BASE (APB2PERIPH_BASE + 0x5400)6 P. W; \& U% p( Y; W, X8 Q
/ D6 d# z$ t/ M# D0 S#define SDIO_BASE (PERIPH_BASE + 0x18000); S9 [# b( y1 n. ^4 i: }" H
1 f! ^. o0 Y, q5 q( e* F#define DMA1_BASE (AHBPERIPH_BASE + 0x0000)% B& i6 ~/ b' }( w' j
#define DMA1_Channel1_BASE (AHBPERIPH_BASE + 0x0008)
4 ?$ V/ ^- m' u( p/ N; r6 v _#define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C)
: r: o. e3 l0 t- @#define DMA1_Channel3_BASE (AHBPERIPH_BASE + 0x0030)8 l9 d+ d) T7 ]6 Z1 Z2 ^/ W1 J
#define DMA1_Channel4_BASE (AHBPERIPH_BASE + 0x0044)
1 c, ^2 i' l! G#define DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x0058)
# D4 U0 F" N2 `. @$ K#define DMA1_Channel6_BASE (AHBPERIPH_BASE + 0x006C)1 n Z, i5 K" l k* A2 ]( [) ~
#define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080)
$ |; J& N6 n' Z( r#define DMA2_BASE (AHBPERIPH_BASE + 0x0400)
$ u$ {. S/ I T7 ~! i#define DMA2_Channel1_BASE (AHBPERIPH_BASE + 0x0408)
6 M# [, ?3 d) C! X#define DMA2_Channel2_BASE (AHBPERIPH_BASE + 0x041C)
/ w7 g* B5 K& f. M#define DMA2_Channel3_BASE (AHBPERIPH_BASE + 0x0430)' Q$ M6 K5 E8 ?: J2 f
#define DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x0444)
" P1 R* c2 w8 h# ]#define DMA2_Channel5_BASE (AHBPERIPH_BASE + 0x0458)) S- k( s9 B0 @/ _
#define RCC_BASE (AHBPERIPH_BASE + 0x1000)
( G# V$ K8 S! n' T" r" I#define CRC_BASE (AHBPERIPH_BASE + 0x3000)+ ^. j( X: s- W7 K; Q
: u& F) U0 r `. f
#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000) /*!< Flash registers base address */
9 a0 P4 }0 u. o2 z/ b6 }4 z#define OB_BASE ((uint32_t)0x1FFFF800) /*!< Flash Option Bytes base address */( ^% T' l4 }: u% y2 \- v
/ s$ Y2 ]1 o1 x% `4 O" @#define ETH_BASE (AHBPERIPH_BASE + 0x8000)
9 u4 ~: O7 R8 L) l; q, e8 b#define ETH_MAC_BASE (ETH_BASE), ^9 m ^. }) R* U
#define ETH_MMC_BASE (ETH_BASE + 0x0100)
) o/ _( {) l/ P6 u$ E+ v- m#define ETH_PTP_BASE (ETH_BASE + 0x0700)
8 t& z. v0 I! @' u% o$ I#define ETH_DMA_BASE (ETH_BASE + 0x1000) H1 A" J9 w8 X- N( z& S w m
( _/ [5 A( B* G#define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000) /*!< FSMC Bank1 registers base address *// t" ]& Q- B, W4 ^9 j7 W! t
#define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104) /*!< FSMC Bank1E registers base address */
6 m+ o! A& r8 B4 g0 _# g8 P#define FSMC_Bank2_R_BASE (FSMC_R_BASE + 0x0060) /*!< FSMC Bank2 registers base address */
6 p: A" e" `! u#define FSMC_Bank3_R_BASE (FSMC_R_BASE + 0x0080) /*!< FSMC Bank3 registers base address */
/ D, T1 j; G4 X6 O#define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0) /*!< FSMC Bank4 registers base address */- D$ f( X3 P4 D- U' y
7 j4 D- v8 g5 `( u% S
#define DBGMCU_BASE ((uint32_t)0xE0042000) /*!< Debug MCU registers base address */+ W Y5 c% T- b" K. k' H
9 ?$ d f- R1 `$ J
8 q; o3 x5 }- {) @8 Y% y ——————————————————————————————————————————————————— ——————————————————————————————————————————————————— /******************************************************************************/0 K& f4 a P5 `( h; V. i
/* Peripheral Registers_Bits_Definition
: Y, W6 r4 `) [、 串行寄存器位定义 */$ Z' T. \* P$ Z$ f c2 F
/******************************************************************************/
+ ]3 n3 M* g& g) i$ ~
. `* I, }2 Y2 p* }, @/******************************************************************************/# a+ _6 s" T2 A0 g( T# F6 _ v
/* */$ l& r) q! ^, K" N
/* CRC calculation unit */
" t1 W1 [* s; M7 |& F% \/* CRC 校验单元 */
2 ^( V D; _9 A6 P# Y/******************************************************************************/
4 b9 x' t- Z L
& e/ n: Q$ @" F |/******************* Bit definition for CRC_DR register *********************/: t+ Y- K' d( s% y1 P! M
#define CRC_DR_DR ((uint32_t)0xFFFFFFFF) /*!< Data register bits数据寄存器位 */
h. @/ Z+ V a; v( \6 J$ _. ?2 n! D$ O! Z数据寄存器(CRC_DR)
5 j- D" |$ _* w; g5 ?% {( m9 i0 D$ C3 ` p8 j% |% u0 x n
/******************* Bit definition for CRC_IDR register ********************/! E) g+ N7 k. P" i' b& N
#define CRC_IDR_IDR ((uint8_t)0xFF) /*!< General-purpose 8-bit data register bits 通用8位寄存器*/# o/ n7 _- B* Z5 Z/ j
独立数据寄存器(CRC_IDR)8 v5 K6 R1 |: b2 t! m
控制寄存器(CRC_CR)
/ m+ ~( X5 d( Y; J/******************** Bit definition for CRC_CR register ********************/! O. |! F, n9 a( X
#define CRC_CR_RESET ((uint8_t)0x01) /*!< RESET bit 重启位*/9 P0 o2 X' k, `% j
0 t& ~" [% F1 ]4 v O/******************************************************************************/
& ]' i# f1 f- d/* */
8 d# f6 a/ m* K# j7 z# ~: C8 T- w/* Power Control */9 R$ F# L3 s* A5 r. _6 k
/* */ l( S9 [. c8 S& W- T
/******************************************************************************/
0 Q+ x0 ~1 Q0 v9 R) M: n4 V
' V1 N% p |3 G% W( w/******************** Bit definition for PWR_CR register ********************/
+ x V$ h Y1 U6 i#define PWR_CR_LPDS ((uint16_t)0x0001) /*!< Low-Power Deepsleep */* ~2 j: G% J1 u$ @/ ~
#define PWR_CR_PDDS ((uint16_t)0x0002) /*!< Power Down Deepsleep */: Y7 A* n2 I6 [' t8 I$ q% a- ?
#define PWR_CR_CWUF ((uint16_t)0x0004) /*!< Clear Wakeup Flag */# P0 M5 a; | I$ ^6 A3 r- M0 M
#define PWR_CR_CSBF ((uint16_t)0x0008) /*!< Clear Standby Flag */
; m2 E1 ~6 J$ @% F! f8 I6 I2 I#define PWR_CR_PVDE ((uint16_t)0x0010) /*!< Power Voltage Detector Enable */
: c- \4 C4 p, I9 Z, \8 \/ y3 e- P/ a3 Q5 Q. U
#define PWR_CR_PLS ((uint16_t)0x00E0) /*!< PLS[2:0] bits (PVD Level Selection) */2 G2 P4 c, n: N. O! h$ D# m
#define PWR_CR_PLS_0 ((uint16_t)0x0020) /*!< Bit 0 */
/ U F6 o9 ], \. ]8 D$ ^2 N#define PWR_CR_PLS_1 ((uint16_t)0x0040) /*!< Bit 1 */
% R- X3 F Z8 X, [ J: `#define PWR_CR_PLS_2 ((uint16_t)0x0080) /*!< Bit 2 */
8 _9 q! e& e/ z3 x' D- E/ g% P7 l( f4 c/ O* z$ r& [
/*!< PVD level configuration */
+ p/ ? g" d4 N8 d- w$ H0 E$ m6 P#define PWR_CR_PLS_2V2 ((uint16_t)0x0000) /*!< PVD level 2.2V */
, ~, Y# c' W, R+ J$ `#define PWR_CR_PLS_2V3 ((uint16_t)0x0020) /*!< PVD level 2.3V */, D& f0 r* B7 [8 {
#define PWR_CR_PLS_2V4 ((uint16_t)0x0040) /*!< PVD level 2.4V */% \8 i! N/ [, R X8 U/ ]. ~1 v
#define PWR_CR_PLS_2V5 ((uint16_t)0x0060) /*!< PVD level 2.5V */
( k( J9 A4 J) Q9 B( h% z% C; f#define PWR_CR_PLS_2V6 ((uint16_t)0x0080) /*!< PVD level 2.6V */ X; t$ y' E: A3 f$ Q' x$ w
#define PWR_CR_PLS_2V7 ((uint16_t)0x00A0) /*!< PVD level 2.7V */
( p3 o4 ~4 c: T1 F) P" }#define PWR_CR_PLS_2V8 ((uint16_t)0x00C0) /*!< PVD level 2.8V */" L# U9 V }# R( m9 X) V( p; w4 F: k
#define PWR_CR_PLS_2V9 ((uint16_t)0x00E0) /*!< PVD level 2.9V */
/ e4 m4 [, [9 U) N4 f
. }& p1 E( h: X3 R0 _#define PWR_CR_DBP ((uint16_t)0x0100) /*!< Disable Backup Domain write protection */ a. p$ |5 h2 s4 r
5 R. G2 H7 P) N( X/ c+ M
! Z; o5 a+ {9 x- v& _/ c
/******************* Bit definition for PWR_CSR register ********************/
: `7 P& g2 W' Z, T3 ~- _! O L: d7 N#define PWR_CSR_WUF ((uint16_t)0x0001) /*!< Wakeup Flag */
8 u ?' G( ?& f# z#define PWR_CSR_SBF ((uint16_t)0x0002) /*!< Standby Flag */. Y8 x1 u& i" `$ q
#define PWR_CSR_PVDO ((uint16_t)0x0004) /*!< PVD Output */" V7 ^( W1 q* P6 Q, _
#define PWR_CSR_EWUP ((uint16_t)0x0100) /*!< Enable WKUP pin */" b8 c# e" a' w) }; j
- y% R. N4 X* s! ^; C3 W; W! j+ ?/******************************************************************************/0 J' {6 v; ]0 F/ L0 Y7 [4 H4 z
/* */
& ? f/ j' c# K( R/* Backup registers */* [" p; I2 J- h. ~& `7 Q1 d2 w- P
/* *// P9 j! ]* m4 S2 Z
/******************************************************************************/
O, o3 C* b* Y- Q" u; Y X4 q p, n
/******************* Bit definition for BKP_DR1 register ********************/
. E2 F4 J' R2 r9 R8 G/ G4 ]#define BKP_DR1_D ((uint16_t)0xFFFF) /*!< Backup data */" r7 k9 @1 _- p! h
, ]2 p7 a' M& e/ j+ ~
/******************* Bit definition for BKP_DR2 register ********************/
: E1 s( o. k& _2 }8 ^#define BKP_DR2_D ((uint16_t)0xFFFF) /*!< Backup data */
+ O& R7 Z8 \6 G2 R" A0 f% A8 z L& a3 q3 z' C
/******************* Bit definition for BKP_DR3 register ********************/
0 j' z4 x1 M7 ?6 X* `7 A- L+ b: e+ g#define BKP_DR3_D ((uint16_t)0xFFFF) /*!< Backup data */
! u. \+ }9 q5 @+ m7 D. F: N k% k+ S& R
/******************* Bit definition for BKP_DR4 register ********************/. `3 O! q/ f; D( b! e
#define BKP_DR4_D ((uint16_t)0xFFFF) /*!< Backup data */" e% t( k" g; S7 a( G- u% ?
' z& W$ D5 N/ A; X/******************* Bit definition for BKP_DR5 register ********************// R6 O4 i5 Z3 U0 ~" `, Z& M+ Z, n8 R" P
#define BKP_DR5_D ((uint16_t)0xFFFF) /*!< Backup data */
' N$ j+ k* y* R8 y8 Y+ ]
& N8 m/ F6 q4 u4 ]. @* E+ n* x# A/******************* Bit definition for BKP_DR6 register ********************/& u! w9 f, ~# C2 W
#define BKP_DR6_D ((uint16_t)0xFFFF) /*!< Backup data */! u* c* m- |% a0 I0 w) e
' n/ f( h. x+ s$ U" t/******************* Bit definition for BKP_DR7 register ********************/+ u' D# Q1 J- {: ~4 ]8 q1 f
#define BKP_DR7_D ((uint16_t)0xFFFF) /*!< Backup data */# ]4 l- r8 N4 r3 a! T
3 }2 ]5 |" z2 e: a$ ]$ M/******************* Bit definition for BKP_DR8 register ********************/: o! d3 n; {& @
#define BKP_DR8_D ((uint16_t)0xFFFF) /*!< Backup data */- e( ?8 T T/ w2 {# ]
; P s$ v W2 y7 {' r. ~8 x
/******************* Bit definition for BKP_DR9 register ********************/+ P- k8 H) y! Y) X
#define BKP_DR9_D ((uint16_t)0xFFFF) /*!< Backup data */
( b3 b8 W5 S' h- P" ^& O( m& K4 Z% L6 W
/******************* Bit definition for BKP_DR10 register *******************/
# ?+ M8 Y! b, A0 W% |0 ^#define BKP_DR10_D ((uint16_t)0xFFFF) /*!< Backup data */
) P( [# T/ o! J. S- N( w$ B; w" ]% m4 ]* } o; l
/******************* Bit definition for BKP_DR11 register *******************/
' x* h6 V% T' Z0 v) z( T#define BKP_DR11_D ((uint16_t)0xFFFF) /*!< Backup data */
$ ?! U! \/ _1 w! f' u# T
?/ G) K/ J& B5 S" ~; T2 c4 ^0 A5 P/******************* Bit definition for BKP_DR12 register *******************/
' }3 t" d1 @5 k#define BKP_DR12_D ((uint16_t)0xFFFF) /*!< Backup data */
4 |( k# O6 _/ @) l `% G5 I$ s, [* F4 J2 q* |
/******************* Bit definition for BKP_DR13 register *******************/% [6 i, [" W6 [0 }7 ? Q4 \
#define BKP_DR13_D ((uint16_t)0xFFFF) /*!< Backup data */' P1 U" K+ }1 s6 Q3 P( R" g
0 D' H# i: ^5 ^: q# b* G: |" @
/******************* Bit definition for BKP_DR14 register *******************/
" v l# `% o* n- u! }) X#define BKP_DR14_D ((uint16_t)0xFFFF) /*!< Backup data */ V( ^' p+ O5 _5 O2 R
* X) t$ I, e2 k5 J/******************* Bit definition for BKP_DR15 register *******************/
" p# U3 P: Q" n#define BKP_DR15_D ((uint16_t)0xFFFF) /*!< Backup data */
, @2 W9 l( M* i0 h
( }: {! Q! {) ]4 h8 R/******************* Bit definition for BKP_DR16 register *******************/
: c& ~ {: f- D' T2 R6 k q#define BKP_DR16_D ((uint16_t)0xFFFF) /*!< Backup data */5 |. _" l, F5 Z* |2 m: y# {
* }& V; f, U! L4 U x2 T
/******************* Bit definition for BKP_DR17 register *******************/& I& y2 Y1 M" @ ~8 @' K
#define BKP_DR17_D ((uint16_t)0xFFFF) /*!< Backup data */
. ^9 r6 r: H% Y% {9 v+ ^" V: f0 w4 k
/****************** Bit definition for BKP_DR18 register ********************/
! F6 Y' @. {& p#define BKP_DR18_D ((uint16_t)0xFFFF) /*!< Backup data */
0 ]9 o; {* M0 \9 C4 X3 ?$ g% B, c8 z9 ?
/******************* Bit definition for BKP_DR19 register *******************/" T6 P3 G. F" E+ B* {. c# `9 H2 t3 v/ ]
#define BKP_DR19_D ((uint16_t)0xFFFF) /*!< Backup data */# j# n+ M t; M0 j7 A5 `9 t: i
* J) g5 M- I: I: X- x/******************* Bit definition for BKP_DR20 register *******************/9 \6 R" [( R$ Y. G" C+ \) S
#define BKP_DR20_D ((uint16_t)0xFFFF) /*!< Backup data */
% n# n2 E9 D" Q% A. R) c" {7 J2 _5 l/ S( K/ ^: `
/******************* Bit definition for BKP_DR21 register *******************/
7 f; u( ]6 F6 b) Z3 K#define BKP_DR21_D ((uint16_t)0xFFFF) /*!< Backup data */! l# a- D7 u8 t6 s" z
) w0 g' k I+ R" c
/******************* Bit definition for BKP_DR22 register *******************/( W+ Y# V5 C* @% F
#define BKP_DR22_D ((uint16_t)0xFFFF) /*!< Backup data */
% m! z1 S8 }& w$ n; B# `9 z: U& w+ [% A% p% U$ J( w) e
/******************* Bit definition for BKP_DR23 register *******************/
' p5 _! Z; e/ c8 s1 ~* x#define BKP_DR23_D ((uint16_t)0xFFFF) /*!< Backup data */0 m ~) V7 H& h# v. O" V6 o# A4 ]
+ a- B: ~7 \$ J0 z" q/******************* Bit definition for BKP_DR24 register *******************/
$ d& h* {, `8 G, K# @#define BKP_DR24_D ((uint16_t)0xFFFF) /*!< Backup data *// d+ Q. ?3 f' Y8 D+ j6 }
9 Y) ~, W* p* G2 Y2 m& l+ ]/******************* Bit definition for BKP_DR25 register *******************/
- b9 J8 c) w, t" K; `9 F( K#define BKP_DR25_D ((uint16_t)0xFFFF) /*!< Backup data */
0 z) n1 P8 Y9 m, h
T0 S9 Y+ V6 l/ d/******************* Bit definition for BKP_DR26 register *******************/' y3 L/ ?4 O* L* k2 `% U- U9 x& Q
#define BKP_DR26_D ((uint16_t)0xFFFF) /*!< Backup data */
' j0 Y7 A' v8 W2 ?8 b9 t$ Q: \( r
+ p' @: d4 H; o9 X! `9 `7 m/******************* Bit definition for BKP_DR27 register *******************/
& n( H' V2 P [" |) j- l3 @% z#define BKP_DR27_D ((uint16_t)0xFFFF) /*!< Backup data */0 Q, Q% P! \$ E8 P
( Y" @+ I, |3 \/******************* Bit definition for BKP_DR28 register *******************/+ T( g, C' z% A/ g! E' K7 z
#define BKP_DR28_D ((uint16_t)0xFFFF) /*!< Backup data */1 T2 ~* i$ Y: h/ S0 S9 Q. E
1 M8 j" ^" c1 P( g& P/******************* Bit definition for BKP_DR29 register *******************/
# P, p/ Y# I# q2 p#define BKP_DR29_D ((uint16_t)0xFFFF) /*!< Backup data */
5 d! N# p8 ^7 ~" F1 Y& e; n" ?) ?0 E/ |6 s) n; I2 T3 a4 x
/******************* Bit definition for BKP_DR30 register *******************/; q$ @4 S! Q3 s- R& L: b6 |. S
#define BKP_DR30_D ((uint16_t)0xFFFF) /*!< Backup data */+ p* B4 R4 a7 I3 b- u! i' z. X
) Q& e$ e% k" R( i! U
/******************* Bit definition for BKP_DR31 register *******************/
5 \5 |: a- U+ j% a; f7 h#define BKP_DR31_D ((uint16_t)0xFFFF) /*!< Backup data */2 ?) V7 }/ w5 Z! c9 }
1 V5 X+ U. j% B8 [' l+ R/ e/******************* Bit definition for BKP_DR32 register *******************/
; h5 \0 U( b, c' I d1 \#define BKP_DR32_D ((uint16_t)0xFFFF) /*!< Backup data */
/ U( M% D0 Y1 ~& I
/ H: V8 V* I. ^5 c" X# t6 x% S, B/******************* Bit definition for BKP_DR33 register *******************/9 R; g" ?# N# O3 _/ t
#define BKP_DR33_D ((uint16_t)0xFFFF) /*!< Backup data */( z! L: K1 P* p! Q. n
1 D0 v% ]. o# {8 {( ~
/******************* Bit definition for BKP_DR34 register *******************/
5 ]3 U% Z9 G, N( F' O# j/ G3 c#define BKP_DR34_D ((uint16_t)0xFFFF) /*!< Backup data */ Q- p) N+ I1 o* r! K' y/ a
4 ?2 u _9 y1 ~. l/******************* Bit definition for BKP_DR35 register *******************/
- v# B" C6 D- V u1 }# t#define BKP_DR35_D ((uint16_t)0xFFFF) /*!< Backup data */
' N! L3 l0 q# h; ?5 c/ U; N( T3 j
* K! m/ [8 i& E4 X/ f/******************* Bit definition for BKP_DR36 register *******************/( x% m! l1 f$ u X: @
#define BKP_DR36_D ((uint16_t)0xFFFF) /*!< Backup data */
. B% _1 J* |' l/ \4 n4 u
: P7 s; C, {! ]7 X/******************* Bit definition for BKP_DR37 register *******************/; m7 k; m- g- m0 j' K5 W
#define BKP_DR37_D ((uint16_t)0xFFFF) /*!< Backup data */
, u. U2 N" D5 j; o3 N+ H: U5 W/ n3 r4 ?% D4 c; z' l
/******************* Bit definition for BKP_DR38 register *******************/
7 z& }& Z% r# A* B#define BKP_DR38_D ((uint16_t)0xFFFF) /*!< Backup data */. X6 j0 P8 V5 @+ Z
! U+ J* w+ K1 A9 C/ D/******************* Bit definition for BKP_DR39 register *******************/7 Y$ ~, v- p) Z; e6 b! v+ G3 e2 `
#define BKP_DR39_D ((uint16_t)0xFFFF) /*!< Backup data */
0 A% ]5 H& L& T6 `0 w3 o( d. g/ n' t9 D0 ]% U8 f0 ~7 @. K
/******************* Bit definition for BKP_DR40 register *******************/" s! [9 l3 {; i, O
#define BKP_DR40_D ((uint16_t)0xFFFF) /*!< Backup data */+ u! U: e1 L' I q8 T5 h" a; l( u
2 A8 ^! h2 @3 c; b D
/******************* Bit definition for BKP_DR41 register *******************/) o/ e, ]9 a' t3 g$ K
#define BKP_DR41_D ((uint16_t)0xFFFF) /*!< Backup data */ \0 E/ _. [1 [
- T; l3 v. ~$ u- {; o6 y
/******************* Bit definition for BKP_DR42 register *******************/
# ^' K a) F8 G& w1 W# J9 A% i, v#define BKP_DR42_D ((uint16_t)0xFFFF) /*!< Backup data */8 u; j1 D& T$ b# k
3 V& H I5 v; A: ^ ?/****************** Bit definition for BKP_RTCCR register *******************/+ O/ C! N. x. A' @/ _
#define BKP_RTCCR_CAL ((uint16_t)0x007F) /*!< Calibration value */
7 ^' {2 c2 B7 j) C2 {#define BKP_RTCCR_CCO ((uint16_t)0x0080) /*!< Calibration Clock Output */- l, ]$ `* A8 D
#define BKP_RTCCR_ASOE ((uint16_t)0x0100) /*!< Alarm or Second Output Enable */9 _" R4 ? \* ]0 G5 P3 y4 u# n$ ]" \8 T
#define BKP_RTCCR_ASOS ((uint16_t)0x0200) /*!< Alarm or Second Output Selection */# _0 d7 E( K& I( i8 P3 D
/ k- \' Q; v: F" n6 l4 X1 u, ?8 Q' _
/******************** Bit definition for BKP_CR register ********************/# V G( R; z i, O4 O H5 j
#define BKP_CR_TPE ((uint8_t)0x01) /*!< TAMPER pin enable */) S+ O& k, ~$ R3 L1 C7 L
#define BKP_CR_TPAL ((uint8_t)0x02) /*!< TAMPER pin active level */! x/ K# g8 V) `) J3 ] C2 x
. U# R" } }' t9 T
/******************* Bit definition for BKP_CSR register ********************/) s: j% Z' j3 l- E# m8 V9 R
#define BKP_CSR_CTE ((uint16_t)0x0001) /*!< Clear Tamper event */
8 }+ `' R# H0 i4 P+ b6 U#define BKP_CSR_CTI ((uint16_t)0x0002) /*!< Clear Tamper Interrupt */; U' d3 l* z* a- E0 ?
#define BKP_CSR_TPIE ((uint16_t)0x0004) /*!< TAMPER Pin interrupt enable */
- P* H) B, [, p- O( `! a#define BKP_CSR_TEF ((uint16_t)0x0100) /*!< Tamper Event Flag */: |; ?/ \6 G% o1 e
#define BKP_CSR_TIF ((uint16_t)0x0200) /*!< Tamper Interrupt Flag */
7 \- F- P$ H+ P! e5 T0 |+ ~# p! Y' n9 n: n4 P
/******************************************************************************/
W1 Y8 h" [$ m8 t/* */
3 u' ]8 M/ F$ h' R/* Reset and Clock Control */
U: S/ ^4 ~7 ^; F' {/* */
9 ?& W& B, r: M7 @6 f+ Y/******************************************************************************/
7 ]- f1 r$ L+ E M; u! F9 A1 u! e' a* s) v/ F
/******************** Bit definition for RCC_CR register ********************/
! K( \ z7 H* z* |# F#define RCC_CR_HSION ((uint32_t)0x00000001) /*!< Internal High Speed clock enable */! t% i8 U: {( c7 f( V
#define RCC_CR_HSIRDY ((uint32_t)0x00000002) /*!< Internal High Speed clock ready flag */
2 o4 T+ V; a! W* i#define RCC_CR_HSITRIM ((uint32_t)0x000000F8) /*!< Internal High Speed clock trimming */
Y0 g6 c4 }; s2 x2 ^( r#define RCC_CR_HSICAL ((uint32_t)0x0000FF00) /*!< Internal High Speed clock Calibration */
* _8 L$ {2 r# E ?' r' E#define RCC_CR_HSEON ((uint32_t)0x00010000) /*!< External High Speed clock enable */$ W+ ?5 h* g0 I( H, L
#define RCC_CR_HSERDY ((uint32_t)0x00020000) /*!< External High Speed clock ready flag */
: E% h% z1 V: D8 H; T$ K( d#define RCC_CR_HSEBYP ((uint32_t)0x00040000) /*!< External High Speed clock Bypass */
) d2 k' K y, |) C#define RCC_CR_CSSON ((uint32_t)0x00080000) /*!< Clock Security System enable */
' z* d5 g: K) o4 N3 @#define RCC_CR_PLLON ((uint32_t)0x01000000) /*!< PLL enable */
, ^+ o G* M$ H4 v; T+ }) @#define RCC_CR_PLLRDY ((uint32_t)0x02000000) /*!< PLL clock ready flag */
$ N$ i! y5 C% i4 F# k! @/ N& G$ L) D5 O7 v9 u
#ifdef STM32F10X_CL
0 E) T9 q1 E) |( L2 [#define RCC_CR_PLL2ON ((uint32_t)0x04000000) /*!< PLL2 enable */6 C" U7 b% p( n% ~, D. k# A
#define RCC_CR_PLL2RDY ((uint32_t)0x08000000) /*!< PLL2 clock ready flag */* C* h; E Z5 }7 c3 }2 f
#define RCC_CR_PLL3ON ((uint32_t)0x10000000) /*!< PLL3 enable */8 ]$ ~/ q" e* U, |& ~! l
#define RCC_CR_PLL3RDY ((uint32_t)0x20000000) /*!< PLL3 clock ready flag */
# ~: E" [, C+ @! p, H#endif /* STM32F10X_CL */: o, o2 b9 b+ ~" j
! b+ e* b0 s) @. g* E0 }$ d' h# X
- i& _! m3 V% T% N3 H5 e9 O% S U
* |. g4 m2 v' a5 T# ~$ E: V2 Q ——————————————————————————————————————————————————— ——————————————————————————————————————————————————— 截止到目前为止。这个头文件应该注意的都已经解析完毕，剩下的就是相关控制位的定义了。8 e: a8 D, Q: `1 D: `0 M
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发布时间：2021-11-27 10:46
